Transparent Conductor Patents (Class 438/609)
  • Patent number: 10566538
    Abstract: A method for forming an organic thin film solar battery includes steps of: providing a substrate and an evaporating source; forming a first electrode on a surface of the substrate; spacing the evaporating source from the first electrode, and heating the carbon nanotube film structure to gasify the photoactive material and form a photoactive layer on a surface of the first electrode; and forming a second electrode on a surface of the photoactive layer.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: February 18, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yang Wei, Hao-Ming Wei, Shou-Shan Fan
  • Patent number: 10297623
    Abstract: The present invention provides a TFT substrate manufacturing method. The method uses a photoresist material that contains crystallizable and precipitatable pigment to form a photoresist layer, so that a plurality of crystallization burrs can be formed on a surface of the photoresist layer, making it possible for a pixel electrode film not completely covering the surface of the photoresist layer and thus, allowing a peeling agent to pass through the crystallization burrs and penetrate into the photoresist layer to cause corrosion of the photoresist layer thereby peeling off the photoresist layer and a portion of the pixel electrode film located on the photoresist layer at the same time to form a pixel electrode, whereby, compared to the prior art, peeling can be conducted without adopting a special mask and involving special mask parameters and also requiring no plasma treatment so that the process of fabricating a TFT substrate can be simplified to enhance fabrication efficiency of the TFT substrate.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: May 21, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Ji Li
  • Patent number: 9904386
    Abstract: The invention relates to a method for patterning one or more portions of a microstructure comprised of a flexible substrate, a conductor disposed on the substrate, and a metal layer disposed on the conductor, wherein the conductor is comprised of a stack of a first and a second transparent conductive oxide (TCO) layer, and a metal doped silicon oxide layer sandwiched between the two TCO layers.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: February 27, 2018
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Muthu Sebastian, Michael W. Dolezal
  • Patent number: 9659975
    Abstract: Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: May 23, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Meili Wang, Fengjuan Liu, Chunsheng Jiang
  • Patent number: 9627363
    Abstract: A display device including a wiring substrate having a wiring electrode; a plurality of semiconductor light emitting devices which form pixels; and a conductive adhesive layer configured to electrically connect the wiring electrode with the plurality of semiconductor light emitting devices. Further, the conductive adhesive layer includes a body provided with a resin having an adhesive property; and a metallic aggregation part disposed in the body, and formed as metallic atoms precipitated from a metal-organic compound and aggregated with each other.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: April 18, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Chisun Kim, Byungjoon Rhee, Bongchu Shim
  • Patent number: 9256110
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 9, 2016
    Assignee: Xenogenic Development Limited Liability Company
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 9224799
    Abstract: Provided are capacitor stacks for use in integrated circuits and methods of fabricating these stacks. A capacitor stack includes a dielectric layer and one or two inner electrode layers, such as a positive inner electrode layer and a negative inner electrode layer. The inner electrode layers directly interface the dielectric layer. The stack may also include outer electrode layers. The inner electrode layers are either chemically stable or weakly chemically unstable, while in contact with the dielectric layer based on the respective phase diagrams. Furthermore, the electron affinity of the positive inner electrode layer may be less than the electron affinity of the dielectric layer. The sum of the electron affinity and bandgap of the negative inner electrode layer may be less than that of the dielectric layer. In some embodiments, inner electrode layers are formed from heavily doped semiconducting materials, such as gallium arsenide or gallium aluminum arsenide.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: December 29, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Sergey Barabash, Dipankar Pramanik
  • Patent number: 9054245
    Abstract: Methods for doping an absorbent layer of a p-n heterojunction in a thin film photovoltaic device are provided. The method can include depositing a window layer on a transparent substrate, where the window layer includes at least one dopant (e.g., copper). A p-n heterojunction can be formed on the window layer, with the p-n heterojunction including a photovoltaic material (e.g., cadmium telluride) in an absorber layer. The dopant can then be diffused from the window layer into the absorber layer (e.g., via annealing).
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: June 9, 2015
    Assignee: First Solar, Inc.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Patent number: 9018088
    Abstract: Growing spin-capable multi-walled carbon nanotube (MWCNT) forests in a repeatable fashion will become possible through understanding the critical factors affecting the forest growth. Here we show that the spinning capability depends on the alignment of adjacent MWCNTs in the forest which in turn results from the synergistic combination of a high areal density of MWCNTs and short distance between the MWCNTs. This can be realized by starting with both the proper Fe nanoparticle size and density which strongly depend on the sheet resistance of the catalyst film. Simple measurement of the sheet resistance can allow one to reliably predict the growth of spin-capable forests. The properties of pulled MWCNTs sheets reflect that there is a relationship between their electrical resistance and optical transmittance. Overlaying either 3, 5, or 10 sheets pulled out from a single forest produces much more repeatable characteristics.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: April 28, 2015
    Assignee: Board of Regents, The University of Texas Systems
    Inventors: Jae Hak Kim, Gil Sik Lee, Kyung Hwan Lee, Lawrence J. Overzet
  • Patent number: 9012904
    Abstract: In the transistor including an oxide semiconductor film, a gate insulating film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film, and the hydrogen capture film is formed on a side which is in contact with a gate electrode. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Imoto, Tetsunori Maruyama, Yuta Endo
  • Patent number: 8999836
    Abstract: It is an object of the present invention to provide a technique for manufacturing a highly reliable display device at low cost with high yield. A first electrode layer is formed by a sputtering method using a gas containing hydrogen or H2O, an electroluminescent layer is formed over the first electrode layer, and a second electrode layer is formed over the electroluminescent layer. According to one aspect of the present invention, a display device is manufactured to include a first electrode layer including indium zinc oxide containing silicon oxide and tungsten oxide, an electroluminescent layer over the first electrode layer, and a second electrode layer over the electroluminescent layer, where the electroluminescent layer includes a layer containing an organic compound and an inorganic compound to be in contact with the first electrode layer.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: April 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiaki Oikawa, Kengo Akimoto
  • Patent number: 8980680
    Abstract: A method for fabricating a solar cell element, the method comprising a step (a) of preparing a laminate and a chamber, a step (b) of bringing the laminate into contact with the aqueous solution in such a manner that the second surface is immersed in the aqueous solution after the step (a); a step (c) of applying a voltage difference between an anode electrode and the laminate under an atmosphere of the inert gas to form a Zn layer on the second surface after the step (b); and a step (d) of exposing the Zn layer to oxygen so as to convert the Zn layer into a ZnO crystalline layer after the step (c).
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: March 17, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tomoyuki Komori, Tetsuya Asano
  • Patent number: 8946004
    Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: February 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joo-Han Kim, Ki-Yong Song, Dong-Ju Yang, Hee-Joon Kim, Yeo-Geon Yoon, Sung-Hen Cho, Chang-Hoon Kim, Jae-Hong Kim, Yu-Gwang Jeong, Ki-Yeup Lee, Sang-Gab Kim, Yun-Jong Yeo, Shin-Il Choi, Ji-Young Park
  • Patent number: 8940579
    Abstract: Disclosed are new methods of fabricating metal oxide thin films and nanomaterial-derived metal composite thin films via solution processes at low temperatures (<400° C.). The present thin films are useful as thin film semiconductors, thin film dielectrics, or thin film conductors, and can be implemented into semiconductor devices such as thin film transistors and thin film photovoltaic devices.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 27, 2015
    Assignees: Northwestern University, Polyera Corporation
    Inventors: Antonio Facchetti, Tobin J. Marks, Mercouri G. Kanatzidis, Myung-Gil Kim, William Christopher Sheets, He Yan, Yu Xia
  • Patent number: 8927436
    Abstract: The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: January 6, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae Ho Kim, Bong-Kyun Kim, Yong-Hwan Ryu, Hong Sick Park, Wang Woo Lee, Shin Il Choi
  • Patent number: 8912086
    Abstract: A method for manufacturing a transparent electrode using a print-based metal wire is provided, which enables the mass production of the transparent electrode as a substitute for ITO at low cost. The manufacturing method includes: the first step of forming a metal wire in a pattern set for a transparent substrate; and the second step of coating a solution type transparent electrode on the transparent substrate.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: December 16, 2014
    Assignee: Korea Institute of Machinery & Materials
    Inventors: Jeong-Dai Jo, Jong-Su Yu, Jung Su Kim, Seong-Man Yoon, Sung Woo Bae, Dong-Soo Kim
  • Patent number: 8895429
    Abstract: A micro-channel structure having variable depths includes a substrate and a cured layer formed on the substrate. At least first and second micro-channels are embossed in the cured layer. The first micro-channel has a bottom surface defining a first depth and the second micro-channel has a bottom surface defining a second depth different from the first depth. A cured electrical conductor is making a micro-wire is formed in each of the first and second micro-channels over their respective bottom surfaces.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: November 25, 2014
    Assignee: Eastman Kodak Company
    Inventor: Ronald Steven Cok
  • Patent number: 8895427
    Abstract: A zinc oxide transparent electroconductive oxide has been difficult to use as a substrate having a transparent electrode because the oxide, when configured as a thin film, because of increased resistivity due to air and/or moisture exposure. Though doping can inhibit increase of resistance to some extent, there has been difficulty in selecting a type and an amount of a doping substance and because doping causes high initial resistance. A substrate having a transparent electrode with stable resistivity against various environments is produced by a magnetron sputtering method using a target composed of a zinc oxide transparent electroconductive oxide containing 0.50 to 2.75% silicon dioxide by weight relative to the oxide.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: November 25, 2014
    Assignee: Kaneka Corporation
    Inventors: Takashi Kuchiyama, Kenji Yamamoto
  • Patent number: 8895428
    Abstract: Disclosed is a manufacture method of the thin film transistor array, comprising depositing a first transparent conductive layer and a first metal layer to perform patterning for forming a common electrode, a gate electrode and a transparent electrode array; depositing an insulating layer, an active layer, an ohmic contact layer and a second metal layer to perform patterning for forming a source and a drain; depositing a second transparent conductive layer to perform patterning for forming a source contact layer, a drain contact layer and a pixel electrode array connected to the drain contact layer. The present invention simplifies the manufacture process, saves the cost and time for the manufacture.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: November 25, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Shijian Qin
  • Patent number: 8890195
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8889440
    Abstract: An optical emitter includes a Light-Emitting Diode (LED) on a package wafer, transparent insulators, and one or more transparent electrical connectors between the LED die and one or more contact pads on the packaging wafer. The transparent insulators are deposited on the package wafer with LED dies attached using a lithography or a screen printing method. The transparent electrical connectors are deposited using physical vapor deposition, chemical vapor deposition, spin coating, spray coating, or screen printing and may be patterned using a lithography process and etching.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: November 18, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Yung-Chang Chen, Hsin-Hsien Wu, Ming Shing Lee, Huai-En Lai, Fu-Wen Liu, Andy Wu
  • Patent number: 8878212
    Abstract: A light emitting device includes a substrate, at least one electrode, a first contact layer, a second contact layer, a light emitting structure layer, and an electrode layer. The electrode is disposed through the substrate. The first contact layer is disposed on a top surface of the substrate and electrically connected to the electrode. The second contact layer is disposed on a bottom surface of the substrate and electrically connected to the electrode. The light emitting structure layer is disposed above the substrate at a distance from the substrate and electrically connected to the first contact layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The electrode layer is disposed on the light emitting structure layer.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: November 4, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Woo Sik Lim, Sung Kyoon Kim, Sung Ho Choo, Hee Young Beom
  • Patent number: 8871628
    Abstract: An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and the transparent electrode layer. In the electrode structure, one or more of the hole exnihilation layer, the conductive layer and the transparent electrode layer may be formed by an atomic layer deposition. In the electrode structure, a transparent electrode formed of a degenerated n-type oxide semiconductor does not come in direct contact with a p-type semiconductor, and thus, annihilation or recombination of holes generated in the p-type semiconductor can be reduced, which increases the carrier generation efficiency.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: October 28, 2014
    Assignee: Veeco ALD Inc.
    Inventor: Sang In Lee
  • Patent number: 8866137
    Abstract: A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: October 21, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Won Lee, Woo Geun Lee, Kap Soo Yoon, Ki-Won Kim, Hyun-Jung Lee, Hee-Jun Byeon, Ji-Soo Oh
  • Patent number: 8859332
    Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers, in which a coating composition preparable from a mixture comprising at least one indium oxide precursor and at least one solvent and/or dispersion medium, in the sequence of points a) to d), a) is applied to a substrate, and b) the composition applied to the substrate is irradiated with electromagnetic radiation, c) optionally dried and d) converted thermally into an indium oxide-containing layer, where the indium oxide precursor is an indium halogen alkoxide of the generic formula InX(OR)2 where R is an alkyl radical and/or alkoxyalkyl radical and X is F, Cl, Br or I and the irradiation is carried out with electromagnetic radiation having significant fractions of radiation in the range of 170-210 nm and of 250-258 nm, to the indium oxide-containing layers producible with the process, and the use thereof.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: October 14, 2014
    Assignee: Evonik Degussa GmbH
    Inventors: Juergen Steiger, Duy Vu Pham, Heiko Thiem, Alexey Merkulov, Arne Hoppe
  • Patent number: 8853070
    Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: October 7, 2014
    Assignee: OTI Lumionics Inc.
    Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
  • Patent number: 8841164
    Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers from nonaqueous solution, in which an anhydrous composition containing at least one indium halogen alkoxide of the generic formula InX(OR)2 where R=alkyl radical and/or alkoxyalkyl radical and X=F, Cl, Br or I and at least one solvent or dispersion medium is, in the sequence of points a) to d), in anhydrous atmosphere, a) applied to the substrate, b) the composition applied to the substrate is irradiated with electromagnetic radiation of wavelength ?360 nm and c) optionally dried, and then d) converted thermally to an indium oxide-containing layer, to the layers producible by the process and to the use thereof.
    Type: Grant
    Filed: November 25, 2010
    Date of Patent: September 23, 2014
    Assignee: Evonik Degussa GmbH
    Inventors: Jürgen Steiger, Duy Vu Pham, Heiko Thiem, Alexey Merkulov, Arne Hoppe
  • Patent number: 8835215
    Abstract: A simple method is developed in the present invention for fabricating periodic ripple microstructures on the surface of an ITO film by using single-beam femtosecond laser pulses. The periodic ripple microstructures composed of self-organized nanodots can be directly fabricated through the irradiation of the femtosecond laser, without scanning. The ripple spacing of ˜800 nm, ˜400 nm and ˜200 nm observed in the periodic ripple microstructures can be attributed to the interference between the incident light and the scattering light of the femtosecond laser from the surface of the ITO film. In the present invention, the self-organized dots are formed by the constructive interference formed in the surface of the ITO film, where includes higher energy to break the In—O and Sn—O bonds and then form the In—In bonds. Therefore, the dots have higher surface current greater than other disconstructive regions of the ITO film.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: September 16, 2014
    Assignee: National Tsing Hua University
    Inventors: Jih-perng Leu, Chih-Wei Luo, Chih Wang, Jwo-Huei Jou
  • Patent number: 8822995
    Abstract: A display substrate includes a switching transistor electrically connected to a gate line and a data line, the data line extending in a first direction substantially perpendicular to the gate line extending in a second direction, the switching transistor including a switching active pattern comprising amorphous silicon, a driving transistor electrically connected to a driving voltage line and the switching transistor, the driving voltage line extended in the first direction, the driving transistor including a driving active pattern comprising a metal oxide; and a light-emitting element electrically connected to the driving transistor.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: September 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chun-Gi You, Kap-Soo Yoon, Gug-Rae Jo, Sung-Hoon Yang, Ki-Hun Jeong, Seung-Hwan Shim, Jae-Ho Choi
  • Patent number: 8766240
    Abstract: A permeation barrier film structure for organic electronic devices includes one or more bilayers having a hybrid permeation barrier composition. Each of the one or more bilayers includes a first region having a first composition corresponding to a first CF4—O2 Plasma Reactive Ion Etch Rate and a second region having a second composition corresponding to a second CF4—O2 Plasma Reactive Ion Etch Rate, wherein the second Etch Rate is greater than the first Etch Rate by a factor greater than 1.2 and the hybrid permeation barrier film is a homogeneous mixture of a polymeric material and a non-polymeric material, wherein the mixture is created from a single precursor material.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: July 1, 2014
    Assignee: Universal Display Corporation
    Inventors: Prashant Mandlik, Jeffrey Silvernail, Ruiqing Ma
  • Publication number: 20140159073
    Abstract: The present invention provides an array substrate and a method for manufacturing the same, and a display device. Wherein, after forming a pattern corresponding to a source/drain electrode layer, a transparent conducting layer is formed, and then a passivation layer is formed on the transparent conducting layer. Because the transparent conducting layer has a characteristic of anti-etching, it is hard to be damaged, so that the problem of damage of copper in the source/drain electrode layer is solved without increasing the process steps for forming the array substrate.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Xuehui ZHANG
  • Publication number: 20140144501
    Abstract: A method of fabricating a transparent electrode includes preparing conductive nanoparticles, preparing a metal oxide sol, mixing and reacting the conductive nanoparticles with the metal oxide sol to form a metal oxide solution including a metal oxide combined with the conductive nanoparticles, coating the metal oxide solution on a substrate, and performing an annealing process on the coated metal oxide solution.
    Type: Application
    Filed: June 18, 2013
    Publication date: May 29, 2014
    Inventors: Mi Hee Jung, Moo Jung Chu
  • Publication number: 20140145236
    Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.
    Type: Application
    Filed: April 13, 2012
    Publication date: May 29, 2014
    Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
  • Patent number: 8735195
    Abstract: Disclosed is a method of manufacturing a ZnO-based semiconductor device having at least p-type ZnO-based semiconductor layer, which includes a step of forming a contact metal layer on the p-type ZnO-based semiconductor layer wherein the contact metal layer contains at least one of Ni and Cu; and a step of performing heat treatment of the contact metal layer and the p-type ZnO-based semiconductor layer under an oxygen-free atmosphere to form a mixture layer including elements of the p-type ZnO-based semiconductor layer and the contact metal layer at a boundary region therebetween while maintaining a metal phase layer on a surface of the contact metal layer.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: May 27, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Naochika Horio
  • Publication number: 20140134838
    Abstract: Methods are generally provided for forming a conductive oxide layer on a substrate by sputtering a target to deposit a transparent conductive oxide layer (e.g., comprising comprises cadmium, tin, and oxygen) on the substrate; positioning an anneal surface in close proximity to the transparent conductive oxide layer (e.g., about 3 cm or less); and, annealing the transparent conductive oxide layer while the anneal surface is in close proximity to the transparent conductive oxide layer (e.g., at an anneal temperature of about 500° C. to about 700° C.) to create a localized cadmium vapor between the transparent conductive oxide layer and the anneal surface. The anneal surface can include a material reactive with oxygen at the anneal temperature. Apparatus is also provided for annealing a thin film layer on a substrate.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 15, 2014
    Applicant: PrimeStar Solar, Inc.
    Inventors: Robert Dwayne Gossman, Kali Nicole Osborn, Hongying Peng
  • Publication number: 20140124817
    Abstract: An electrical contact is formed on a III-V semiconductor comprising gallium. The contact is formed by depositing a first layer comprising In, Au, and a dopant on the surface of a III-V semiconductor and a second layer comprising a conductive oxide on the first layer. The deposited layers are annealed in an inert atmosphere. The annealing causes the formation of a Ga—Au compound at the interface between the III-V semiconductor and the first layer. At least a portion of the dopant migrates into the III-V semiconductor such that the dopant provides n-type or p-type conductivity to the III-V semiconductor. The specific contact resistivity between the III-V semiconductor and the second layer is less than about 10?5 ?cm2. The layers are further annealed in an oxidizing atmosphere such that the indium in the first layer is oxidized to form indium oxide.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: INTERMOLECULAR, INC.
    Inventor: Philip Kraus
  • Patent number: 8716047
    Abstract: When a p-layer 4 composed of GaN is maintained at ordinary temperature and TNO is sputtered thereon by an RF magnetron sputtering method, a laminated TNO layer 5 is in an amorphous state. Then, there is included a step of thermally treating the amorphous TNO layer in a reduced-pressure atmosphere where hydrogen gas is substantially absent to thereby crystallize the TNO layer. At the sputtering, an inert gas is passed through together with oxygen gas, and volume % of the oxygen gas contained in the gas passed through is 0.10 to 0.15%. In this regard, oxygen partial pressure is 5×10?3 Pa or lower. The temperature of the thermal treatment is 500° C. for about 1 hour.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: May 6, 2014
    Assignees: Toyoda Gosei Co., Ltd., Kanagawa Academy of Science and Technology
    Inventors: Koichi Goshonoo, Miki Moriyama, Taro Hitosugi, Tetsuya Hasegawa, Junpei Kasai
  • Patent number: 8710520
    Abstract: Disclosed is a light emitting diode having a multi-cell structure including a number of unit cells. The light emitting diode is capable of reducing light loss of the light emitting diode surface and improving light efficiency by bonding pads to be formed for contact between mesa etching regions for forming an electrode of the existing n-type semiconductor layers and p-type semiconductor layers. The light emitting diode is also capable of controlling chip size and manufacturing chips of different sizes from each other even when going through the same chip manufacturing process as the related art.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: April 29, 2014
    Assignee: Korea Photonics Technology Institute
    Inventors: Sang-Mook Kim, Jong-Hyeob Baek, Kwang-Cheol Lee, Eun-Mi Yoo
  • Patent number: 8658887
    Abstract: Provided in this invention is a low-cost substrate provided with a transparent conductive film for photoelectric conversion device, which can improve performance of the photoelectric conversion device by enhanced light confinement effect achieved with effectively increased surface unevenness of the substrate. A method for manufacturing said substrate and a photoelectric conversion device using said substrate which can show improved performance are also provided. The substrate provided with the transparent conductive film for the photoelectric conversion device comprises a transparent insulating substrate and a transparent electrode layer containing at least zinc oxide deposited on the transparent insulating substrate, wherein the transparent electrode layer is composed of a double layer structure wherein first and second transparent conductive films are deposited in this order from a substrate side.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: February 25, 2014
    Assignee: Kaneka Corporation
    Inventor: Yuko Tawada
  • Publication number: 20140034125
    Abstract: A method for creating electrically conducting or semiconducting patterns on a textured surface including plural reliefs of amplitude greater than or equal to 100 nanometers, including: preparing a substrate during which at least the textured surface of the substrate is made electrically conducting; coating during which at least one layer of an imprintable material is laid on the textured surface, made electrically conducting, of the substrate; pressing a mold including valleys or protrusions to transfer the valleys or the protrusions of the mold into the imprintable material to form patterns therein; removing the mold while leaving the imprint of the patterns in the imprintable material; exposing the textured surface, made electrically conducting, of the substrate, at a bottom of the patterns; and electrically depositing an electrically conducting or semiconducting material into the patterns to form conducting or semiconducting patterns.
    Type: Application
    Filed: March 5, 2012
    Publication date: February 6, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Carole Pernel, Nicolas Chaix, Stefan Landis
  • Patent number: 8624253
    Abstract: To improve the reliability of contact with an anisotropic conductive film in a semiconductor device such as a liquid crystal display panel, a terminal portion of a connecting wiring on an active matrix substrate is electrically connected to an FPC by an anisotropic conductive film. The connecting wiring is made of a lamination film of a metallic film and a transparent conductive film. In the connecting portion with the anisotropic conductive film, a side surface of the connecting wiring is covered with a protecting film made of an insulating material, thereby exposure to air of the metallic film can be avoided.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: January 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8592246
    Abstract: Methods of manufacturing a solar cell module are provided. The method may include forming lower electrodes on a substrate, forming a light absorption layer on the lower electrodes and the substrate, patterning the light absorption layer to form a trench exposing the lower electrodes, and forming window electrodes using a conductive film. The conductive film extends from a top surface of the light absorption layer to a bottom of the trench along one-sidewall of the trench and is divided at another-sidewall of the trench.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: November 26, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Rae-Man Park
  • Patent number: 8586392
    Abstract: A manufacturing method of a display device including a gate electrode film, a first electrode film, a second electrode film, and a conductive film connected to the first electrode film and formed of a conductive layer including a first conductive layer and a second conductive layer formed overlapping the first conductive layer. The method includes the steps of forming the first electrode film and the second electrode film, forming the conductive layer such that the conductive layer is connected to the first electrode film and the second electrode film, and forming the conductive film by removing regions other than predetermined regions of the conductive layer, wherein the conductive layer forming step includes the steps of forming the first conductive layer on the respective upper surfaces of the first electrode film and the second electrode film and forming the second conductive layer on the upper surface of the first conductive layer.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: November 19, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Jun Gotoh, Eisuke Hatakeyama, Kenji Anjo, Yoshitomo Ogishima
  • Publication number: 20130270600
    Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 17, 2013
    Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
  • Patent number: 8557404
    Abstract: A transparent conductive film for lamination on a substrate and comprising an ITO film and an FTO film, wherein a part or all of the crystal structure of a surface of the FTO film is orthorhombic, and a transparent conductive film for lamination on a substrate and comprising an ITO film and an FTO film, wherein the thickness of the FTO film is within a range from 5 nm to 20 nm and the FTO film is a continuous film. A method of producing the transparent conductive films includes depositing the ITO film on a substrate using a pyrosol process, and subsequently depositing the FTO film continuously on top of the ITO film.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: October 15, 2013
    Assignee: Nippon Soda Co., Ltd.
    Inventors: Shigeo Yamada, Tatsuya Ooashi
  • Publication number: 20130249094
    Abstract: The present invention discloses a method of preparing a transparent conducting oxide (TCO) film comprising the steps of: applying surface modified TCO nanoparticles onto a surface of a substrate; and cross-linking the surface modified TCO nanoparticles. The present invention also provides a transparent conducting oxide film prepared according to the method.
    Type: Application
    Filed: November 28, 2011
    Publication date: September 26, 2013
    Applicant: National University of Singapore
    Inventors: Hansong Cheng, Guo Qin Xu
  • Publication number: 20130242247
    Abstract: A liquid crystal display device includes: a first substrate; a second substrate spaced apart from the first substrate; and a plurality of liquid crystal molecules disposed between the first and second substrates. The first substrate includes a transparent substrate, an insulator layer formed on a surface of the transparent substrate and formed with a plurality of grooves, and a pixel electrode formed on a surface of the insulator layer and formed with a plurality of electrode slits.
    Type: Application
    Filed: December 26, 2012
    Publication date: September 19, 2013
    Applicants: CHIMEI INNOLUX CORPORATION, INNOCOM TECHNOLOGY (SHENZHEN) CO., LTD.
    Inventors: Hsin-Yu LEE, Ching-Che YANG, Ker-Yih KAO, Yu-Ju CHEN
  • Publication number: 20130221352
    Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers, in which a coating composition preparable from a mixture comprising at least one indium oxide precursor and at least one solvent and/or dispersion medium, in the sequence of points a) to d), a) is applied to a substrate, and b) the composition applied to the substrate is irradiated with electromagnetic radiation, c) optionally dried and d) converted thermally into an indium oxide-containing layer, where the indium oxide precursor is an indium halogen alkoxide of the generic formula InX(OR)2 where R is an alkyl radical and/or alkoxyalkyl radical and X is F, Cl, Br or I and the irradiation is carried out with electromagnetic radiation having significant fractions of radiation in the range of 170-210 nm and of 250-258 nm, to the indium oxide-containing layers producible with the process, and the use thereof.
    Type: Application
    Filed: October 26, 2011
    Publication date: August 29, 2013
    Applicant: Evonik Degussa GmbH
    Inventors: Juergen Steiger, Duy Vu Pham, Heiko Thiem, Alexey Merkulov, Arne Hoppe
  • Patent number: 8513118
    Abstract: It is intended to provide a production method that enables at least one of improvement in transparency, reduction in sheet resistance, homogenization in planar distribution of sheet resistance, and reduction in contact resistance related to a contact layer regarding a transparent conductive oxide film included in a compound semiconductor light-emitting device. A method for producing a compound semiconductor light-emitting device includes depositing on a substrate a compound semiconductor stacked-layer body including a light-emitting layer, depositing a transparent conductive oxide film on the compound semiconductor stacked-layer body, and annealing the transparent conductive oxide film and thereafter cooling the same in a vacuum atmosphere.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: August 20, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimi Tanimoto, Takanori Sonoda
  • Publication number: 20130203211
    Abstract: A method coats a substrate with an aluminum-doped zinc oxide. The method includes generating a nucleation coating between 5 nm and 400 nm thick and having zinc oxide or doped zinc oxide, in particular aluminum-doped zinc oxide, on a surface of a substrate by atomizing a solid target. A quasi-epitaxially propagating top coating is generated and contains an aluminum-doped zinc oxide on the nucleation coating and the top coating is wet chemically etched.
    Type: Application
    Filed: December 23, 2010
    Publication date: August 8, 2013
    Inventors: Volker Sittinger, Bernd Szyszka, Wilma Dewald, Frank Säuberlich, Bernd Stannowski