Abstract: Provided is a method for fabricating a liquid crystal display device integrated with a driver circuit on a substrate, a surface of the substrate being divided into a P-channel region, an N-channel region, and a pixel region.

Abstract: A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a TaxSi1−xNy film or a HfxSi1−xNy film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO2 film which are sequentially formed.

Abstract: A conductive metal oxide based layer on a substrate is prepared by chemically reducing a metal salt in aqueous solution, coating the resulting aqueous metal dispersion after washing onto a substrate, preferably glass, and subjecting the coated layer to an oxidizing treatment, e.g. a heat step. In a preferred embodiment the metal oxide is tin oxide, or a mixture of tin oxide and another metal oxide.

Abstract: Disclosed is an organic insulating layer that is formed on an insulating substrate for an LCD having a gate electrode, a semiconductor layer, and a source and drain electrode, and that is patterned to form a contact hole exposing the drain electrode. The organic insulating layer is treated with argon plasma to remove residues of the organic insulating layer and to increase its surface roughness. Next, a transparent insulating layer, such as an ITO layer, is deposited and patterned to form a pixel electrode connected to the drain electrode through the contact hole. By this method, contact resistance between the pixel electrode and the drain electrode is reduced. The transparent electrode pattern is prevented from being over-etched and undercut during wet etch patterning because the adhesion between the organic insulating layer and the transparent conducting layer is strengthened. As a result, the width uniformity of the transparent electrode pattern is increased.

Abstract: The present invention relates to a thin film transistor and a fabricating method thereof wherein a source/drain region and a gate electrode are formed in the same layer, which improves the degree of planarization. Because source/drain electrodes and a gate electrode are formed by patterning the same layer with a single mask, the invention reduces the number of fabrication steps. The TFT includes an insulated substrate which is transparent, a source electrode and a drain electrode on the insulated substrate. The source and drain electrodes are separated from each other, and a gate electrode is between the source and drain electrodes on the insulated substrate. A gate insulating layer covers the source and drain electrodes and the gate electrodes on the gate insulating layer. An active layer is then formed on the gate insulating layer. Source and drain regions are formed at each end of the active layer corresponding to the gate electrode and a channel region is formed between the source and drain regions.

Abstract: Transparent electrodes of a plasma display panel is patterned from a transparent conductive layer by using a lift-off technique; a photo-resist mask is roughened through exposure to oxygen plasma before the deposition of the transparent conductive layer, and the rough surface causes the photo-resist mask to be partially uncovered with the transparent conductive layer, thereby allowing photo-resist remover to rapidly penetrate into the boundary between the photo-resist mask and a glass substrate.

Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.

Abstract: The present invention relates to tinoxide thin film, a process for manufacturing thereof comprising the step of depositing tin while providing oxygen or ionized oxygen around a substrate, and relates to a gas detecting sensor prepared by the use of such tinoxide thin film.

Abstract: An electrical system, or a trigger circuit for use in connection with an electrical system, is disclosed. The electrical system includes a circuit element responsive to applied current, a power source for providing current to the circuit element, a substrate, and a substantially clear conductive composition arranged on or in associatin with the substrate for providing an electrical current path between the power source and the responsive circuit element.

Abstract: A wiring according to the present invention is made of a chromium layer and a chromium nitride layer. To make the wiring, a layer of chromium is deposited on a substrate, and then a layer of chromium nitride is deposited. A layer of photoresist is covered on the layer of chromium nitride and patterned, the layers of chromium and chromium nitride are wet etched in sequence using the photoresist pattern as a mask. Since the layer of chromium nitride is etched more quickly than the layer of chromium, the layer of photoresist and the layer of chromium are separated from each other and the chromium layer is isotropically etched to form a pattern having an edge with a gentle slope.

Abstract: A semiconductor device comprising a thin film transistor, and a process for fabricating the same, the process comprising: a first step of forming an island-like semiconductor layer, a gate insulating film covering the semiconductor layer, and a gate electrode comprising a material containing aluminum as the principal component formed on the gate insulating film; a second step of introducing impurities into the semiconductor layer in a self-aligned manner by using the gate electrode as the mask; a third step of forming an interlayer dielectric to cover the gate electrode, and forming a contact hole in at least one of source and drain; a fourth step of forming over the entire surface, a film containing aluminum as the principal component, and then forming an anodic oxide film by anodically oxidizing the film containing aluminum as the principal component; a fifth step of etching the film containing aluminum as the principal component and the anodic oxide film, thereby forming a second layer interconnection cont

Abstract: A method for producing an electro-optical device comprising a first photolithographic step of forming a transparent pixel electrode, a second photolithographic of forming a gate electrode and a gate wiring, a third photolithographic step of forming a contact holes in an insulator film leading to the pixel electrode and the gate wiring, a fourth photolithographic step of forming a source electrode and a drain electrode and a channel portion above the gate electrode, and a fifth photolithographic step of forming a contact hole in a passivation film and isolating the semiconductor active film below the source electrode, the drain electrode and the source wiring from other adjacent portions.The number of photolithographic steps can be reduced, to improve the yield and decrease the production cost adjacent thin film transistors.

Abstract: The present invention relates to semiconductor techniques using high dielectric oxides, more specifically to a thin film forming method for forming a thin film which is suitable as the electrodes of the oxide high dielectrics, a capacitor device using the oxide high dielectrics and a method for fabricating the same, an a semiconductor device using the capacitor device and a method for fabricating the semiconductor device. The capacitor device comprises at least one of a pair of electrodes which is formed of a material containing titanium nitride of (200) orientation. This permits the capacitor device to have good quality even in a case that the capacitor dielectric film is formed of a high dielectric thin film grown in an oxidizing atmosphere. The capacitor device includes the electrodes of titanium nitride film, whereby the electrodes can be patterned by RIE, which much improves processing precision of the electrode patterning, and throughputs.

Abstract: Methods of fabricating a liquid crystal display element on a substrate includes forming a thin film transistor on the substrate, the thin film transistor including a gate electrode covered by a channel region and a gate pad conductively connected to the gate electrode. A pad electrode is formed on the substrate, spaced apart from the gate pad. A portion of the gate pad and a portion of the pad electrode are exposed, and the exposed portion of the gate pad selectively plated to thereby form a conductive barrier layer on the exposed portion of the gate pad. A pixel electrode is then formed contacting the conductive barrier layer and the exposed portion of the pad electrode to thereby connect the gate pad and the pad electrode. Preferably, the selective plating includes electroless plating the exposed portion of the gate pad to thereby form the conductive barrier layer.

Abstract: A method for counteracting increases in resistivity encountered when Indium Oxide resistive layers are subjected to high temperature annealing steps during semiconductor device fabrication. The method utilizes a recovery annealing step which returns the Indium Oxide layer to its original resistivity after a high temperature annealing step has caused the resistivity to increase. The recovery anneal comprises heating the resistive layer to a temperature between 100.degree. C. and 300.degree. C. for a period of time that depends on the annealing temperature. The recovery is observed even when the Indium Oxide layer is sealed under a dielectric layer.

Abstract: Method for fabricating a liquid crystal display (LCD) suitable for enhancing its aperture ratio is disclosed, including the steps of forming a plurality of semiconductor layers on predetermined areas of a substrate and forming a first insulating layer on the entire surface of the substrate including the semiconductor layers, forming a plurality of gate lines on the first insulating layers to selectively overlap the semiconductor layers and implanting impurity ions into the semiconductor layers by using the gate lines as masks so as to form source and drain regions, forming a second insulating layer on the entire surface of the substrate including the gate lines and patterning the second insulating layer to expose a portion of each of the gate lines, forming a transparent conductive layer on the entire surface of the substrate including the gate lines and patterning the transparent conductive layer to form a storage electrode on the second insulating layer over each of pixel regions in contact with the exposed

Abstract: A process for stably producing a zinc oxide thin film by electrolysis with excellent adhesion to a substrate is described. In particular, a zinc oxide thin film suitably used as a light confining layer of a photoelectric conversion element is formed on a conductive substrate by applying a current between a conductive substrate immersed in an aqueous solution containing at least nitrate ions, zinc ions, and a carbohydrate, and an electrode immersed in the solution.

Abstract: A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a polymerized tin or indium alkoxide. The material is spread by spinning the substrate after applying the suspension. The carrier liquid and organic groups are removed by baking and curing at elevated temperatures, thereby depositing the conductive material on the substrate in a layer which is more planar than the substrate and which has regions of greater and lesser thickness. A relatively brief etch step removes conductive material from regions of lesser thickness, leaving material filling vias or contact holes.

Abstract: A method for producing an electo-optical device including only five photolithographic steps, including a first photolithographic step for forming a gate electrode and gate wiring, a second photolithographic step for forming a semiconductor portion above the gate electrode, a third photolithographic step for forming a contact hole through the first insulator film to the gate wiring, a fourth photolithographic step for forming a source electrode, a source wiring and a drain electrode and then forming a channel portion above the gate electrode exposing said semiconductor active film and forming a transparent pixel electrode, and a fifth photolithographic step for forming a light-permeable opening above the transparent pixel electrode, and a contact hole for source wiring and gate wiring connection terminals.

Abstract: A method for making a completely self-aligned thin film transistor panel of a liquid crystal display includes the steps of: forming a gate electrode on a transparent substrate; depositing sequentially a first insulating layer, a semiconductor protecting layer aligned with the gate electrode by patterning the second insulating layer; implanting ions into the semiconductor layer; depositing a conductive layer; patterning the conductive layer together with the semiconductor layer; forming a passivation layer including both a first opening and a second opening, forming a pixel electrode connected to the conductive layer through the second opening; etching the conductive layer by using both the pixel electrode and the passivation layer as a mask to form a source electrode and a drain electrode. The conductive layer and semiconductor layer are patterned in a single process step in the present invention, while the conductive layer and semiconductor layer are separately patterned in the conventional method.

Abstract: To efficiently mass-produce back reflectors which are inexpensive and have high reflectivity, the invention provides a manufacturing method for a solar cell comprising at least a metal layer having a texture structure and high reflectivity, a transparent layer, a semiconductor layer, and a transparent electrode which are formed on a substrate, wherein the metal layer consists of at least two layers formed as a first metal layer and a second metal layer. The method includes a step of, after forming the first metal layer, annealing the first metal layer before forming the second metal layer. The invention also provides a solar cell manufacturing apparatus having, upstream of a second metal layer forming chamber, a heating chamber in which the first metal layer can be annealed.

Abstract: A semiconductor device having i) a common opening 110 reaching a conductive region 105 through at least one conductive layer 107 and ii) another conductive layer 109 deposited in the opening 101, the conductive layer 107 and the conductive region 105 being electrically connected in the common opening 110. Also disclosed is a process comprising previously forming a plurality of conductive regions 105 and 107, thereafter forming an opening 110 that opens at the conductive regions, and depositing another conductive region 109 in the opening 110 to electrically connect the respective conductive regions in the opening. This can achieve a wiring connection structure that enables prevention of an increase in the number of masks used to form openings for wiring connection, an increase in the number of steps and an increase in the area held by openings, to thereby enhance the degree of integration of semiconductor devices.

Abstract: The conductive paste according to the present invention, used when forming an n-type layer formed on one surface of a p-type silicon semiconductor substrate and a conducting electrode, is characterized in that the conductive paste comprises silver powder, glass frit, silver phosphate and an organic vehicle, and the mixing ratio of the glass frit per 100 weight units of silver powder is within the range of not less than 1 weight unit and not more than 5 weight units and the mixing ratio of the silver phosphate per 100 weight units of silver powder is within the range of not less than 0.5 weight units and less than 5 weight units. As a result, a conductive paste with which large-scale reduction of the labor required when forming electrodes is obtained, a solar cell in which grid electrodes comprising this conductive paste are formed, and a fabrication method for the same are provided.

Abstract: A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a conductive film on an insulating film, forming growth nucleuses containing any of elements in group IIIb, group IVb, group Vb and group VIIb that does not constitute the conductive film and the insulating film on the surface of the conductive film, and growing a semiconductor selectively on growth nucleuses.