Abstract: Embodiments of the present invention provide apparatus and method for improving gas distribution during thermal processing. One embodiment of the present invention provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, a substrate support disposed in the processing volume, wherein the substrate support is configured to support and rotate the substrate, a gas inlet assembly coupled to an inlet of the chamber body and configured to provide a first gas flow to the processing volume, and an exhaust assembly coupled to an outlet of the chamber body, wherein the gas inlet assembly and the exhaust assembly are disposed on opposite sides of the chamber body, and the exhaust assembly defines an exhaust volume configured to extend the processing volume.

Abstract: Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

Abstract: A method of designing a shower plate for a plasma CVD apparatus includes (a) providing a shower plate having a convex surface configured by a convex equation; (b) forming a film on a wafer using the shower plate in the plasma CVD apparatus; (c) determining a distribution of thickness of the film formed on the wafer by dividing a diametrical cross section of the film into multiple regions; (d) determining at least one secondary equation; and (e) designing a surface configuration of the shower plate by overlaying the secondary equation on the convex equation.

Abstract: The present invention provides an MIM capacitor using a high-k dielectric film preventing degradation of breakdown field strength of the MIM capacitor and suppressing the increase of the leakage current. The MIM capacitor comprises a first metal interconnect, a fabricated capacitance film, a fabricated upper electrode, and a third metal interconnect. The MIM capacitor is realized by forming an interlayer dielectric film comprising silicon oxide so as to cover the first metal interconnect, then forming a first opening in the interlayer dielectric film to a region corresponding to a via hole layer in the interlayer dielectric film just above the first metal interconnect so as not to expose the upper surface of the first metal interconnect, then forming a second opening to the inside of the first opening so as to expose the surface of the first metal interconnect and then forming a capacitance film and a third metal interconnect.

Abstract: Improved methods for depositing low resistivity tungsten films are provided. The methods involve depositing a tungsten nucleation layer on a substrate and then depositing a tungsten bulk layer over the tungsten nucleation layer to form the tungsten film. The methods provide precise control of the nucleation layer thickness and improved step coverage. According to various embodiments, the methods involve controlling thickness and/or improving step coverage by exposing the substrate to pulse nucleation layer (PNL) cycles at low temperature. Also in some embodiments, the methods may improve resistivity by using a high temperature PNL cycle of a boron-containing species and a tungsten-containing precursor to finish forming the tungsten nucleation layer.

Abstract: A method of fabricating a two-terminal semiconductor component using a trench technique is disclosed that includes forming a trench by etching an etching pattern formed on a substrate on which an active layer having impurities added is grown, forming a front metal layer on a front upper surface of the substrate by using an evaporation method or a sputtering method after removing the etching pattern, forming a metal plated layer on the front surface of the substrate on which the front metal layer is formed, polishing a lower surface of the substrate by using at least one of a mechanical polishing method and a chemical polishing method until the front metal layer is exposed, forming a rear metal layer on the polished substrate, and removing each component by using at least one of a dry etching method and a wet etching method.

Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.

Abstract: Disclosed are ruthenium-containing precursors and methods of using the same in CVD and ALD.

Abstract: A structure, tool and method for forming in-situ metallic/dielectric caps for interconnects. The method includes forming wire embedded in a dielectric layer on a semiconductor substrate, the wire comprising a copper core and an electrically conductive liner on sidewalls and a bottom of the copper core, a top surface of the wire coplanar with a top surface of the dielectric layer; forming a metal cap on an entire top surface of the copper core; without exposing the substrate to oxygen, forming a dielectric cap over the metal cap, any exposed portions of the liner, and the dielectric layer; and wherein the dielectric cap is an oxygen diffusion barrier and contains no oxygen atoms.

Abstract: An atomic layer deposition method includes providing a semiconductor substrate within a deposition chamber. A first metal halide-comprising precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. The first monolayer comprises metal and halogen of the metal halide. While flowing the first metal halide-comprising precursor gas to the substrate, H2 is flowed to the substrate within the chamber. A second precursor gas is flowed to the first monolayer effective to react with the first monolayer and form a second monolayer on the substrate. The second monolayer comprises the metal. At least some of the flowing of the first metal halide-comprising precursor gas, at least some of the flowing of the H2, and at least some of the flowing of the second precursor gas are repeated effective to form a layer of material comprising the metal on the substrate.

Abstract: A film deposition apparatus for depositing a film on a substrate by performing a cycle of alternately supplying at least two kinds of reaction gases that react with each other on the substrate to produce a layer of a reaction product in a vacuum chamber is disclosed. The film deposition apparatus includes a ring-shaped locking member that may be provided in or around a wafer receiving portion of a turntable in which the substrate is placed, in order to keep the substrate in the substrate receiving portion.

Abstract: Embodiments of the invention provide a method for depositing tungsten-containing materials. In one embodiment, a method includes forming a tungsten nucleation layer over an underlayer disposed on the substrate while sequentially providing a tungsten precursor and a reducing gas into a process chamber during an atomic layer deposition (ALD) process and depositing a tungsten bulk layer over the tungsten nucleation layer, wherein the reducing gas contains hydrogen gas and a hydride compound (e.g., diborane) and has a hydrogen/hydride flow rate ratio of about 500:1 or greater. In some examples, the method includes flowing the hydrogen gas into the process chamber at a flow rate within a range from about 1 slm to about 20 slm and flowing a mixture of the hydride compound and a carrier gas into the process chamber at a flow rate within a range from about 50 sccm to about 500 sccm.

Abstract: A method for forming a tantalum-containing layer on a substrate, the method comprising at least the steps of: a) providing a vapor comprising at least one precursor compound of the formula Cp(R1)mTa(NR22)2(?NR3) (I): wherein: R1 is an organic ligand, each one independently selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atoms; R2 is an organic ligand, each one independently selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atoms; R3 is an organic ligand selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atoms; b) reacting the vapor comprising the at least one compound of formula (I) with the substrate, according to an atomic layer deposition process, to form a layer of a tantalum-containing complex on at least one surface of said substrate.

Abstract: A method for fabricating a semiconductor package, includes the steps of forming a first terminal at a first substrate; mixing a polymer resin and solder particles to provide a mixture; covering at least one of an upper surface and side surfaces of the first terminal with the mixture; and heating the first substrate at a temperature higher than a melting point of the solder particles of the mixture to form a solder layer that covers the at least one of an upper surface and a side surface of the first terminal. The solder particles flow or diffuse toward the terminal in the heated polymer resin to adhere to at least some of the exposed surfaces of the terminal thereby forming the solder layer. The solder layer improves the adhesive strength between the terminals of the semiconductor chip and the substrate in the subsequent flip chip bonding process.

Abstract: An atomic-layer-deposition process for forming a patterned thin film comprising providing a substrate, applying a deposition inhibitor material to the substrate, wherein the deposition inhibitor material is an organic compound or polymer; and patterning the deposition inhibitor material either after step (b) or simultaneously with applying the deposition inhibitor material to provide selected areas of the substrate effectively not having the deposition inhibitor material. An inorganic thin film material is substantially deposited only in the selected areas of the substrate not having the deposition inhibitor material.

Abstract: A solar cell fabrication process is described that includes etching a cap layer into a front surface of a semiconductor structure, depositing an anti-reflective coating onto the front surface of the semiconductor structure, forming a front electrical contact on the front surface of the semiconductor structure, forming a first back metal contact on a back surface of the semiconductor structure, utilizing a plasma enhanced chemical vapor deposition (PECVD) process to apply a dielectric layer to the first back metal contact, the PECVD process performed at within a temperature environment and for a duration that allows for the annealing of metal associated with the front electrical contact and the first back metal contact, and attaching at least one secondary electrical contact to the dielectric layer.

Abstract: A method for manufacturing a semiconductor device is disclosed. In one embodiment, the method includes attaching a carrier to a substrate including a via to form a pressurized sealed cavity between the carrier and the substrate. The method may also include thinning the substrate attached to the carrier and forming a redistribution layer on the thinned substrate in electrical communication with the via, the redistribution layer including a conductive layer formed through atmospheric pressure chemical vapor deposition. Additional methods, devices, and systems are devices, systems, and methods are also disclosed.

Abstract: Disclosed is a method for making a silicon quantum dot planar concentrating solar cell. At first, silicon nitride or silicon oxide mixed with silicon quantum dots is provided on a transparent substrate. By piling, there is formed a planar optical waveguide for concentrating sunlit into a small dot cast on a small solar cell.

Abstract: A method for carrying out a replacement metal gate process comprises providing a transistor in a reactor, wherein the transistor includes a gate stack, removing at least a portion of the gate stack to expose a surface of a barrier layer, causing a temperature of the reactor be less than or equal to 150° C., introducing methylpyrrolidine:alane (MPA) proximate to the surface of the barrier layer, and carrying out a CVD process to deposit aluminum metal on the barrier layer using a bottom-up deposition mechanism.

Abstract: A predicted film formation rate value is computed based on a film formation rate prediction formula obtained in advance and apparatus parameters obtained during a previously-performed film formation process. A processing time required for an amount of film formed on a wafer to reach a predetermined target film thickness is computed based on the computed predicted film formation rate value and the target film thickness. Then, according to the computed processing time, a film-formation process is performed on wafers. In addition, it is determined whether the computed predicted film formation rate value is within a predetermined range, and only when it is determined to be within the predetermined range, the film formation process may be performed.

Abstract: A method is disclosed that uses solid precursors for semiconductor processing. A solid precursor is provided in a storage container. The solid precursor is transformed into a liquid state in the storage container. The liquid state precursor is transported from the storage container to a liquid holding container. The liquid state precursor is transported from the liquid holding container to a reaction chamber. The molten precursor allows the precursor to be metered in the liquid state. The storage container can be heated only when necessary to replenish the liquid holding container, thereby reducing the possibility of thermal decomposition of the precursor.

Abstract: The present invention relates to a method for metallizing semiconductor components in which aluminium is used. In particular in the case of products in which the process costs play a big part, such as e.g. solar cells based on silicon, a cost advantage can be achieved with the invention. In addition, the present invention relates to the use of the method, for example in the production of solar cells.

Abstract: An apparatus and method for holding a semiconductor device in a wafer. A bar is connected to the wafer. A first sidewall comprises a first end and a second, and is connected to the bar at its first end. A first tab comprises a first end and a second end, and is connected to the second end of the first sidewall at its first end and connected to the first side of the semiconductor device at its second end. The thickness of the first tab is less than the thickness of the bar and the thickness of the first sidewall.

Abstract: A chemical vapor deposition method such as an atomic-layer-deposition method for forming a patterned thin film includes applying a deposition inhibitor material to a substrate. The deposition inhibitor material is a hydrophilic polymer that is soluble in an aqueous solution comprising at least 50 weight % water and has an acid content of less than 2.5 meq/g of polymer. The deposition inhibitor material is patterned simultaneously or subsequently to its application to the substrate, to provide selected areas of the substrate effectively not having the deposition inhibitor material. A thin film is substantially deposited only in the selected areas of the substrate not having the deposition inhibitor material.

Abstract: Compound of the formula Cp(R1)mM(NR22)2(?NR3) (I): Wherein: M is a metal independently selected from Vanadium (V) or Niobium (Nb) and m?5; R1 is an organic ligand, each one independently selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atom; R2 is an organic ligand, each one independently selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atom; R3 is an organic ligand selected in the group consisting of H, linear or branched hydrocarbyl radical comprising from 1 to 6 carbon atom.

Abstract: Provided are a substrate processing apparatus and a method of manufacturing a semiconductor device which are able to form a conductive film, which is dense, includes a low concentration of source-derived impurities and has low resistivity, at a higher film-forming rate. The substrate processing apparatus includes a processing chamber configured to stack and accommodate a plurality of substrates; a first processing gas supply system configured to supply a first processing gas into the processing chamber; a second processing gas supply system configured to supply a second processing gas into the processing chamber; and a control unit configured to control the first processing gas supply system and the second processing gas supply system.

Abstract: A method of manufacturing a semiconductor device and a substrate processing apparatus capable of providing a TiN film that is higher in quality than a TiN film formed by a conventional CVD method at a higher film-forming rate, that is, with a higher productivity than a TiN film formed by an ALD method.

Abstract: An atomic layer deposition method includes providing a semiconductor substrate within a deposition chamber. A first metal halide-comprising precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. The first monolayer comprises metal and halogen of the metal halide. While flowing the first metal halide-comprising precursor gas to the substrate, H2 is flowed to the substrate within the chamber. A second precursor gas is flowed to the first monolayer effective to react with the first monolayer and form a second monolayer on the substrate. The second monolayer comprises the metal. At least some of the flowing of the first metal halide-comprising precursor gas, at least some of the flowing of the H2, and at least some of the flowing of the second precursor gas are repeated effective to form a layer of material comprising the metal on the substrate.

Abstract: A method of manufacturing a phase-change random access memory device includes forming an interlayer insulating film on a semiconductor substrate, on which a bottom structure is formed, and patterning the interlayer insulating film to form a contact hole, forming a spacer on the side wall of the contact hole; forming a dielectric layer in the contact hole, and removing the spacer to form a bottom electrode contact hole. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.

Abstract: The present invention in one embodiment provides a method of manufacturing an electrode that includes providing at least one metal stud positioned in a via extending into a first dielectric layer, wherein an electrically conductive liner is positioned between at least a sidewall of the via and the at least one metal stud; recessing an upper surface of the at least one metal stud below an upper surface of the first dielectric layer to provide at least one recessed metal stud; and forming a second dielectric atop the at least one recessed metal stud, wherein an upper surface of the electrically conductive liner is exposed.

Abstract: The present invention relates to a room temperature-operating single-electron device and a fabrication method thereof, and more particularly, to a room temperature-operating single-electron device in which a plurality of metal silicide dots formed serially is used as multiple quantum dots, and a fabrication method thereof.

Abstract: Disclosed herein are methods of preparing and using doped MWNT electrodes, sensors and field-effect transistors. Devices incorporating doped MWNT electrodes, sensors and field-effect transistors are also disclosed.

Abstract: A method of processing semiconductor substrates includes: depositing a film on a substrate in a reaction chamber; evacuating the reaction chamber without purging the reaction chamber; opening a gate valve and replacing the substrate with a next substrate via the transfer chamber wherein the pressure of the transfer chamber is controlled to be higher than that of the reaction chamber before and while the gate valve is opened; repeating the above steps and removing the substrate from the reaction chamber; and purging and evacuating the reaction chamber, and cleaning the reaction chamber with a cleaning gas.

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle.

Abstract: A method is provided for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor. The method deposits a Si semiconductor layer between a bottom electrode and a top electrode, and forms a MSM diode having a threshold voltage, breakdown voltage, and on/off current ratio. The method is able to modify the threshold voltage, breakdown voltage, and on/off current ratio of the MSM diode in response to controlling the Si semiconductor layer thickness. Generally, both the threshold and breakdown voltage are increased in response to increasing the Si thickness. With respect to the on/off current ratio, there is an optimal thickness. The method is able to form an amorphous Si (a-Si) and polycrystalline Si (polySi) semiconductor layer using either chemical vapor deposition (CVD) or DC sputtering. The Si semiconductor can be doped with a Group V donor material, which decreases the threshold voltage and increases the breakdown voltage.

Abstract: A method of increasing the haze of a coating stack having a top layer and an undercoating layer using a chemical vapor deposition coating process includes at least one of: increasing a precursor flow rate; decreasing a carrier gas flow rate; increasing a substrate temperature; increasing a water flow rate; decreasing an exhaust flow rate; and increasing a thickness of at least one of the top layer or undercoating layer.

Abstract: Recessed features on a Damascene substrate are filled with metal using plasma PVD. Recessed features having widths of less than about 300 nm, e.g., between about 30-300 nm can be filled with metals (e.g., copper and aluminum), without forming voids. In one approach, the deposition is performed by exposing the substrate to a high-density plasma characterized by high fractional ionization of metal. Under these conditions, the metal is deposited within the recess, without forming large overhang at the opening of the recess. In some embodiments, the metal is deposited within the recess, while diffusion barrier material is simultaneously etched from the field region. In a second approach, recessed features are filled by performing a plurality of profiling cycles, wherein each cycle includes a net etching and a net depositing operation. Etching and depositing parameters are adjusted such that the recessed features are filled without forming overhangs and voids.

Abstract: Embodiments of the invention provide an improved process for depositing tungsten-containing materials. The process utilizes soak processes and vapor deposition processes, such as atomic layer deposition (ALD) to provide tungsten films having significantly improved surface uniformity and production level throughput. In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes positioning a substrate within a process chamber, wherein the substrate contains an underlayer disposed thereon, exposing the substrate sequentially to a tungsten precursor and a reducing gas to deposit a tungsten nucleation layer on the underlayer during an ALD process, wherein the reducing gas contains a hydrogen/hydride flow rate ratio of about 40:1, 100:1, 500:1, 800:1, 1,000:1, or greater, and depositing a tungsten bulk layer on the tungsten nucleation layer. The reducing gas contains a hydride compound, such as diborane, silane, or disilane.

Abstract: A method of manufacturing a semiconductor structure is provided. The method includes forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions; forming a trench in the semiconductor substrate within an opening defined by the hard mask pattern; filling the trench with a dielectric material, resulting in a trench isolation feature; performing an ion implantation to the trench isolation feature using the hard mask pattern to protect active regions of the semiconductor substrate; and removing the hard mask pattern after the performing of the ion implantation.

Abstract: This invention relates to silicon precursor compositions for forming silicon-containing films by low temperature (e.g., <300° C.) chemical vapor deposition processes for fabrication of ULSI devices and device structures. Such silicon precursor compositions comprise at least one disilane derivative compound that is fully substituted with alkylamino and/or dialkylamino functional groups.

Abstract: The present invention addresses this need by providing methods for depositing low resistivity tungsten films in small features and features having high aspect ratios. The methods involve depositing very thin tungsten nucleation layers by pulsed nucleation layer (PNL) processes and then using chemical vapor deposition (CVD) to deposit a tungsten layer to fill the feature. Depositing the tungsten nucleation layer involves exposing the substrate to alternating pulses of a boron-containing reducing agent and a tungsten-containing precursor without using any hydrogen gas, e.g., as a carrier or background gas. Using this process, a conformal tungsten nucleation layer can be deposited to a thickness as small as about 10 Angstroms. The feature may then be wholly or partially filled with tungsten by a hydrogen reduction chemical vapor deposition process. Resistivities of about 14 ??-cm for a 500 Angstrom film may be obtained.

Abstract: An apparatus for supplying electrical power to a movable member. The apparatus includes a fixed member, the movable member moving relative to the fixed member, a flexible wiring member having an end connected to the movable member and another end connected to the fixed member, configured to transmit the electrical power from the fixed member to the movable member, and a cooling member configured to cool the fixed member.

Abstract: A method including providing a semiconductor substrate in a reaction chamber; flowing a first reactant including silicon and oxygen, a boron dopant and a phosphorus dopant into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate; stopping the flow of the first reactant, boron dopant and phosphorus dopant into the reaction chamber and so that a phosphorus dopant and boron dopant rich film is deposited over the layer of BPTEOS; and reducing the film comprising exposing the film to an O2 plasma.

Abstract: The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for manufacturing a semiconductor epitaxial crystal substrate in which a dielectric layer of a nitride dielectric material or an oxide dielectric material in an amorphous form functioning as a passivation film or a gate insulator is provided on a surface of a nitride semiconductor crystal layer grown by metal organic chemical vapor deposition. In the method, after the nitride semiconductor crystal layer is grown in an epitaxial growth chamber, the dielectric layer is grown on the nitride semiconductor crystal layer in the epitaxial growth chamber.

Abstract: A virtual ground array structure uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities and smaller packaging.

Abstract: Disclosed is a method of manufacturing a semiconductor device. The method includes forming an oxide-nitride-oxide (ONO) layer over a semiconductor substrate, and forming a recess over the semiconductor substrate by etching the ONO layer, forming a vertical structure pattern being higher than the ONO layer over the recess, sequentially forming a spacer oxide film and a first gate poly over the side wall of the vertical structure pattern, and forming a nitride film spacer at a partial region of the side wall of the first gate poly, removing the nitride film spacer, and forming a second gate poly in a spacer shape over the side wall of the first gate poly, and forming a first split gate and a second split gate, symmetrically divided from each other, by removing the vertical structure pattern.

Abstract: A method for depositing a single crystalline silicon film comprises: providing a substrate disposed within a chamber; introducing to the chamber under chemical vapor deposition conditions a silicon precursor, a chlorine-containing etchant and an inhibitor source for decelerating reactions between the silicon precursor and the chlorine-containing etchant; and selectively depositing a doped crystalline Si-containing film onto the substrate.

Abstract: A method of directly depositing a polysilicon film at a low temperature is disclosed. The method comprises providing a substrate and performing a sequential deposition process. The sequential deposition process comprises first and second deposition steps. In the first deposition step, a first bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a first polysilicon sub-layer on the substrate. In the second deposition step, a second bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a second polysilicon sub-layer on the first sub-layer. The first and second sub-layers constitute the polysilicon film, and the first bias voltage differs from the second bias voltage.

Abstract: There are provided a method of manufacturing a semiconductor device and a substrate processing apparatus, which are designed to prevent deterioration of the surface morphology of a Ni-containing film caused by dependence on an under layer, and to form a continuous film in a thin-film region. The method includes: loading a substrate into a process vessel; heating the substrate in the process vessel; pretreating the heated substrate by supplying a reducing gas into the process vessel and exhausting the reducing gas; removing the reducing gas remaining in the process vessel by supplying an inert gas into the process vessel and exhausting the inert gas; forming a nickel-containing film on the heated and pretreated substrate to a predetermined thickness by supplying a nickel-containing source into the process vessel and exhausting the nickel-containing source; and unloading the substrate from the process vessel.

Abstract: A deposition apparatus includes: a first electrode for placing a processing object; a second electrode for generating plasma with the first electrode, the second electrode being opposed to the first electrode; and a heat flow control heat transfer part for drawing heat from the processing object to generate a heat flow from a central area to a peripheral area of the processing object.