Abstract: A resistive memory device having an in-situ nitride initiation layer is disclosed. The nitride initiation layer is formed above the first electrode, and the metal oxide switching layer is formed above the nitride initiation layer to prevent oxidation of the first electrode. The nitride initiation layer may be a metal nitride layer that is formed by atomic layer deposition in the same chamber in which the metal oxide switching layer is formed. The nitride initiation layer and metal oxide switching layer may alternatively be formed in a chemical vapor deposition (CVD) chamber or a physical vapor deposition (PVD) chamber.

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.

Abstract: Metal gate high-k capacitor structures with lithography patterning are used to extract gate work function using a combinatorial workflow. Oxide terracing, together with high productivity combinatorial process flow for metal deposition can provide optimum high-k gate dielectric and metal gate solutions for high performance logic transistors. The high productivity combinatorial technique can provide an evaluation of effective work function for given high-k dielectric metal gate stacks for PMOS and NMOS transistors, which is critical in identifying and selecting the right materials.

Abstract: A method of processing a substrate includes performing a first exposure that comprises generating a plasma containing reactive gas ions in a plasma chamber and generating a bias voltage between the substrate and the plasma chamber. The method also includes providing a plasma sheath modifier having an aperture disposed between the plasma and substrate and operable to direct the reactive gas ions toward the substrate, and establishing a pressure differential between the plasma chamber and substrate region while the reactive gas ions are directed onto the substrate.

Abstract: When forming high-k metal gate electrode structures in a semiconductor device on the basis of a basic transistor design, undue exposure of sensitive materials at end portions of the gate electrode structures of N-channel transistors may be avoided, for instance, prior to and upon incorporating a strain-inducing semiconductor material into the active region of P-channel transistors, thereby contributing to superior production yield for predefined transistor characteristics and performance.

Abstract: A film forming method includes mounting a substrate on a mounting member after loading the substrate into a reaction chamber, adsorbing a compound of a first metal on a surface of the substrate by supplying a source gas containing the compound of the first metal into the reaction chamber, reducing the compound of the first metal adsorbed on the substrate by making a reducing gas contact therewith to thereby obtain a first metal layer, and alloying the first metal and a second metal to obtain an alloy layer of the first metal and the second metal by injecting the second metal into the first metal layer. The second metal is ejected from a target electrode facing the substrate by making a sputtering plasma contact with the target electrode, and at least a surface of the target electrode is formed of the second metal different from the first metal.

Abstract: Provided are atomic layer deposition methods to deposit a tungsten film or tungsten-containing film using a tungsten-containing reactive gas comprising one or more of tungsten pentachloride, a compound with the empirical formula WCl5 or WCl6.

Abstract: A method for spalling local areas of a base substrate utilizing at least one stressor layer portion which is located on a portion, but not all, of an uppermost surface of a base substrate. The method includes providing a base substrate having a uniform thickness and a planar uppermost surface spanning across an entirety of the base substrate. At least one stressor layer portion having a shape is formed on at least a portion, but not all, of the uppermost surface of the base substrate. Spalling is performed which removes a material layer portion from the base substrate and provides a remaining base substrate portion. The material layer portion has the shape of the at least one stressor layer portion, while the remaining base substrate portion has at least one opening located therein which correlates to the shape of the at least one stressor layer.

Abstract: A base material is placed on a base material placement face of a base material placement table. An inductively coupled plasma torch unit is structured with a cylindrical chamber structured with a cylinder made of an insulating material and provided with a rectangular slit-like plasma jet port, and lids closing opposing ends of the cylinder, a gas jet port that supplies gas into the cylindrical chamber, and a solenoid coil that generates a high frequency electromagnetic field in the cylindrical chamber. By a high frequency power supply supplying a high frequency power to the solenoid coil, plasma is generated in the cylindrical chamber, and the plasma is emitted from the plasma jet port to the base material. While relatively shifting the plasma torch unit and the base material placement table, a base material surface can be subjected to heat treatment.

Abstract: According to one embodiment of the invention, the gate contact is formed by a selective deposition on the gate electrode. One acceptable technique for the selective deposition is by plating. Plating is one process by which a metal structure, such as a gate contact, may be formed directly on the gate electrode. The plating is carried out by immersing the semiconductor die in a plating solution with the gate electrode exposed. The gate contact is plated onto the gate electrode and thus is ensured of being fully aligned exactly to the gate electrode. After this, the appropriate dielectric layers are formed adjacent the gate contact and over the source and drain to ensure that the gate electrode is electrically isolated from other components of the transistor.

Abstract: A tray for film formation by a CVD method includes a tray main body (2) and a supporting member (3) mounted on the tray main body (2) for supporting a silicon wafer (5). The supporting member (3) has a holding portion (3c), on which the silicon wafer (5) is directly placed. The holding portion (3c) has its lower surface (3d) apart from a surface (2a) of the tray main body that is opposed to and apart from the supported silicon wafer (5), whereby the thickness distribution of an oxide film formed on the silicon wafer can be made uniform. The tray has a structure for reducing a contact area between the supporting member (3) and the tray main body (2), with the holding portion (3c) having a tilted surface with its inner circumferential side closer to the tray main body surface (2a) that is opposed to the silicon wafer.

Abstract: A method of manufacturing graphene includes forming a germanium layer on a surface of a substrate, and forming the graphene directly on the germanium layer by supplying carbon-containing gas into a chamber in which the substrate is disposed.

Abstract: The method includes a step of forming a mask having an opening, for forming an opening in multiple insulating films, above a semiconductor substrate on which a member becoming a first insulating film, a member becoming a second insulating film being different from the member becoming the first insulating film, a member becoming a third insulating film, and a member becoming a fourth insulating film being different from the member becoming the third insulating film are stacked in this order; a first step of continuously removing the member becoming the fourth insulating film and the member becoming the third insulating film at a portion corresponding to the opening of the mask; and a second step of removing the member becoming the second insulating film, after the first step, at a portion corresponding to the opening of the mask.

Abstract: An integrated tool to reduce defects in manufacturing a semiconductor device by reducing queue times during a manufacturing process. The integrated tool may include at least one a polishing tool comprising at least one polishing module and at least one deposition tool comprising at least one deposition chamber. At least one pump-down chamber may connect the polishing tool to the deposition tool. The at least one pump-down chamber includes a passage through which the semiconductor device is passed. Defects in the semiconductor device are reduced by reducing the queue time at various stages of the fabrication process.

Abstract: Methods of producing low resistivity tungsten bulk layers having low roughness and associated apparatus are provided. According to various embodiments, the methods involve CVD deposition of tungsten at high pressures and/or high temperatures. In some embodiments, the CVD deposition occurs in the presence of alternating nitrogen gas pulses, such that alternating portions of the film are deposited by CVD in the absence of nitrogen and in the presence of nitrogen.

Abstract: An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of about 3.0 or less. The dielectric material has at least one conductive material embedded therein. A noble metal cap is located directly on an upper surface of the at least one conductive region. The noble metal cap does not substantially extend onto an upper surface of the dielectric material that is adjacent to the at least one conductive region, and the noble cap material does not be deposited on the dielectric surface. A method fabricating such an interconnect structure utilizing a low temperature (about 300° C. or less) chemical deposition process is also provided.

Abstract: A vapor deposition method of the present invention includes the steps of (i) preparing a mask unit including a shadow mask (81) and a vapor deposition source (85) fixed in position relative to each other, (ii) while moving at least one of the mask unit and the film formation substrate (200) relative to the other, depositing a vapor deposition flow, emitted from the vapor deposition source (85), onto a vapor deposition region (210), and (iii) adjusting the position of a second shutter (111) so that the second shutter (111) blocks a vapor deposition flow traveling toward the vapor deposition unnecessary region (210).

Abstract: Method for depositing a layer on a surface of a substrate. The method comprises injecting a precursor gas from a precursor supply into a deposition cavity for contacting the substrate surface, draining part of the injected precursor gas from the deposition cavity, and positioning the deposition cavity and the substrate relative to each other along a plane of the substrate surface. The method further comprising providing a first electrode and a second electrode, positioning the first electrode and the substrate relative to each other, and generating a plasma discharge near the substrate for contacting the substrate by generating a high-voltage difference between the first electrode and the second electrode. The method comprises generating the plasma discharge selectively, for patterning the surface by means of the plasma. A portion of the substrate contacted by the precursor gas selectively overlaps with a portion of the substrate contacted by the plasma.

Abstract: The present invention provides a process for the deposition of a iridium containing film on a substrate, the process comprising the steps of providing at least one substrate in a reactor; introducing into the reactor at least one iridium containing precursor having the formula: XIrYA, wherein A is equal to 1 or 2 and i) when A is 1, X is a dienyl ligand and Y is a diene ligand; ii) when A is 2, a) X is a dienyl ligand and Y is selected from CO and an ethylene ligand, b) X is a ligand selected from H, alkyl, alkylamides, alkoxides, alkylsilyls, alkylsilylamides, alkylamino, and fluoroalkyl and each Y is a diene ligand, and c) X is a dienyl ligand and Y is a diene ligand; reacting the at least one iridium containing precursor in the reactor at a temperature equal to or greater than 100° C.; and depositing an iridium containing film formed from the reaction of the at least one iridium containing precursor onto the at least one substrate.

Abstract: Disclosed is a producing method of a semiconductor device, comprising: loading a substrate into a reaction furnace; forming a film on the substrate in the reaction furnace; unloading the substrate from the reaction furnace after the film has been formed; and forcibly cooling an interior of the reaction furnace in a state where the substrate does not exist in the reaction furnace after the substrate has been unloaded.

Abstract: Top-down methods of increasing reflectivity of tungsten films to form films having high reflectivity, low resistivity and low roughness are provided. The methods involve bulk deposition of tungsten followed by a removing a top portion of the deposited tungsten. In particular embodiments, removing a top portion of the deposited tungsten involve exposing it to a fluorine-containing plasma. The methods produce low resistivity tungsten bulk layers having lower roughness and higher reflectivity. The smooth and highly reflective tungsten layers are easier to photopattern than conventional low resistivity tungsten films. Applications include forming tungsten bit lines.

Abstract: A method for forming a tungsten film includes forming a tungsten nucleation layer having an amorphous-phase or a ?-phase over a semiconductor substrate. A first tungsten layer having a crystalline ?-phase is then formed over the tungsten nucleation layer to form a low resistivity tungsten film. A second tungsten layer is formed over the first tungsten layer by a physical vapor deposition process, and the second tungsten layer has a large grain size similar to that of the low resistivity tungsten film. The tungsten film has both good surface roughness and low resistivity, thus enhancing the production yield and reliability of a semiconductor device.

Abstract: It is an object of the present invention to provide a method for manufacturing an SOI substrate having an SOI layer that can be used in practical applications with high yield even when a flexible substrate such as a glass substrate or a plastic substrate is used. Further, it is another object of the present invention to provide a method for manufacturing a thin semiconductor device using such an SOI substrate with high yield. When a single-crystal semiconductor substrate is bonded to a flexible substrate having an insulating surface and the single-crystal semiconductor substrate is separated to manufacture an SOI substrate, one or both of bonding surfaces are activated, and then the flexible substrate having an insulating surface and the single-crystal semiconductor substrate are attached to each other.

Abstract: Methods, apparatus, and systems for depositing tensile or compressive tungsten films are described. In one aspect, a method includes providing a substrate to a chamber. The substrate has a field region and a feature recessed from the field region. Then, the substrate is exposed to an organometallic tungsten precursor. The organometallic tungsten precursor not adsorbed onto the substrate is removed from the chamber. The substrate is treated with a first treatment including a heat treatment or a plasma treatment to form a tungsten layer on the substrate. After treating the substrate, residual gasses are removed from the chamber. The tungsten layer on the substrate is treated with a second treatment including a heat treatment or a plasma treatment.

Abstract: Compositions and methods for forming metal films on semiconductor substrates are disclosed. One of the disclosed methods comprises: heating the semiconductor substrate to obtain a heated semiconductor substrate; exposing the heated semiconductor substrate to a composition containing at least one metal precursor comprising at least one ligand, an excess amount of neutral labile ligands, a supercritical solvent, and optionally at least one source of B, C, N, Si, P, and mixtures thereof; exposing the composition to a reducing agent and/or thermal energy at or near the heated semiconductor substrate; disassociating the at least one ligand from the metal precursor; and forming the metal film while minimizing formation of metal oxides.

Abstract: In a plasma torch unit, copper rods forming a coil as a whole are disposed inside copper rod inserting holes formed in a quartz block so that the quartz block is cooled by water flowing inside the copper rod inserting holes and cooling water pipes. A plasma ejection port is formed on the lowermost portion of the torch unit. While a gas is being supplied into a space inside an elongated chamber, high-frequency power is supplied to the copper rods to generate plasma in the space inside the elongated chamber so that the plasma is applied to a substrate.

Abstract: Electronic devices can be prepared by forming a patterned thin film on a suitable receiver substrate. A cyanoacrylate polymer is used as a deposition inhibitor material and applied first as a deposition inhibitor material. The deposition inhibitor material can be patterned to provide selected areas on the receiver substrate where the deposition inhibitor is absent. An inorganic thin film is then deposited on the receiver substrate using a chemical vapor deposition technique only in those areas where the deposition inhibitor material is absent. The cyanoacrylate polymer deposition inhibitor material can be applied by thermal transfer from a donor element to a receiver substrate before a patterned thin film is formed.

Abstract: A TiN film is formed by a first step of forming a TiN intermediate film on a wafer by supplying TiCl4 and NH3 reacting with TiCl4 to the wafer and controlling a processing condition for causing a bonding branch that has not undergone a substitution reaction to remain at a predetermined concentration at a part of TiCl4 and a second step of substituting the bonding branch contained in the TiN intermediate film by supplying H2 to the wafer, the first step and the second step being performed in this order.

Abstract: A hexagonal boron nitride thin film is grown on a metal surface of a growth substrate and then annealed. The hexagonal boron nitride thin film is coated with a protective support layer and released from the metal surface. The boron nitride thin film together with the protective support layer can then be transferred to any of a variety of arbitrary substrates.

Abstract: Methods for forming a contact metal layer in a contact structure in semiconductor devices are provided in the present invention. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device includes pulsing a deposition precursor gas mixture to a surface of a substrate disposed in a metal deposition processing chamber, pulsing a purge gas mixture to an edge of the substrate, wherein the purge gas mixture includes at least a hydrogen containing gas and an inert gas, and forming a contact metal layer on the substrate from the first deposition precursor gas mixture.

Abstract: A stress sensor is disclosed herein. The stress sensor includes a plurality of carbon nanotubes in a substrate, and first and second contacts electrically connectable with the plurality of carbon nanotubes. Methods of making and using the stress sensor are also disclosed.

Abstract: A deposition method comprises steps as follows. An apparatus for performing a thin-film deposition process is firstly provided, and the apparatus comprises a cabinet, a substrate carrier and a deposition source. The substrate carrier is disposed in the cabinet and comprises a cover element and a supporting element having a through hole. The deposition source is disposed in the cabinet. A substrate is subsequently disposed on the supporting element in order to make a deposition surface of the substrate exposed from the through hole. The cover element is then engaged with the supporting element to secure the substrate therebetween. Next, a deposition vapor is provided from the deposition source to get in touch with the deposition surface.

Abstract: Formation of a semiconductor device with NiGe or NiSiGe and with reduced consumption of underlying Ge or SiGe is provided. Embodiments include co-sputtering nickel (Ni) and germanium (Ge), forming a first Ni/Ge layer on a Ge or silicon germanium (SiGe) active layer, depositing titanium (Ti) on the first Ni/Ge or Ni/Si/Ge layer, forming a Ti intermediate layer, co-sputtering Ni and Ge on the Ti intermediate layer, forming a second Ni/Ge layer, and performing a rapid thermal anneal (RTA) process.

Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.

Abstract: Apparatus (1, 26) for depositing a layer (37, 38, 39) on a substrate (2) in a process gas comprises a chuck (3) comprising a first surface (4) for supporting the substrate (2), a clamp (4) for securing the substrate (2) to the first surface (14) of the chuck (3), an evacuatable enclosure (5) enclosing the chuck (3) and the clamp (4) and comprising an inlet, through which the processing gas is insertable into the enclosure (5), and control apparatus (19). The control apparatus (19) is adapted to move at least one of the chuck (3) and the clamp (4) relative to, and independently of, one another to adjust a spacing between the chuck (3) and the clamp (4) during a single deposition process whilst maintaining a flow of the processing gas and a pressure within the enclosure (5) that is less than atmospheric pressure.

Abstract: A substrate processing apparatus includes a processing chamber configured to process a substrate having a front surface including a dielectric, a substrate support member provided within the processing chamber to support the substrate, a microwave supplying unit configured to supply a microwave to a front surface side of the substrate supported on the substrate support member; and a conductive substrate cooling unit which is provided at a rear surface side of the substrate supported on the substrate support member and has an opposing surface facing the rear surface of the substrate. A distance between the top of the substrate support member and the opposing surface of the substrate cooling unit corresponds to an odd multiple of ¼ wavelength of the microwave supplied when the substrate is processed.

Abstract: Atomic layer deposition methods as described herein can be advantageously used to form a metal-containing layer on a substrate. For example, certain methods as described herein can form a strontium titanate layer that has low carbon content (e.g., low strontium carbonate content), which can result in layer with a high dielectric constant.

Abstract: A CVD showerhead that includes a circular inner showerhead and at least one outer ring showerhead. At least two process gas delivery tubes are coupled to each showerhead. Also, a dual showerhead that includes a circular inner showerhead and at least one outer ring showerhead where each showerhead is coupled to oxygen plus a gas mixture of lead, zirconium, and titanium organometallics. A method of depositing a CVD thin film on a wafer. Also, a method of depositing a PZT thin film on a wafer.

Abstract: Methods of producing low resistivity tungsten bulk layers having lower roughness and higher reflectivity are provided. The smooth and highly reflective tungsten layers are easier to photopattern than conventional low resistivity tungsten films. The methods involve CVD deposition of tungsten in the presence of alternating nitrogen gas pulses, such that alternating portions of the film are deposited by CVD in the absence of nitrogen and in the presence of nitrogen. According to various embodiments, between 20-90% of the total film thickness is deposited by CVD in the presence of nitrogen.

Abstract: A method for fabricating a semiconductor device is described. A substrate is provided having a patterned dielectric layer disposed thereon. A trench is formed in the dielectric layer. The surfaces of the trench are treated with an ammonia-based plasma process. A metal layer is then formed in the trench.

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle.

Abstract: A method of manufacturing an electronic device includes the steps of: forming a sacrifice layer made of at least one of an alkali metal oxide and an alkali earth metal oxide in a part of a first substrate; forming a supporting layer covering the sacrifice layer; forming an electronic device on the sacrifice layer with the supporting layer in between; exposing at least a part of a side face of the sacrifice layer by removing a part of the supporting layer; forming a support body between the electronic device and the supporting layer, and a surface of the first substrate; removing the sacrifice layer; breaking the support body and transferring the electronic device onto a second substrate by bringing the electronic device into close contact with an adhesion layer provided on a surface of the second substrate; removing a fragment of the support body belonging to the electronic device; removing at least an exposed region in the adhesion layer not covered with the electronic device; and forming a fixing layer on a

Abstract: A CVD showerhead that includes a circular inner showerhead and at least one outer ring showerhead. At least two process gas delivery tubes are coupled to each showerhead. Also, a dual showerhead that includes a circular inner showerhead and at least one outer ring showerhead where each showerhead is coupled to oxygen plus a gas mixture of lead, zirconium, and titanium organometallics. A method of depositing a CVD thin film on a wafer. Also, a method of depositing a PZT thin film on a wafer.

Abstract: A method for forming a conductive thin film includes depositing a metal oxide thin film on a substrate by an atomic layer deposition (ALD) process. The method further includes at least partially reducing the metal oxide thin film by exposing the metal oxide thin film to a reducing agent, thereby forming a seed layer. In one arrangement, the reducing agent comprises one or more organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO, and —COOH. In another arrangement, the reducing agent comprises an electric current.

Abstract: A semiconductor furnace suitable for chemical vapor deposition processing of wafers. The furnace includes a thermal reaction chamber having a top, a bottom, a sidewall, and an internal cavity for removably holding a batch of vertically stacked wafers. A heating system is provided that includes a plurality of rotatable heaters arranged and operative to heat the chamber. In one embodiment, spacing between the sidewall heaters is adjustable. The heating system controls temperature variations within the chamber and promotes uniform film deposit thickness on the wafers.

Abstract: A thin film deposition apparatus and a method of manufacturing an organic light emitting device (OLED) using the thin film deposition apparatus.

Abstract: An embodiment relates a method comprising creating a reversible change in an electrical property by adsorption of a gas by a composition, wherein the composition comprises a noble metal-containing nanoparticle and a single walled carbon nanotube. Another embodiment relates to a method comprising forming a composition comprising a noble metal-containing nanoparticle and a single walled carbon nanotube and forming a device containing the said composition. Yet another method relates to a device comprising a composition comprising a noble metal-containing nanoparticle and a single walled carbon nanotube on a silicon wafer, wherein the composition exhibits a reversible change in an electrical property by adsorption of a gas by the composition.

Abstract: Embodiments of the invention provide a method for depositing tungsten-containing materials. In one embodiment, a method includes forming a tungsten nucleation layer over an underlayer disposed on the substrate while sequentially providing a tungsten precursor and a reducing gas into a process chamber during an atomic layer deposition (ALD) process and depositing a tungsten bulk layer over the tungsten nucleation layer, wherein the reducing gas contains hydrogen gas and a hydride compound (e.g., diborane) and has a hydrogen/hydride flow rate ratio of about 500:1 or greater. In some examples, the method includes flowing the hydrogen gas into the process chamber at a flow rate within a range from about 1 slm to about 20 slm and flowing a mixture of the hydride compound and a carrier gas into the process chamber at a flow rate within a range from about 50 sccm to about 500 sccm.

Abstract: The invention relates to a method for fabricating silicon and/or germanium nanowires on a substrate, comprising a step of bringing a precursor comprising silicon and/or a precursor comprising germanium into contact with a compound comprising copper oxide present on the said substrate, by means of which growth of nanowires takes place.

Abstract: A method for fabricating a semiconductor device includes forming a gate electrode on a surface of a substrate via a gate insulating film, forming an insulating film on a side surface of the gate electrode, and exposing an oxygen plasma onto the surface of the substrate. An electron temperature of the oxygen plasma in a vicinity of the surface of the substrate is equal to or less than about 1.5 eV.