Abstract: A substrate processing apparatus includes a reaction chamber including an inlet through which a reaction gas is supplied and an outlet through which residue gas is exhausted; a plurality of ionizers located at a front end of the inlet and configured to ionize the reaction gas supplied through the inlet; and a heater configured to heat the reaction chamber. The plurality of ionizers include a first ionizer configured to ionize the reaction gas positively; and a second ionizer configured to ionize the reaction gas negatively.

Abstract: Methods for etching a substrate in a plasma etch reactor may include (a) depositing polymer on surfaces of a feature formed in substrate disposed in the etch reactor using first reactive species formed from a first process gas comprising a polymer forming gas; (b) etching the bottom surface of the feature of the substrate in the etch reactor using a third reactive species formed from a third process gas including an etching gas; and (c) bombarding a bottom surface of the feature with a second reactive species formed from a second process gas comprising one or more of an inert gas, an oxidizing gas, a reducing gas, or the polymer forming gas while at least one of depositing the polymer to remove at least some of the polymer disposed on the bottom surface or etching the bottom surface to at least one of chemically or physically damage the bottom surface.

Abstract: Disclosed herein is a method forming a device comprising forming a high-k layer over a substrate and applying a dry plasma treatment to the high-k layer and removing at least a portion of one or more impurity types from the high-k layer. The dry plasma treatment may be chlorine, fluorine or oxygen plasma treatment. A cap layer may be applied on the high-k layer and a metal gate formed on the cap layer. An interfacial layer may optionally be formed on the substrate, with the high-k layer is formed on the interfacial layer. The high-k layer may have a dielectric constant greater than 3.9, and the cap layer may optionally be titanium nitride. The plasma treatment may be applied after the high-k layer is applied and before the cap layer is applied or after the cap layer is applied.

Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.

Abstract: A multi-chip electronic package and methods of manufacture are provided. The structure includes a lid encapsulating at least one chip mounted on a chip carrier; at least one seal shim fixed between the lid and the chip carrier, the at least one seal shim forming a gap between pistons of the lid and respective ones of the chips; and thermal interface material within the gap and contacting the pistons of the lid and respective ones of the chips.

Abstract: Bare aluminum baffles are adapted for resist stripping chambers and include an outer aluminum oxide layer, which can be a native aluminum oxide layer or a layer formed by chemically treating a new or used bare aluminum baffle to form a thin outer aluminum oxide layer.

Abstract: An apparatus and the use of such an apparatus and method for producing microcomponents with component structures are presented which are generated in a process chamber on a substrate according to the LIGA method for example and are stripped from the enclosing photoresist with the help of a cooled remote plasma source.

Abstract: A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates across a varying pattern on a patterned substrate. The method also provides a more rectilinear profile following the etch process. Methods include a sequential exposure of gapfill silicon oxide. The gapfill silicon oxide is exposed to a local plasma treatment prior to a remote-plasma dry etch which may produce salt by-product on the surface. The local plasma treatment has been found to condition the gapfill silicon oxide such that the etch process proceeds at a more even rate within each trench and across multiple trenches. The salt by-product may be removed by raising the temperature in a subsequent sublimation step.

Abstract: A quartz window with an interior plenum is operable as a shutter or UV filter in a degas chamber by supplying the plenum with an ozone-containing gas. Pressure in the plenum can be adjusted to block UV light transmission into the degas chamber or adjust transmittance of UV light through the window. When the plenum is evacuated, the plenum allows maximum transmission of UV light into the degas chamber.

Abstract: A method of etching recesses into silicon prior to formation of embedded silicon alloy source/drain regions. The recess etch includes a plasma etch component, using an etch chemistry of a primary fluorine-based or chlorine-based etchant, in combination with a similar concentration of hydrogen bromide. The concentration of both the primary etchant and the hydrogen bromide is relatively low; a diluent of an inert gas or oxygen is added to the reactive species. Loading effects on the undercut of the recess etch are greatly reduced, resulting in reduced transistor performance variation.

Abstract: A plasma tuning rod system is provided with one or more microwave cavities configured to couple electromagnetic (EM) energy in a desired EM wave mode to a plasma by generating resonant microwave energy in one or more plasma tuning rods within and/or adjacent to the plasma. One or more microwave cavity assemblies can be coupled to a process chamber, and can comprise one or more tuning spaces/cavities. Each tuning space/cavity can have one or more plasma tuning rods coupled thereto. The plasma tuning rods can be configured to couple the EM energy from the resonant cavities to the process space within the process chamber and thereby create uniform plasma within the process space.

Abstract: A quartz window with an interior plenum is operable as a shutter or UV filter in a degas chamber by supplying the plenum with an ozone-containing gas. Pressure in the plenum can be adjusted to block UV light transmission into the degas chamber or adjust transmittance of UV light through the window. When the plenum is evacuated, the plenum allows maximum transmission of UV light into the degas chamber.

Abstract: A process for surface preparation of a substrate (2), which comprises introducing or running a substrate (2) into a reaction chamber (6, 106). A dielectric barrier (14, 114) is placed between electrodes (1, 10, 110). A high-frequency electrical voltage is generated, to generate filamentary plasma (12, 112). Molecules (8, 108) are introduced into the reaction chamber (6, 106). Upon contact with the plasma, they generate active species typical of reacting with the surface of the substrate. An adjustable inductor (L) placed in parallel with the inductor of the installation is employed to reduce the phase shift between the voltage and the current generated and to increase the time during which the current flows in the plasma (12, 112).

Abstract: Formation of BPSG surface defects upon exposure to atmosphere is prevented by a plasma treatment method for converting boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer to gas phase compounds. The treatment plasma is generated from a treatment process gas containing one of (a) a fluorine compound or (b) a hydrogen compound.

Abstract: This dry cleaning method for a plasma processing apparatus is a dry cleaning method for a plasma processing apparatus that includes: a vacuum container provided with a dielectric member; a planar electrode and a high-frequency antenna that are provided outside the dielectric member; and a high-frequency power source that supplies high-frequency power to both the high-frequency antenna and the planar electrode, to thereby introduce high-frequency power into the vacuum container via the dielectric member and produce an inductively-coupled plasma, the method comprising the steps of: introducing a gas including fluorine into the vacuum container and also introducing high-frequency power into the vacuum container from the high-frequency power source, to thereby produce an inductively-coupled plasma in the gas including fluorine; and by use of the inductively-coupled plasma, removing a product including at least one of a precious metal and a ferroelectric that is adhered to the dielectric member.

Abstract: Semiconductor device fabrication equipment performs a PEOX (physical enhanced oxidation) process, and includes a remote plasma generator for cleaning a process chamber of the equipment. After a PEOX process has been preformed, a purging gas is supplied into the process chamber to purge the process chamber, and the remote plasma generator produces plasma using a first cleaning gas. Accordingly, a reactor of the remote plasma generator is cleaned by the first cleaning gas plasma. Subsequently, the purging gas is supplied to purge the process chamber, and the remote plasma generator produces plasma using a second cleaning gas to remove the first cleaning gas plasma from the remote plasma generator and the process chamber. Finally, full flush operations are performed to remove any gases remaining in the process chamber.

Abstract: A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.

Abstract: A plasma processing method performs a desired plasma process on substrates by using a plasma generated in a processing space. A first and a second electrode are disposed in parallel in a processing vessel that is grounded, the substrate is supported on the second electrode to face the first electrode, the processing vessel is vacuum evacuated, a desired processing gas is supplied into the processing space formed between the first electrode, the second electrode and a sidewall of the processing vessel, and a first radio frequency power is supplied to the second electrode. The first electrode is connected to the processing vessel via an insulator or a space, and is electrically coupled to a ground potential via a capacitance varying unit whose electrostatic capacitance is varied based on a process condition of the plasma process performed on the substrate.

Abstract: A method of using a post-etch treatment system for removing photoresist and etch residue formed during an etching process is described. For example, the etch residue can include halogen containing material. The post-etch treatment system comprises a vacuum chamber, a radical generation system coupled to the vacuum chamber, a radical gas distribution system coupled to the radical generation system and configured to distribute reactive radicals above a substrate, and a high temperature pedestal coupled to the vacuum chamber and configured to support the substrate. The method comprises introducing a NxOy based process gas to the radical generation system.

Abstract: Methods for forming a photomask using a carbon hard mask are provided. In one embodiment, a method of forming a photomask includes etching a chromium layer through a patterned carbon hard mask layer in the presence of a plasma formed from a process gas containing chlorine and carbon monoxide.

Abstract: The invention relates to a method and device for depositing at least one layer, particularly a semiconductor layer, onto at least one substrate, which is situated inside a process chamber of a reactor while being supported by a substrate holder. The layer is comprised of at least two material components provided in a fixed stoichiometric ratio, which are each introduced into the reactor in the form of a first and a second reaction gas, and a portion of the decomposition products form the layer, whereby the supply of the first reaction gas, which has a low thermal activation energy, determines the growth rate of the layer, and the second reaction gas, which has a high thermal activation energy, is supplied in excess and is preconditioned, in particular, by an independent supply of energy. The first reaction gas flows in a direction toward the substrate holder through a multitude of openings, which are distributed over a surface of a gas inlet element, said surface being located opposite the substrate holder.

Abstract: A method and apparatus for cleaning a process chamber are provided. In one embodiment, a process chamber is provided that includes a remote plasma source and a process chamber having at least two processing regions. Each processing region includes a substrate support assembly disposed in the processing region, a gas distribution system configured to provide gas into the processing region above the substrate support assembly, and a gas passage configured to provide gas into the processing region below the substrate support assembly. A first gas conduit is configured to flow a cleaning agent from the remote plasma source through the gas distribution assembly in each processing region while a second gas conduit is configured to divert a portion of the cleaning agent from the first gas conduit to the gas passage of each processing region.

Abstract: A substrate processing method using a substrate processing apparatus including: a process container holding a substrate to be processed therein; first gas supplying means having flow rate adjusting means for supplying a first process gas to the process container; and second gas supplying means supplying a second process gas to the process container, the substrate processing method including: a first step of controlling a flow rate of the first process gas to be a first flow rate by the flow rate adjusting means and supplying the first process gas in a first direction; a second step of discharging the first process gas from the process container; a third step of supplying the second process gas to the process container; and a fourth step of discharging the second process gas from the process container, in a repeated manner, wherein a step of stabilizing the flow rate of the process gas is set between a primary first step and a secondary first step performed subsequently to the primary first step.

Abstract: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material. A system capable of carrying out such a process is also disclosed.

Abstract: A process for removing organic electroluminescent residues from a substrate is described herein. The process includes the steps of providing a process gas comprising a fluorine-containing gas, optionally an oxygen-containing gas, and optionally an additive gas; activating the process gas in a remote chamber using at least one energy source to provide reactive species; and contacting the surface of the substrate with the reactive species to volatilize and remove the organic electroluminescent residue from the surface.

Abstract: Atomic oxygen generated in oxygen stripping plasmas reacts with and damages low-k dielectric materials during stripping of dielectric post etch residues. While damage of low-k dielectric materials during stripping of dielectric post etch residues is lower with hydrogen stripping plasmas, hydrogen stripping plasmas exhibit lower strip rates. Inclusion of oxygen in a hydrogen stripping plasma improves both photoresist strip rate and uniformity, while maintaining a hydrogen to oxygen ratio avoids low-k dielectric material damage.

Abstract: A method for processing a substrate in a plasma processing chamber is provided. The substrate is disposed above a chuck and surrounded by a first edge ring. The first edge ring is electrically isolated from the chuck. The method includes providing a second edge ring. The second edge ring is disposed below an edge of the substrate. The method also includes providing a coupling ring. The coupling ring is configured to facilitate RF coupling from an ESC (electrostatic chuck) assembly to the first edge ring, thereby causing the first edge ring to have an edge ring potential during substrate processing and causing the RF coupling to be maximized at the first edge ring and minimized at the second edge ring during the substrate processing.

Abstract: A cleaning method of a substrate processor that reduces damage to a member in a substrate processing container. The method of cleaning the substrate processing container of the substrate processor that processes a target substrate according to the present invention includes: introducing gas into a remote plasma generating unit of the substrate processor; exciting the gas by the remote plasma generating unit, and generating reactive species; and supplying the reactive species to the processing container from the remote plasma generating unit, and pressurizing the processing container at 1333 Pa or greater.

Abstract: When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a hard mask 22 covering the region except an interconnection trench forming region, the hard mask 20 is isotropically etched to expose the upper surface of the inter-layer insulating film 18 at a periphery of the via-hole forming region and leave the hard mask 20 in the interconnection trench forming region except the periphery, and then the hard mask 20 and the insulating films 18, 16 are anisotropically etched, whereby the via-hole 26 having increased-width portion 34 at the upper part, and the interconnection trench 32 connected to the via-hole 26 at the increased-width portions 26 are formed.

Abstract: Semi-insulating Group III nitride layers and methods of fabricating semi-insulating Group III nitride layers include doping a Group III nitride layer with a shallow level p-type dopant and doping the Group III nitride layer with a deep level dopant, such as a deep level transition metal dopant. Such layers and/or method may also include doping a Group III nitride layer with a shallow level dopant having a concentration of less than about 1×1017 cm?3 and doping the Group III nitride layer with a deep level transition metal dopant. The concentration of the deep level transition metal dopant is greater than a concentration of the shallow level p-type dopant.

Abstract: Methods and apparatus for operating plasmas are described. The vessel receives an oxygen containing plasma to clean and/or condition the vessel.

Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

Abstract: In a substrate processing apparatus, a control electrode (131) separates a process space (11C) including a substrate to be processed and a plasma formation space (11B) not including the substrate. The control electrode includes a conductive member formed in a processing vessel and having a plurality of apertures (131a) for passing plasma. A surface of the control electrode is covered by an aluminum oxide or a conductive nitride. In the substrate processing apparatus, a gas containing He and N2 is supplied into the processing vessel. In the plasma formation space, there is formed plasma under a condition in which atomic state nitrogen N* are excited. The atomic state nitrogen N* are used to nitride a surface of the substrate.

Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.

Abstract: Methods and apparatus for cleaning a semiconductor device are disclosed. A disclosed method comprises forming a capping layer on top of a substrate including a bottom interconnect layer; depositing and patterning an insulating layer on the capping layer to form a damascene structure; etching a portion of the capping layer exposed by the damascene structure; and (d) removing polymers and copper impurities due to the etching by using a HF vapor gas.

Abstract: A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.

Abstract: A method and apparatus for processing a wafer is described. According to the present invention a wafer is placed on a substrate support. A liquid is then fed through a conduit having an output opening over the wafer. A gas is dissolved in the liquid prior to the liquid reaching the output over the wafer by flowing a gas into the conduit through a venturi opening formed in the conduit. The liquid with dissolved gas is then fed through the opening and onto the wafer where it can be used to etch, clean, or rinse a wafer.

Abstract: A method of photoresist removal is described. A substrate is located in a processing chamber. A mixture of gases is excited, the mixture comprising a majority component of a reducing process gas and a minority component of between 0.1% and 10% by volume of an oxidizing process gas. Reactive gas species are thereby generated. A photoresist layer with an exposed dielectric layer on the substrate in the chamber is then exposed to the reactive gas mixture to selectively remove the photoresist layer from the dielectric layer.

Abstract: The present invention provides a processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo-energy for maintaining activation of the active species or providing photo-energy for a non-plasma species during transfer through the transparent tube to the processing chamber. The source of photo-energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for processes such as layer-by-layer annealing and deposition and also removal of contaminants from deposited layers.

Abstract: A split gate FET wordline electrode structure and method for forming the same including an improved polysilicon etching process including providing a semiconductor wafer process surface comprising first exposed polysilicon portions and adjacent oxide portions; forming a first oxide layer on the exposed polysilicon portions; blanket depositing a polysilicon layer on the first exposed polysilicon portions and adjacent oxide portions; forming a hardmask layer on the polysilicon layer; carrying out a multi-step reactive ion etching (RIE) process to etch through the hardmask layer and etch through a thickness portion of the polysilicon layer to form second polysilicon portions adjacent the oxide portions having upward protruding outer polysilicon fence portions; contacting the semiconductor wafer process surface with an aqueous HF solution; and, carrying out a downstream plasma etching process to remove polysilicon fence portions.

Abstract: A confinement device for operative arrangement within a substrate etching chamber, having a lower surface of the device generally arranged over a substrate outer top surface such that a gap-spacing therebetween is generally equidistant. This spacing is less than a sheath thickness for the plasma, preferably less than ?rd of an inner width of an aperture through the lower surface of the device. The aperture, sized preferably greater than 3 times the sheath thickness, is in communication with a channel of the device in which an etchant gas can be confined for reaction to selectively etch a localized area in the substrate outer top surface generally below the aperture. A system for dry etching an IC wafer includes a substrate etching chamber and a confinement device. The etchant gas may be a plasma induced and sustained by RF energy, a microwave source, or other source, as designed.

Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.

Abstract: The invention provides for a method and integrated system for removing a halogen-containing residue from a substrate comprising etching the substrate, heating the substrate and exposing the heated substrate to a plasma that removes the halogen-containing residue.

Abstract: A semiconductor substrate has active areas bounded by portions of an insulating layer. A thin layer of tunnel oxide is formed on the substrate and a first layer of conductive material is then deposited. Non-volatile memory cells are manufactured thereon by defining floating gate regions. The definition of these floating gate regions involves defining the first layer of conductive material in order to form a plurality of alternated stripes above pairs of active areas alternated by active areas lacking stripes. Spacers are then formed in the shelter of the side walls of the alternated stripes. A second layer of conductive material is then deposited together with the first layer of conductive material. The spacers are then selectively removed.

Abstract: A cleanup process that uses a dilute fluorine in oxygen chemistry in a downstream plasma tool to remove organic and inorganic polymeric residues (116).

Abstract: An improved chemical vapor deposition or etching is shown in which cyclotron resonance and photo or plasma CVD cooperate to deposit a layer with high performance at a high deposition speed. The high deposition speed is attributed to the cyclotron resonance while the high performance is attributed to the CVDs.

Abstract: An improved and new process for photoresist stripping for use during fabrication of semiconductor integrated circuits, which use porous low-k dielectric materials, such as OSG or HSQ, as the interlevel and intra-level insulating layers, has been developed. Photoresist stripping in microwave or rf generated plasmas in gaseous mixtures of NH3 and CO takes place without attack or damage to underlying layers of OSG or HSQ. Optimum results are obtained when the ratio of CO to NH3 is between about 0.8 and 1.2.

Abstract: A process for etching a substrate 25 in an etching chamber 105, and simultaneously removing etch residue deposited on the surfaces of the walls 110 and components of the etching chamber 105. In one version, a two-stage method of opening a nitride mask layer on the substrate includes a first stage of providing a highly chemically reactive process gas in the chamber 105 to etch the nitride layer 32 and/or an underlying oxide layer 34, and a second stage of providing a less chemically reactive process gas in the chamber to etch the nitride layer 32 and/or the oxide layer 34 at a slower rate than the first stage. The first and second stage process gases may each comprise a fluorine containing gas, with the fluorine ratio of the first gas higher than the fluorine ratio of the second gas.

Abstract: In pre-treating a surface of a substrate in a process of forming a narrowed thin film pattern on the surface of the substrate from a solution such as a plating liquid, a mask with an opening corresponding to the thin film pattern to be formed later is formed on the surface of the substrate. Then, by micronizing a pre-treating liquid such as a water, a plating liquid, an acidic liquid ad an alkaline liquid, an atmosphere containing microparticles having diameters smaller than the minimum distance of the opening of the mask is produced. The substrate is positioned into the atmosphere, and the microparticles of the pre-treating liquid are stuck on the surface of the substrate exposing to the lower part of the opening of the mask. In using a water as the pre-treating liquid, the substrate is positioned into an atmosphere containing moisture vapor and the water particles are stuck on the surface of the substrate through their condensation.