Abstract: An apparatus for fabricating diamond by carbon assembly, which comprises: a) a hydrocarbon radical generator in operable connection with b) a mass flow conduit extending from the hydrocarbon radical generator in a) to an interface and into a primary magnetic accelerator containing one or more electromagnets in operable connection with c) a diamond fabrication reactor comprising a diamond forming deposition substrate. Also disclosed is a method for fabricating diamond by shockwaves using the disclosed apparatus.

Abstract: In a method of manufacturing a semiconductor device, a mask pattern is formed over a target layer to be etched, and the target layer is etched by using the mask pattern as an etching mask. The etching is performed by using an electron cyclotron resonance (ECR) plasma etching apparatus, the ECR plasma etching apparatus includes one or more coils, and a plasma condition of the ECR plasma etching is changed during the etching the target layer by changing an input current to the one or more coils.

Abstract: According to some embodiments of the present invention, a method of producing an organic-inorganic perovskite thin film includes depositing a layer of inorganic material on a substrate to form an inorganic film, and performing an organic vapor treatment of the inorganic film to produce an organic-inorganic perovskite thin film. The layer of inorganic material comprises an inorganic anion layer having a metal-ligand framework, and the organic vapor treatment provides organic cations capable of becoming inserted into the metal-ligand framework of the inorganic anion layer to form a perovskite structure.

Abstract: A method of forming a semiconductor device can be provided by forming a mask pattern including non-metallic first spaced-apart portions that extend in a first direction on a lower target layer and non-metallic second spaced-apart portions that extend in a second direction on the lower target layer to cross-over the non-metallic first spaced-apart portions at locations. The lower target layer can be etched using the mask pattern.

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.

Abstract: According one embodiment, a method for manufacturing a semiconductor device is provided, which includes forming a pair of element isolation insulation films on a semiconductor substrate, forming a gate electrode structure on sides of the gate electrode structure, selectively removing oxide films that are formed on a top surface of the diffusion layer and a top surface of the gate electrode by placing the substrate in a gas atmosphere selected from the group consisting of F, Cl, Br, I, H, O, Ar, or N; and irradiating the semiconductor substrate with microwave radiation. The method also includes depositing a metal film on a top surface of the diffusion layer and a top surface of the gate electrode, and a silicide film is formed by heating the substrate.

Abstract: In an etching method of a multilayer film including a first oxide film and a second oxide film, a high frequency power in etching an organic film is set to be higher than those in etching a first and second oxide films, and high frequency bias powers in the etching of the first and second oxide films are set to be higher than that in the etching of the organic film. In the etching of the first and second oxide films and the organic film, a magnetic field is generated such that horizontal magnetic field components in a radial direction with respect to a central axis line of a target object have an intensity distribution having a peak value at a position far from the central axis line, and a position of the peak value in the etching of the organic film is closer to the central axis line.

Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source.

Abstract: The present invention provides a dry etching method capable of readily providing rounded top edge portions, called top rounds, at trenches and vias formed by removal of a dummy material. The method of the present invention is a dry etching method for forming trenches or vias by removing a dummy material with its periphery surrounded by an interlayer oxide film, which method includes the steps of etching the dummy material to a predetermined depth, performing isotropic etching after the dummy material etching, and removing remaining part of the dummy material after the isotropic etching.

Abstract: A process for surface preparation of a substrate (2), which comprises introducing or running a substrate (2) into a reaction chamber (6, 106). A dielectric barrier (14, 114) is placed between electrodes (1, 10, 110). A high-frequency electrical voltage is generated, to generate filamentary plasma (12, 112). Molecules (8, 108) are introduced into the reaction chamber (6, 106). Upon contact with the plasma, they generate active species typical of reacting with the surface of the substrate. An adjustable inductor (L) placed in parallel with the inductor of the installation is employed to reduce the phase shift between the voltage and the current generated and to increase the time during which the current flows in the plasma (12, 112).

Abstract: An apparatus of an electron cyclotron resonance ion source may include: a magnet unit containing a magnet for generating magnetic fields; an ionizing chamber housing unit for generating ions through electron cyclotron resonance from a plasma; a microwave generating unit for injecting microwaves to the ionizing chamber housing unit to generate ions; and a beam integrating and guiding unit for treating the generated ions. The magnet unit may include: a bobbin for winding the magnet; a variable spacer for dividing the bobbin into a plurality of sections; and the magnet which is wound into the form of a wire or a tape in the plurality of sections formed by the variable spacer.

Abstract: The invention provides an etching method for realizing trench etching without causing any damages to the side walls of the trench while maintaining a high-etching rate. The plasma etching method relates to forming a groove or a hole by forming a silicon trench to a silicon substrate or a silicon substrate having a silicon oxide dielectric layer via a mixed gas plasma containing a mixed gas of SF6 and O2 or a mixed gas of SF6, O2 and SiF4 and having added thereto a gas containing hydrogen within the range of 5 to 16% (percent concentration) of the total gas flow rate of the mixed gas.

Abstract: Disclosed herein are various embodiments related to metal-assisted chemical etching of substrates on the micron, sub-micron and nano scales. In one embodiment, among others, a method for metal-assisted chemical etching includes providing a substrate; depositing a non-spherical metal catalyst on a surface of the substrate; etching the substrate by exposing the non-spherical metal catalyst and the substrate to an etchant solution including a composition of a fluoride etchant and an oxidizing agent; and removing the etched substrate from the etchant solution.

Abstract: Methods for providing an integrated circuit using a multi-stage molding process to protect wirebonds. In one embodiment, a method includes attaching a die to a leadframe having a lead finger, attaching a wirebond between the die and the leadfinger, applying a first mold material over at least a portion of the wirebond and the die and the leadfinger to form an assembly, waiting for the first mold material to at least partially cure, and applying a second mold material over the assembly.

Abstract: This dry cleaning method for a plasma processing apparatus is a dry cleaning method for a plasma processing apparatus that includes: a vacuum container provided with a dielectric member; a planar electrode and a high-frequency antenna that are provided outside the dielectric member; and a high-frequency power source that supplies high-frequency power to both the high-frequency antenna and the planar electrode, to thereby introduce high-frequency power into the vacuum container via the dielectric member and produce an inductively-coupled plasma, the method comprising the steps of: introducing a gas including fluorine into the vacuum container and also introducing high-frequency power into the vacuum container from the high-frequency power source, to thereby produce an inductively-coupled plasma in the gas including fluorine; and by use of the inductively-coupled plasma, removing a product including at least one of a precious metal and a ferroelectric that is adhered to the dielectric member.

Abstract: A flip chip semiconductor device has a substrate with a plurality of active devices formed thereon. A passive device is formed on the substrate by depositing a first conductive layer over the substrate, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the insulating layer. The passive device is a metal-insulator-metal capacitor. The deposition of the insulating layer and first and second conductive layers is performed without photolithography. An under bump metallization (UBM) layer is formed on the substrate in electrical contact with the plurality of active devices. A solder bump is formed over the UBM layer. The passive device can also be a resistor by depositing a resistive layer over the first conductive layer and depositing a third conductive layer over the resistive layer. The passive device electrically contacts the solder bump.

Abstract: In a magnetic field generator for magnetron plasma generation which comprises a dipole-ring magnet with a plurality of columnar anisotropic segment magnets arranged in a ring-like manner, or in an etching apparatus and a method both of which utilize the magnetic field generator, the uniformity of plasma treatment over the entire surface of a wafer (workpiece) is improved by controlling the direction of the magnetic field relative to the working surface of the wafer (workpiece) which is subject to plasma treatment such as etching.

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.

Abstract: The invention relates to a method and device for depositing at least one layer, particularly a semiconductor layer, onto at least one substrate, which is situated inside a process chamber of a reactor while being supported by a substrate holder. The layer is comprised of at least two material components provided in a fixed stoichiometric ratio, which are each introduced into the reactor in the form of a first and a second reaction gas, and a portion of the decomposition products form the layer, whereby the supply of the first reaction gas, which has a low thermal activation energy, determines the growth rate of the layer, and the second reaction gas, which has a high thermal activation energy, is supplied in excess and is preconditioned, in particular, by an independent supply of energy. The first reaction gas flows in a direction toward the substrate holder through a multitude of openings, which are distributed over a surface of a gas inlet element, said surface being located opposite the substrate holder.

Abstract: A semiconductor die package capable of being mounted to a motherboard is disclosed. The semiconductor die package includes a substrate, and a first semiconductor die mounted on the substrate, where the first semiconductor die includes a first vertical device comprising a first input region and a first output region at opposite surfaces of the first semiconductor die. The semiconductor die package includes a second semiconductor die mounted on the substrate, where second semiconductor die comprises a second vertical device comprising a second input region and a second output region at opposite surfaces of the second semiconductor die. A substantially planar conductive node clip electrically communicates the first output region in the first semiconductor die and the second input region in the second semiconductor die. The first semiconductor die and the second semiconductor die are between the substrate and the conductive node clip.

Abstract: A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant ?r is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.

Abstract: Disclosed are embodiments relating to a method of manufacturing a semiconductor device that may improve the yield rate of the semiconductor device. In embodiments, the method may include preparing a substrate including a plurality of conductive patterns, forming first and second insulating layers on the substrate, forming a plurality of via holes by selectively etching the first and second insulating layers, forming a plurality of trenches by selectively etching the second insulating layer in such a manner that the trenches are communicated with the trenches, and forming metal interconnections in the via holes and the trenches. The width ratio of the trench to the insulating layer positioned between adjacent trenches may be in a range of 0.45 to 0.55.

Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.

Abstract: When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.

Abstract: In a substrate processing apparatus, a control electrode (131) separates a process space (11C) including a substrate to be processed and a plasma formation space (11B) not including the substrate. The control electrode includes a conductive member formed in a processing vessel and having a plurality of apertures (131a) for passing plasma. A surface of the control electrode is covered by an aluminum oxide or a conductive nitride. In the substrate processing apparatus, a gas containing He and N2 is supplied into the processing vessel. In the plasma formation space, there is formed plasma under a condition in which atomic state nitrogen N* are excited. The atomic state nitrogen N* are used to nitride a surface of the substrate.

Abstract: Methods and apparatus for cleaning a semiconductor device are disclosed. A disclosed method comprises forming a capping layer on top of a substrate including a bottom interconnect layer; depositing and patterning an insulating layer on the capping layer to form a damascene structure; etching a portion of the capping layer exposed by the damascene structure; and (d) removing polymers and copper impurities due to the etching by using a HF vapor gas.

Abstract: A method and a device suitable for its execution are provided for the anisotropic plasma etching of a substrate, especially a silicon element. The device has a chamber and a plasma source for generating a high-frequency electromagnetic alternating field and a reaction region for generating a plasma having reactive species inside the chamber, the reactive species being created by the action of the alternating field upon an etching gas, and a passivating gas that is especially simultaneously introduced but spatially separated from it. Furthermore, an arrangement is provided, by the use of which, in the reaction region, at least a first zone that has etching gas applied to it, and at least a second zone that has passivating gas applied to it, are defined.

Abstract: A mask material layer 102 of a desired pattern is formed on a silicon oxide film 101. The exposed parts of the silicon oxide film 101 is etched in accordance with the pattern of the mask material layer 102 by plasma etching by using a mixed gas fed at a rate such that the ratio (C5F8+O2/Ar) of the total flow rate of C5F8+O2 to the flow rate of Ar is 0.02 (2%) or less. Thus, a generally vertical right-angled portion is formed in the silicon oxide film 101. Therefore, no microtrenches are formed, and etching into a desired pattern is precisely effected.

Abstract: A device structure and method for forming an interconnect structure in a magnetic random access memory (MRAM) device. In an exemplary embodiment, the method includes defining a magnetic stack layer on a lower metallization level, the magnetic stack layer including a non-ferromagnetic layer disposed between a pair of ferromagnetic layers. A conductive hardmask is defined over the magnetic stack layer, and selected portions of the hardmask and the magnetic stack layer, are then removed, thereby creating an array of magnetic tunnel junction (MTJ) stacks. The MTJ stacks include remaining portions of the magnetic stack layer and the hardmask, wherein the hardmask forms a self aligning contact between the magnetic stack layer and an upper metallization level subsequently formed above the MTJ stacks.

Abstract: In one embodiment, a semiconductor substrate is placed into a process chamber. A gas mixture including a silicon-containing gas, a fluorine-containing gas, an inert gas, and an oxygen gas is introduced into the chamber at a pressure range of from about 30 mTorr to about 90 mTorr. During this time, deposition and etching processes are concurrently performed using a plasma to form a high-density plasma (HDP) insulating layer on the semiconductor substrate. A ratio of deposition to etching is from about 3:1 to about 10:1. A ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is less than about 0.9.

Abstract: A plasma processing system and method wherein a power source produces a magnetic field and an electric field, and a window disposed between the power source and an interior of a plasma chamber couples the magnetic field into the plasma chamber thereby to couple power inductively into the chamber and based thereon produce a plasma in the plasma chamber. The window can be shaped and dimensioned to control an amount of power capacitively coupled to the plasma chamber by means of the electric field so that the amount of capacitively coupled power is selected in a range from zero to a predetermined amount. Also, a tuned antenna strap having r.f. power applied thereto to produce a standing wave therein can be arranged adjacent the window to couple magnetic field from a current maximum formed in the strap to the interior of the chamber.

Abstract: A Si etching method etches a Si wafer held on a susceptor placed in a processing vessel by a plasma-assisted etching process. A mixed etching gas prepared by mixing fluorosulfur gas, such as SF6 gas, or fluorocarbon gas, O2 gas and fluorosilicon gas, such as SiF4 gas is supplied into the processing vessel. RF power of 40 MHz or above is applied to the mixed etching gas to generate a plasma. The Si wafer is etched with radicals and ions contained in the plasma.

Abstract: A device and a method for etching a substrate, in particular a silicon body, by using an inductively coupled plasma. A high-frequency electromagnetic alternating field is generated using an ICP source, and an inductively coupled plasma composed of reactive particles is generated by the action of a high-frequency electromagnetic alternating field on a reactive gas in a reactor. In addition, a static or time-variable magnetic field is generated between the substrate and the ICP source, for which purpose at least two magnetic field coils arranged one above the other are provided. The direction of the resulting magnetic field is also approximately parallel to the direction defined by the tie line connecting the substrate and the inductively coupled plasma.

Abstract: The present invention is generally directed towards a method for removing hydrocarbon contamination from a substrate prior to a nitridation step, therein providing for a generally uniform nitridation of the substrate. The method comprises placing the substrate in a process chamber and flowing an oxygen-source gas into the process chamber. A first plasma is formed in the process chamber for a first predetermined amount of time, wherein the hydrocarbons combine with one or more species of the oxygen-source gas in radical form to form product gases. The gases are removed from the process chamber and a nitrogen-source gas is flowed into the process chamber. A second plasma is then formed in the process chamber for a second predetermined amount of time, therein nitriding the substrate in a significantly uniform manner.

Abstract: A plasma processing system that includes a plasma chamber, an open resonator movably mounted within the plasma chamber, and a detector. The open resonator produces a microwave signal, and the detector detects the microwave signal and measures a mean electron plasma density along a path of the signal within a plasma field. Alternatively, the plasma processing system includes a plasma chamber, a plurality of open resonators provided within the plasma chamber, a plurality of detectors, and a processor. The processor is configured to receive a plurality of mean electron plasma density measurements from the detectors that correspond to locations of the plurality of open resonators.

Abstract: In order to provide an etching method for silicone oxide film by fluorocarbon plasma in semiconductor production, which is superior in precise manufacturing and highly selective to resist and silicone nitride film, two kinds of electronic temperature regions are generated in plasma, and a generation ratio of CF2/F is controlled independently from a generation amount of ions by making areas of these two electronic temperature regions variable with a magnetic field gradient and a distance between a wafer and a wafer facing plane.

Abstract: A substrate etching chamber has a substrate support, a gas supply to introduce a process gas into the chamber; an inductor antenna to sustain a plasma of the process gas in a process zone of the chamber, and an exhaust to exhaust the process gas. A magnetic field generator disposed about the chamber has first and second solenoids. A controller is adapted to control a power supply to provide a first current to the first solenoid and a second current to the second solenoid, thereby generating a magnetic field in the process zone of the chamber to controllably shape the plasma in the process zone to reduce etch rate variations across the substrate.

Abstract: An improved chemical vapor deposition or etching is shown in which cyclotron resonance and photo or plasma CVD cooperate to deposit a layer with high performance at a high deposition speed. The high deposition speed is attributed to the cyclotron resonance while the high performance is attributed to the CVDs.

Abstract: An EEPROM device having improved data retention and process for fabricating the device includes a two-step deposition process for the fabrication of an ILD layer overlying the high voltage elements of an EEPROM memory cell. The ILD layer is fabricated by first depositing an insulating layer on a high voltage device layer and thermally treating insulating layer. A second insulating layer is then deposited to overlie the first insulating layer. An EEPROM device in accordance with the invention includes a floating-gate transistor having a specified threshold voltage. A thermally-treated, boron-doped oxide layer overlies the floating-gate transistor and a second oxide layer overlies the thermally-treated, boron-doped oxide layer. The memory device exhibits data retention characteristics, such that upon subjecting the device to a baked temperature of at least about 250° C. for at least about 360 hours, the threshold voltage of the floating-gate transistor shifts by no more than about 100 mV.

Abstract: A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.

Abstract: A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.

Abstract: The semiconductor device includes a semiconductor substrate and, in an element isolating region in the semiconductor substrate, a first active area A/A dummy pattern and a second A/A dummy pattern having a pitch smaller than that of the first A/A dummy pattern. Placement of the first A/A dummy pattern and placement of the second A/A dummy pattern are carried out in separate steps. The semiconductor substrate may be divided into a plurality of mesh regions, and a dummy pattern may be placed in each mesh region according to an area of the mesh region being occupied by an element pattern located therein.

Abstract: A technique of dry etching the surface of a wafer by using a dry etching apparatus in which the distance between a wafer and a surface facing the wafer is set to the half or less of the diameter of the wafer is disclosed. Even in the case of using, especially, a wafer having a large diameter, the incident amount of etching reaction by-products in the peripheral portion of the wafer and that in the center portion of the wafer are uniformed. Thus, a uniform etching process over the whole surface of the wafer can be realized.

Abstract: The processing with a low gate rate of destruction and high anisotropy is achieved in dry etching. Plasma is generated by ECR resonance of electromagnetic wave which arose by supplying Ultra High Frequency electric power in microstripline 4 arranged on the atmosphere side of a dielectric 2, which separates a vacuum inside and an outside and magnetic field. A conducting layer is etched by this plasma, which is stable and uniform plasma.

Abstract: A machine for manufacturing semiconductor devices has a processing chamber for processing the semiconductor wafer. A transfer chamber has at least two positions, one position to facilitate the transfer of a wafer to be processed into the transfer chamber and to facilitate the transfer of a processed wafer from the transfer chamber to the cassette from which the wafer originated. The second position facilitates the transfer of a wafer to and from the processing chamber. A transfer arm simultaneously transfers an unprocessed wafer from the first position to the second position with the transfer of a processed wafer from the second position to the first position.

Abstract: A method for etching a dielectric in a thermally controlled plasma etch chamber with an expanded processing window. The method is adapted to incorporate benefits of a the thermal control and high evacuation capability of the chamber. Etchent gases include hydrocarbons, oxygen and inert gas. Explanation is provided for enablling the use of hexafluoro-1,3-butadiene in a capacitively coupled etch plasma. The method is very useful for creating via, self aligned contacts, dual damascene, and other dielectric etch.

Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.

Abstract: The invention has for its objects to provide a multilayer thin film including a ferroelectric thin film having much more improved properties on an Si substrate and its fabrication process as well as an electron device comprising the same. This object is achieved by the provision of a multilayer thin film formed on an Si substrate by epitaxial growth, which comprises a buffer layer formed on the Si substrate, which layer includes an oxide thin film, a perovskite oxide thin film formed on the buffer layer, which film has a (100) or (001) orientation, and a ferroelectric thin film epitaxially grown on the perovskite oxide thin film and its fabrication process as well as an electron device comprising the same.

Abstract: To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.