Abstract: A structure forming method according to an aspect is a structure forming method for forming a first hole and a second hole having width smaller than width of the first hole in a substrate with dry etching and forming a structure. The structure forming method includes forming an etching mask on the substrate, etching a portion of the etching mask overlapping a first hole forming region where the first hole is formed, etching a portion of the etching mask overlapping a second hole forming region where the second hole is formed, and performing the dry etching of the substrate using the etching mask as a mask.

Abstract: A substrate processing method and a substrate processing apparatus are provided, which solve problems of pattern collapse and particles. The substrate processing method includes: a surface modification step of modifying a surface of a substrate having an oxide thereon to improve or reduce roughness of the surface; a surface cleaning step of supplying a treatment liquid to the modified surface of the substrate to clean the surface of the substrate with the treatment liquid; and a hydrophobization step of supplying a hydrophobizing agent to the cleaned surface of the substrate to hydrophobize the surface of the substrate.

Abstract: A metal resist cleaning liquid including a solvent, an organic acid, and a compound (B) represented by general formula (b-1) shown below (In the formula, Rb1 and Rb2 each independently represents an alkyl group having 1 to 3 carbon atoms; Rb3 and Rb4 each independently represents a hydrogen atom or an alkyl group having 1 to 3 carbon atoms; Yb1 represents a single bond, —O—, —S— or —N(Rb5)—; Rb5 represents a hydrogen atom or an alkyl group having 1 to 3 carbon atoms; Yb2 represents —O—, —S— or —N(Rb6)—; Rb6 represents a hydrogen atom or an alkyl group having 1 to 3 carbon atoms; and n represents an integer of 0 to 3).

Abstract: The present disclosure relates to a plasma device for alleviation of various skin troubles or for skin care, and provides a remote type plasma device wherein a plasma spray device is separated from the body thereof and is connected to a controller in the body. Plasma is produced under atmospheric pressure at room temperature. The plasma device of the present disclosure includes a dielectric barrier and thus can maintain stable glow discharge. Atmospheric plasma is unexceptionally sprayed through a ground electrode, and thus does not electrically irritate the skin at all.

Abstract: Exemplary methods for selective etching of semiconductor materials may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may also include flowing a silicon-containing suppressant into the processing region of the semiconductor processing chamber. The methods may further include contacting a substrate with the fluorine-containing precursor and the silicon-containing suppressant. The substrate may include an exposed region of silicon nitride and an exposed region of silicon oxide. The methods may also include selectively etching the exposed region of silicon nitride to the exposed region of silicon oxide.

Abstract: A method of catalyst-assisted chemical etching with a vapor-phase etchant has been developed. In one approach, a semiconductor substrate including a patterned titanium nitride layer thereon is heated, and an oxidant and an acid are evaporated to form a vapor-phase etchant comprising an oxidant vapor and an acid vapor. The semiconductor substrate and the patterned titanium nitride layer are exposed to the vapor-phase etchant during the heating of the semiconductor substrate. The vapor-phase etchant diffuses through the patterned titanium nitride layer, and titanium nitride-covered regions of the semiconductor substrate are etched. Thus, an etched semiconductor structure is formed.

Abstract: A regenerative electroless etching process produces nanostructured semiconductors in which an oxidant (Ox1) is used as a catalytic agent to facilitate reaction between a semiconductor and a second oxidant (Ox2) that would be unreactive (or slowly reactive compared to Ox1) in the primary reaction. Ox2 is used to regenerate Ox1, which can initiate etching by injecting holes into the semiconductor valence band. The extent of reaction is controlled by the amount of Ox2 added; the reaction rate, by the injection rate of Ox2. This general strategy is demonstrated specifically to produce highly luminescent nanocrystalline porous, amorphous pillared, and hierarchical porous silicon from the reaction of V2O5 in HF(aq) as Ox1 and H2O2(aq) as Ox2 with a silicon-comprising substrate. The process can be performed on silicon-comprising substrates of arbitrary size and shape including powders, reclaimed shards, wafers, pillared silicon, porous silicon, and silicon nanowires.

Abstract: Systems and techniques for using a three-dimension (3D) resist profile aware etch-bias model are described. A 3D resist profile aware etch-bias model can be calibrated based on empirical data. Next, the 3D resist profile aware etch-bias model can be used in one or more applications, including, but not limited to, lithography verification, etch correction, optical proximity correction, and assist feature placement.

Abstract: The temperature of a substrate is elevated rapidly while improving the temperature uniformity of the substrate. The substrate is loaded into a process chamber, the loaded substrate is supported on a first substrate support unit, a gas is supplied to the process chamber, the temperature of the substrate supported on the first substrate support unit is elevated in a state of increasing the pressure in the process chamber to higher than the pressure during loading of the substrate or in a state of increasing the pressure in the process chamber to higher than the pressure during processing for the surface of the substrate, the substrate supported on the first substrate support unit is transferred to the second substrate support unit and supported thereon after lapse of a predetermined time, and the surface of substrate is processed while heating the substrate supported on the second substrate support unit.

Abstract: The invention relates to a method for electron beam induced etching of a material (100, 200) with the method steps providing at least one etching gas at a position of the material (100, 200) at which an electron beam impacts on the material (100, 200) and simultaneously providing at least one passivation gas which is adapted for slowing down or inhibiting a spontaneous etching by the at least one etching gas.

Abstract: A cluster source is used to assist charged particle beam processing. For example, a protective layer is applied using a cluster source and a precursor gas. The large mass of the cluster and the low energy per atom or molecule in the cluster restricts damage to within a few nanometers of the surface. Fullerenes or clusters of fullerenes, bismuth, gold or Xe can be used with a precursor gas to deposit material onto a surface, or can be used with an etchant gas to etch the surface. Clusters can also be used to deposit material directly onto the surface to form a protective layer for charged particle beam processing or to provide energy to activate an etchant gas.

Abstract: Methods for etching an etching stop layer disposed on the substrate using a cyclical etching process are provided. In one embodiment, a method for etching an etching stop layer includes performing a treatment process on the substrate having a silicon nitride layer disposed thereon by supplying a treatment gas mixture into the processing chamber to treat the silicon nitride layer, and performing a chemical etching process on the substrate by supplying a chemical etching gas mixture into the processing chamber, wherein the chemical etching gas mixture includes at least an ammonium gas and a nitrogen trifluoride, wherein the chemical etching process etches the treated silicon nitride layer.

Abstract: Etching of a thin film stack including a lower thin film layer containing an advanced memory material is carried out in an inductively coupled plasma reactor having a dielectric RF window without exposing the lower thin film layer, and then the etch process is completed in a toroidal source plasma reactor.

Abstract: A load lock includes a chamber including an upper portion, a lower portion, and a partition between the upper portion and the lower portion, the partition including an opening therethrough. The load lock further includes a first port in communication with the upper portion of the chamber and a second port in communication with the lower portion of the chamber. The load lock includes a rack disposed within the chamber and a workpiece holder mounted on a first surface of the rack, wherein the rack and the workpiece holder are movable by an indexer that is capable of selectively moving wafer slots of the rack into communication with the second port. The indexer can also move the rack into an uppermost position, at which the first surface of the boat and the partition sealingly separate the upper portion and the lower portion to define an upper chamber and a lower chamber. Auxiliary processing, such as wafer pre-cleaning, or metrology can be conducted in the upper portion.

Abstract: A method for etching with a laser beam having a predetermined wavelength an area of a layer of a first material, said area being deposited at the surface of at least two second materials, includes: depositing a layer of a third material on the layer of the first material, the first and the third materials having a chemical affinity on application of the laser beam greater than the chemical affinity during said application between the first material and each of said at least two second materials; and applying the laser beam to an area of a free surface of the layer of third material vertically above the area of the layer of first material with a fluence of said laser beam causing the separation of said area.

Abstract: Bare aluminum baffles are adapted for resist stripping chambers and include an outer aluminum oxide layer, which can be a native aluminum oxide layer or a layer formed by chemically treating a new or used bare aluminum baffle to form a thin outer aluminum oxide layer.

Abstract: A plasma processing apparatus includes a heater in thermal contact with a showerhead electrode, and a temperature controlled top plate in thermal contact with the heater to maintain a desired temperature of the showerhead electrode during semiconductor substrate processing. A gas distribution member supplies a process gas and radio frequency (RF) power to the showerhead electrode.

Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

Abstract: A method for producing a deep trench in a substrate includes a series of elementary etch cycles each etching a portion of the trench. Each elementary cycle includes deposition of a passivation layer on the sidewalls and the bottom of the trench portion etched during previous cycles; followed by pulsed plasma anisotropic ion etching of the trench portion etched during previous cycles, the etching; being implemented in an atmosphere comprising a passivating species; and including a first etch sequence followed by a second etch sequence of less power than the power of the first etch sequence. The first etch sequence etches the passivation layer deposited in the bottom of the portion so as to access the substrate and etches the free substrate at the bottom of the portion while leaving a passivation layer on sidewalls of the portion.

Abstract: Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF6/O2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from ?80 degrees Celsius to ?140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

Abstract: A seed layer comprises a bottom seed layer portion formed on the bottom of a via opening, a sidewall seed layer portion formed on an upper portion of the sidewall of the via opening and a corner seed layer portion formed between the bottom seed layer portion and the sidewall seed layer portion. The sidewall seed layer portion is of a first thickness. The corner seed layer portion is of a second thickness and the second thickness is greater than the first thickness.

Abstract: A gas switching system for a gas distribution system for supplying different gas compositions to a chamber, such as a plasma processing chamber of a plasma processing apparatus, is provided. The chamber can include multiple zones, and the gas switching section can supply different gases to the multiple zones. The switching section can switch the flows of one or more gases, such that one gas can be supplied to the chamber while another gas can be supplied to a by-pass line, and then switch the gas flows.

Abstract: An electronic device includes a first electrode made of an inert material; a second electrode made of a soluble material; a solid electrolyte made of an ion-conductive material, wherein the first and second electrodes are in contact respectively with one of the faces of the electrolyte, either side of the electrolyte, wherein the second electrode supplies mobile ions flowing in the electrolyte towards the first electrode, to form a conductive filament when a voltage is applied between the first and second electrodes. The second electrode is a confinement electrode that includes an end surface in contact with the electrolyte which is less than the available surface of the electrolyte, such that confinement of the contact area of the confinement electrode on the solid electrolyte is obtained.

Abstract: The present invention provides, in a plasma etching method for plasma-etching a magnetic film, a plasma etching method that allows a desired etching depth to be obtained regardless of the opening size of a mask. The present invention is, in a plasma etching method for plasma-etching a magnetic film by using a tantalum film as a mask, characterized by including: a first process to plasma-etch the magnetic film to a desired depth by using a mixed gas of an ammonia gas and a helium gas; and a second process, after the first process, to plasma-etch the magnetic film etched to the prescribed depth by using a mixed gas of an ammonia gas and a gas containing the oxygen element or a mixed gas of an ammonia gas and a gas containing a hydroxyl group.

Abstract: In accordance with the invention, there are methods of controlling the sidewall angle of a polysilicon gate from batch to batch while maintaining current bottom critical dimension control performance. The method can include generating a correlation between a sidewall angle of a gate and RF bias power and etch time of one or more etch steps during the formation of the gate, developing a statistical model for the sidewall angle as a function of one or more of polysilicon density, polythickness, and etcher, and predicting a sidewall angle using the statistical model for a given polydensity, a given polythickness, and a given etcher. The method can also include comparing the predicted sidewall angle with a target sidewall angle and determining an optimized RF bias power and optimized etch time of one or more etch steps during the formation of the gate using the correlation to match the target sidewall angle.

Abstract: The present invention discloses a method of fabricating a semiconductor device. In the present invention, after the formation of a photo-resist mask on a substrate, the photo-resist is subjected to a plasma pre-treatment, and then etch is conducted. With the plasma pre-treatment, a line width roughness of a linear pattern of the photo-resist can be improved, and thus much better linear patterns can be formed on the substrate during the subsequent etching steps.

Abstract: Methods and apparatus for controlling microloading, such as within cell microloading between adjacent cells or isolated/dense microloading between areas of isolated or dense features during shallow trench isolation (STI) fabrication processes, or other trench fabrication processes, are provided herein. In some embodiments, a method for fabricating STI structures may include providing a substrate having a patterned mask layer formed thereon corresponding to one or more STI structures to be etched; etching the substrate through the patterned mask layer using a plasma formed from a process gas to form one or more STI structure recesses on the substrate; and pulsing the plasma for at least a portion of etching the substrate to control at least one of a depth or width of the one or more STI structure recesses.

Abstract: Methods of patterning low-k dielectric films are described.

Abstract: There is provided a plasma processing apparatus capable of optimizing a plasma process in response to various requirements of a micro processing by effectively controlling a RF bias function. In this plasma processing apparatus, a high frequency power RFH suitable for generating plasma of a capacitively coupling type is applied to an upper electrode 48 (or lower electrode 16) from a third high frequency power supply 66, and two high frequency powers RFL1 (0.8 MHz) and RFL2 (13 MHz) suitable for attracting ions are applied to the susceptor 16 from first and second high frequency power supplies 36 and 38, respectively, in order to control energy of ions incident onto a semiconductor wafer W from the plasma. A control unit 88 controls a total power and a power ratio of the first and second high frequency powers RFL1 and RFL2 depending on specifications, conditions or recipes of an etching process.

Abstract: Provided are methods of etching a substrate using atomic layer deposition apparatus. Atomic layer deposition apparatus including a gas distribution plate with a thermal element are discussed. The thermal element is capable of locally changing the temperature of a portion of the surface of the substrate to vaporize an etch layer deposited on the substrate.

Abstract: A processed object processing apparatus which enables a plurality of processes to be carried out efficiently. A plurality of treatment systems are communicably connected together in a line and in which the objects to be processed are processed. A load lock system is communicably connected to the treatment systems and has a transfer mechanism that transfers the objects to be processed into and out of each of the treatment systems. At least one of the treatment systems is a vacuum treatment system, and the load lock system is disposed in a position such as to form a line with the treatment systems.

Abstract: A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.

Abstract: A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.

Abstract: A plasma processing apparatus is provided which includes an inert gas supply route connected to a process gas supply piping which supplies a process gas into a processing chamber in a vacuum vessel, a valve which opens or closes the inert gas supply route, and an adjuster which adjusts a flow rate of the inert gas. When processing of a sample is complete, an inert gas is supplied into the process gas supply piping so that a pressure in the process gas supply piping is maintained at a pressure higher than a pressure at which a compound of the process gas and a material of an inner wall of the process gas supply piping vaporizes.

Abstract: In a manufacturing process of a semiconductor device, a manufacturing technique for reducing the number of lithography processes using a photoresist and simplifying the process is provided, and the throughput is improved. An etching mask for forming a pattern of a layer to be processed such as a conductive layer or a semiconductor layer is manufactured without using a lithography technique that uses a photoresist. The etching mask is formed of a stacked layer structure of a light absorption layer and an insulating layer utilizing laser ablation by laser beam irradiation through a photomask.

Abstract: A method includes the steps of: (a) fixing a front surface of a wafer (semiconductor wafer) having the front surface, a plurality of chip regions formed on the front surface, a dicing region formed between the chip regions, and a rear surface opposite to the front surface to the supporting member; (b) in a state of having the wafer fixed to the supporting member, grinding the rear surface of the wafer to expose the rear surface; (c) in a state of having the wafer fixed to the supporting member, dividing the wafer into the chip regions; (d) etching side surfaces of the chip regions to remove crushed layers formed in the step (c) on the side surfaces and obtain a plurality of semiconductor chips. After the steps (e) and (d), the plurality of divided chip regions are peeled off from the supporting member to obtain a plurality of semiconductor chips.

Abstract: A method of manufacturing a semiconductor device includes: accommodating a substrate having an oxide film formed thereon into a processing chamber; supplying a process gas to the substrate; performing a preprocessing step in which the process gas is excited in a state that a pressure within the processing chamber is kept at a first pressure and an electric potential of the substrate is kept at a first electric potential; and performing a main processing step by which the process gas is excited in a state that the pressure within the processing chamber is kept at a second pressure and the electric potential of the substrate is kept at a second electric potential, wherein the first pressure is lower than the second pressure and the first electric potential is lower than the second electric potential.

Abstract: Etching equipment and methods are disclosed herein for more efficient etching of sacrificial material from between permanent MEMS structures. An etching head includes an elongate etchant inlet structure, which may be slot-shaped or an elongate distribution of inlet holes. A substrate is supported in proximity to the etching head in a manner that defines a flow path substantially parallel to the substrate face, and permits relative motion for the etching head to scan across the substrate.

Abstract: An anisotropically conductive member has an insulating base material, and conductive paths composed of a conductive material which pass in a mutually insulated state through the insulating base material in a thickness direction thereof and which are provided in such a way that a first end of each conductive path is exposed on a first side of the insulating base material and a second end of each conductive path is exposed on a second side of the insulating base material. The conductive paths have a density of at least 2 million paths/mm2 and the insulating base material is a structure composed of an anodized aluminum film having micropores therein.

Abstract: A process is provided for etching a mask layer and removal of residue from a structure having an area sheltered from directional etching. The structure has a shape that forms a silhouette area obstructed from being etched by anisotropic bombardment originating from a first direction, and a mask formed over the mask layer over the structure; A first etch process removes at least a part of the mask layer and retains at least a part of mask layer in the sheltered area. A second etch process removes at least a part of the mask layer in the sheltered area by hydrogen based microwave plasma etching.

Abstract: A method for manufacturing a device comprising a structure with nanowires based on a semiconducting material such as Si and another structure with nanowires based on another semiconducting material such as SiGe, and is notably applied to the manufacturing of transistors.

Abstract: A method of etching silicon-containing material is described and includes a SiConi™ etch having a greater or lesser flow ratio of hydrogen compared to fluorine than that found in the prior art. Modifying the flow rate ratios in this way has been found to reduce roughness of the post-etch surface and to reduce the difference in etch-rate between densely and sparsely patterned areas. Alternative means of reducing post-etch surface roughness include pulsing the flows of the precursors and/or the plasma power, maintaining a relatively high substrate temperature and performing the SiConi™ in multiple steps. Each of these approaches, either alone or in combination, serve to reduce the roughness of the etched surface by limiting solid residue grain size.

Abstract: An ion source that utilizes exited and/or atomic gas injection is disclosed. In an ion beam application, the source gas can be used directly, as it is traditionally supplied. Alternatively or additionally, the source gas can be altered by passing it through a remote plasma source prior to being introduced to the ion source chamber. This can be used to create excited neutrals, heavy ions, metastable molecules or multiply charged ions. In another embodiment, multiple gasses are used, where one or more of the gasses are passed through a remote plasma generator. In certain embodiments, the gasses are combined in a single plasma generator before being supplied to the ion source chamber. In plasma immersion applications, plasma is injected into the process chamber through one or more additional gas injection locations. These injection locations allow the influx of additional plasma, produced by remote plasma sources external to the process chamber.

Abstract: A method for etching a line pattern in an etch layer disposed below an antireflective coating (ARC) layer below a patterned mask is provided. The method includes opening the ARC layer, in which an ARC opening gas comprising CF3I, a fluorocarbon (including hydrofluorocarbon) containing gas, and an oxygen containing gas are provided, a plasma is formed from the ARC opening gas to open the ARC layer, and providing the ARC opening gas is stopped. Line pattern features are etched into the etch layer through the opened ARC layer.

Abstract: In a process for forming trenches having M different widths in a substrate, a passivation step and an etching step are alternately performed. The passivation step includes depositing a passivation layer on a bottom of the trenches by converting gas introduced in a chamber into plasma. The etching step includes removing the passivation layer on the bottom of the trenches and applying reactive ion etching to the bottom to increase a depth of the trenches. The etching step further includes setting energy for the reactive ion etching to a predetermined value when the passivation layer on the bottom of the trench having the Nth smallest width is removed. The value allows the etching amount of the trench having the Nth smallest width to be equal to or greater than the etching amount of the trench having the (N+1)th smallest width.

Abstract: An inspection method comprises focusing a particle beam onto a sample; operating at least one detector located close to the sample; assigning detection signals generated by the at least one detector to different intensity intervals; determining, based on the detection signals assigned to the intensity intervals, at least one first signal component related to electrons incident on the detector; and determining, based on the detection signals assigned to the intensity intervals, at least one second signal component related to X-rays incident on the detector.

Abstract: A laser absorption layer is first selectively formed in a seal pattern region surrounding an array of electromechanical systems elements, followed by depositing an antistiction layer as a blanket layer over the substrate and the laser absorption layer. The antistiction layer is then selectively removed from the seal pattern using a laser. An epoxy sealing material is provided in the seal pattern where the antistiction layer was removed and a backplate is sealed to the substrate using epoxy.

Abstract: Embodiments of the invention generally relate to methods for treating a silicon-containing material on a substrate surface and performing a chamber clean process. In one embodiment, a method includes positioning a substrate containing a silicon material having a contaminant thereon within a process chamber and exposing the substrate to an etching gas containing chlorine gas and a silicon source gas while removing the contaminant and maintaining a temperature of the substrate within a range from about 500° C. to less than about 800° C. during an etching process. The method further includes exposing the substrate to a deposition gas after the etching process during a deposition process and exposing the process chamber to a chamber clean gas containing chlorine gas and the silicon source gas after the deposition process during a chamber clean process. The chamber clean process limits the etching of quartz and metal surfaces within the process chamber.

Abstract: A method for fabricating electrostatic transducers and arrays electrically separates the substrate segments of the transducer elements from each other using a technique involving two cutting steps, in which the first step forms a patterned opening in the substrate to make a partial separation of substrate segments, and the second step completes the separation after the substrate segments have been secured to prevent instability of the substrate segments upon completion of the second step. The securing of the substrate segments may be accomplished by filling a nonconductive material in the partial separation or securing the transducer array on a support substrate. When the substrate is conductive, the separated substrate segments serve as separate bottom electrodes that can be individually addressed. The method is especially useful for fabricating ID transducer arrays.