Having Reflective Or Antireflective Component Patents (Class 438/72)
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Patent number: 9024177Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.Type: GrantFiled: April 10, 2013Date of Patent: May 5, 2015Assignee: AU Optronics Corp.Inventors: Peng Chen, Shuo-Wei Liang
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Patent number: 9023681Abstract: The present invention discloses a method of fabricating a heterojunction battery, comprising the steps of: depositing a first amorphous silicon intrinsic layer on the front of an n-type silicon wafer, wherein the n-type silicon wafer may be a monocrystal or polycrystal silicon wafer; depositing an amorphous silicon p layer on the first amorphous silicon intrinsic layer; depositing a first boron doped zinc oxide thin film on the amorphous silicon p layer; forming a back electrode and an Al-back surface field on the back of the n-type silicon wafer; and forming a positive electrode on the front of the silicon wafer. In addition, the present invention further discloses a method of fabricating a double-sided heterojunction battery. In the present invention, the boron doped zinc oxide is used as an anti-reflection film in place of an ITO thin film; due to the special nature, especially the light trapping effect of the boron doped zinc oxide, the boron doped zinc oxide can achieve good anti-reflection.Type: GrantFiled: September 25, 2013Date of Patent: May 5, 2015Assignee: Chint Solar (Zhejiang) Co., Ltd.Inventors: Xinwei Niu, Cao Yu, Lan Ding, Junmei Rong, Shiyong Liu, Minghua Wang, Jinyan Hu, Weizhi Han, Yongmin Zhu, Hua Zhang, Tao Feng, Jianbo Jin, Zhanwei Qiu, Liyou Yang
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Publication number: 20150114445Abstract: A solar cell device and a method of fabricating the same are described. The method of fabricating a solar cell includes forming a photovoltaic substructure including a substrate, back contact, absorber and buffer, forming a transparent cover separate from the photovoltaic substructure including a transparent layer and a plasmonic nanostructured layer in contact with the transparent layer, and adhering the transparent cover on top of the photovoltaic substructure. The plasmonic nanostructured layer can include metal nanoparticles.Type: ApplicationFiled: October 25, 2013Publication date: April 30, 2015Applicant: TSMC SOLAR LTD.Inventors: Jyh-Lih WU, Wen-Tsai YEN, Wei-Lun XU
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Publication number: 20150096609Abstract: A method of fabricating a photovoltaic device includes forming an absorber layer comprising an absorber material above a substrate, forming a buffer layer over the absorber layer, forming a front transparent layer over the buffer layer, and exposing the photovoltaic device to heat or radiation at a temperature from about 80° C. to about 500° C. for a period of time, subsequent to the step of forming a buffer layer over the absorber layer.Type: ApplicationFiled: October 8, 2013Publication date: April 9, 2015Applicant: TSMC Solar Ltd.Inventor: Tzu-Huan CHENG
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Patent number: 8999744Abstract: Provided are an avalanche photodiode and a method of fabricating the same. The method of fabricating the avalanche photodiode includes sequentially forming a compound semiconductor absorption layer, a compound semiconductor grading layer, a charge sheet layer, a compound semiconductor amplification layer, a selective wet etch layer, and a p-type conductive layer on an n-type substrate through a metal organic chemical vapor deposition process.Type: GrantFiled: March 20, 2014Date of Patent: April 7, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Mi-Ran Park, O-Kyun Kwon
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Patent number: 8999740Abstract: A solar cell according to an embodiment of the invention includes a substrate configured to have a plurality of via holes and a first conductive type, an emitter layer placed in the substrate and configured to have a second conductive type opposite to the first conductive type, a plurality of first electrodes electrically coupled to the emitter layer, a plurality of current collectors electrically coupled to the first electrodes through the plurality of via holes, and a plurality of second electrodes electrically coupled to the substrate. The plurality of via holes includes at least two via holes having different angles.Type: GrantFiled: September 14, 2012Date of Patent: April 7, 2015Assignee: LG Electronics Inc.Inventors: Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
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Patent number: 8999813Abstract: A method of forming a focal plane array by: forming a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer, the sensing material being a thermistor material defining at least one pixel; providing supporting legs for the pixel within the sacrificial layer, covering them with a further sacrificial layer and forming first conductive portions in the surface of the sacrificial layer that are in contact with the supporting legs; forming a second wafer having read-out integrated circuit (ROIC), the second wafer being covered by another sacrificial layer, into which is formed second conductive portions in contact with the ROIC; bringing the sacrificial oxide layers of the first wafer and second wafer together such that the first and second conductive portions are aligned and bonding them together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; and removing the sacrificial lType: GrantFiled: March 1, 2011Date of Patent: April 7, 2015Assignee: SensoNor ASInventors: Adriana Lapadatu, Gjermund Kittilsland
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Publication number: 20150090331Abstract: Thin-layer photovoltaic cell structure with mirror layer. The invention relates to a photovoltaic cell structure intended for solar panel applications. The thin layer photovoltaic cell structure comprises at least one I-III-VI2 alloy layer (CIGS) with photovoltaic properties for the conversion of illuminating light into electricity. In particular, the structure comprises at least: one mirror layer (MR) comprising a surface reflecting (FR) a part of the illuminating light, where said reflecting surface (FR) is facing a first face (F1) of the I-III-VI2 alloy layer for receiving reflected illuminating light on said first face; and one or more first layers (CA, ENC) transparent to the illuminating light for receiving transmitted illuminating light on a second face (F2) of the I-III-VI2 alloy layer opposite to the first face (F1).Type: ApplicationFiled: March 28, 2013Publication date: April 2, 2015Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE-CNRS, ELECTRICITE DE FRANCEInventors: Negar Naghavi, Zacharie Jehl, Daniel Lincot, Jean-Francois Guillemoles
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Patent number: 8993411Abstract: A method for forming a pad in a wafer with a three-dimensional stacking structure is disclosed. The method includes bonding a device wafer that includes an Si substrate and a handling wafer, thinning a back side of the Si substrate, depositing an anti-reflective layer on the thinned back side of the Si substrate, depositing a back side dielectric layer on the anti-reflective layer, defining a space for a pad in the back side dielectric layer and forming vias that pass through the back side dielectric layer and the anti-reflective layer and contact back sides of super contacts which are formed on the Si substrate, filling one or more metals in the vias and the defined space for the pad, and removing a remnant amount of the metal filled in the space for the pad through planarization by a CMP (chemical mechanical polishing) process.Type: GrantFiled: February 23, 2013Date of Patent: March 31, 2015Assignee: Siliconfile Technologies Inc.Inventors: Heui-Gyun Ahn, Se-Jung Oh, In-Gyun Jeon, Jun-Ho Won
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Publication number: 20150087102Abstract: A method comprises implanting ions in a substrate to form a plurality of photo diodes, forming an interconnect layer over a first side of the substrate and applying a first halogen treatment process to a second side of the substrate and forming a first silicon-halogen compound layer over the second side of the substrate as a result of applying the first halogen treatment process.Type: ApplicationFiled: November 19, 2014Publication date: March 26, 2015Inventors: Shiu-Ko JangJian, Chin-Nan Wu, Chun Che Lin
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Publication number: 20150087106Abstract: In various embodiments, photovoltaic devices incorporate discontinuous passivation layers (i) disposed between a thin-film absorber layer and a partner layer, (ii) disposed between the partner layer and a front contact layer, and/or (iii) disposed between a back contact layer and the thin-film absorber layer.Type: ApplicationFiled: September 22, 2014Publication date: March 26, 2015Inventors: Markus Eberhard Beck, Timothy J. Nagle, Sourav Roger Basu
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Publication number: 20150083209Abstract: The present invention aims to provide a coatable diffusing agent composition that can prevent the formation of precipitates, has a longer solution life than conventional PTG solutions free of water, and thus can be stably stored for a long period of time even when this PTG solution is produced in large quantities, and is highly cost effective. The coatable diffusing agent composition of the present invention includes a titanate, a phosphorus compound, water, and an organic solvent.Type: ApplicationFiled: March 27, 2013Publication date: March 26, 2015Applicants: NAGASE CHEMTEX CORPORATION, SHARPP KABUSHIKI KAISHAInventors: Yosuke Ooi, Daisuke Hironiwa, Takahiro Hashimoto, Yosuke Maruyama
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Patent number: 8987588Abstract: A solar cell and method of fabricating the same are provided. The substrate of the solar cell has heavily-doped regions and lightly-doped regions. The anode and the cathode are disposed on the back surface of the substrate, and thus the amount of incident light on the front surface of the substrate is increased. The anode and the cathode are in contact with the heavily doped regions to form selective emitter structure, and thus the contact resistance is reduced. The lightly-doped regions, which are not in contact with the anode and the cathode, have lower saturation current, and thus recombination of hole-electron pairs is reduced, and absorption of infrared light is increased.Type: GrantFiled: April 15, 2013Date of Patent: March 24, 2015Assignee: AU Optronics Corp.Inventors: Peng Chen, Shou-Wei Liang
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Patent number: 8987039Abstract: A process is provided for making a photovoltaic device comprising a silicon substrate comprising a p-n junction, the process comprising the steps of: forming an amorphous silicon carbide antireflective coating over at least one surface of the silicon substrate by chemical vapor deposition of a composition comprising a precursor selected from the group consisting of an organosilane, an aminosilane, and mixtures thereof, wherein the amorphous silicon carbide antireflective coating is a film represented by the formula SivCxNuHyFz, wherein v+x+u+y+z=100%, v is from 1 to 35 atomic %, x is from 5 to 80 atomic %, u is from 0 to 50 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %.Type: GrantFiled: October 2, 2008Date of Patent: March 24, 2015Assignee: Air Products and Chemicals, Inc.Inventors: Patrick Timothy Hurley, Robert Gordon Ridgeway, Raymond Nicholas Vrtis, Mark Leonard O'Neill, Andrew David Johnson
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Publication number: 20150079721Abstract: A method for producing a heterojunction photovoltaic cell includes formation of at least one anti-glare layer on which at least one metal track is formed. The method includes heat treatment to make the contact connection between the track and the anti-glare layer. The heat treatment selectively applies a laser beam on the track to generate a heat input up to anti-glare layer.Type: ApplicationFiled: April 10, 2013Publication date: March 19, 2015Inventors: Samuel Gall, Maria-Delfina Munoz
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Publication number: 20150075598Abstract: A method for forming contacts on a photovoltaic device includes forming a heterojunction cell including a substrate, a passivation layer and a doped layer and forming a transparent conductor on the cell. A patterned barrier layer is formed on the transparent conductor and has openings therein wherein the transparent conductor is exposed through the openings in the barrier layer. A conductive contact is grown through the openings in the patterned barrier layer by a selective plating process.Type: ApplicationFiled: September 19, 2013Publication date: March 19, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bahman Hekmatshoartabari, Warren S. Rieutort-Louis
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Publication number: 20150076646Abstract: A backside illumination semiconductor image sensing device includes a semiconductor substrate. The semiconductor substrate includes a radiation sensitive diode and a peripheral region. The peripheral region is proximal to a sidewall of the backside illumination semiconductor image sensing device. The backside illumination semiconductor image sensing device further includes a first anti reflective coating (ARC) on a backside of the semiconductor substrate and a dielectric layer on the first anti reflective coating. Additionally, a radiation shielding layer is disposed on the dielectric layer. Moreover, the backside illumination semiconductor image sensing device has a photon blocking layer on the sidewall of the of the backside illumination semiconductor image sensing device. The at least a portion of a sidewall of the radiation shielding layer is not covered by the photon blocking layer and the photon blocking layer is configured to block photons penetrating into the semiconductor substrate.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: HUNG-WEN HSU, JUNG-I LIN, CHING-CHUNG SU, JIECH-FUN LU, YEUR-LUEN TU, CHIA-SHIUNG TSAI
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Publication number: 20150076638Abstract: Embodiments of mechanisms of a backside illuminated image sensor device structure are provided. The backside illuminated image sensor device structure includes a substrate having a frontside and a backside and a pixel array formed in the frontside of the substrate. The backside illuminated image sensor device structure further includes an antireflective layer formed over the backside of the substrate, and the antireflective layer is made of silicon carbide nitride.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo-Chang SU, Chih-Ho TAI, Wei-Chih WENG, Hsun-Ying HUANG, Hsien-Liang MENG
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Publication number: 20150069564Abstract: Solid-state imaging devices, methods to produce the solid-state imaging devices, and electronic apparatuses including the solid-state imaging devices, where the solid-state imaging devices include a semiconductor substrate including a light receiving surface; a plurality of photoelectric conversion parts provided within the semiconductor substrate; and a plurality of reflection portions provided in the semiconductor substrate on a side of the photoelectric conversion parts that is opposite from the light receiving surface; where each of the reflection portions includes a reflection plate and a plurality of metal wirings, and where the plurality of metal wirings are disposed in a same layer of the semiconductor substrate as the reflection plate.Type: ApplicationFiled: September 3, 2014Publication date: March 12, 2015Inventors: Keisuke Hatano, Atsushi Toda
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Publication number: 20150072463Abstract: Silicon solar cells and contacts thereof are printed in at least a two stage printing process where the busbars and fingerlines may be printed separately. A reduction in silver content in busbars and fingerlines through use of the techniques of the invention have been realized, including the use of certain base metals, while maintaining low contact resistance similar to silver pastes.Type: ApplicationFiled: April 18, 2013Publication date: March 12, 2015Inventors: Yi Yang, Aziz S. Shaikh, Kristina McVicker, Klaus Kunze, Srinivasan Sridharan
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Patent number: 8975109Abstract: A method for producing a solar battery cell, includes: a first step of forming an insulating film on one face side of a semiconductor substrate; a second step of forming an electrode forming groove in an electrode forming region on the insulating film; a third step of printing an electrode printing paste including metal particles as a main component to a width that covers the electrode forming groove and a region sandwiching the electrode forming groove on the insulating film and that is wider than a width of the electrode forming groove, and then drying the electrode printing paste; and a fourth step of forming an electrode with the width of the electrode forming groove by firing the electrode paste at a temperature that is equal to or higher than a melting point of the metal particles or that is equal to or higher than a eutectic temperature, and accumulating and solidifying the electrode paste on the electrode forming groove.Type: GrantFiled: July 22, 2009Date of Patent: March 10, 2015Assignee: Mitsubishi Electric CorporationInventor: Mitsunori Nakatani
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Publication number: 20150059850Abstract: A device and method of improving efficiency of a thin film solar cell by providing a back reflector between a back electrode layer and an absorber layer. Back reflector reflects sunlight photons back into the absorber layer to generate additional electrical energy. The device is a photovoltaic device comprising a substrate, a back electrode layer, a back reflector, an absorber layer, a buffer layer, and a front contact layer. The back reflector is formed as a plurality of parallel lines.Type: ApplicationFiled: August 29, 2013Publication date: March 5, 2015Applicant: TSMC SOLAR LTD.Inventors: Jyh-Lih WU, Li XU, Wen-Tsai YEN, Chung-Hsien WU
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Publication number: 20150064835Abstract: The invention relates to a method for producing a solar cell having a substrate made of silicon, which substrate has a silicon oxide layer present on the surface of the substrate and an antireflection layer applied to the silicon oxide layer, which antireflection layer is deposited onto the dielectric passivation layer in a process chamber. According to the invention, in order to achieve a stability of corresponding solar cells or solar cell modules produced therefrom against a potential induced degradation (PID), the dielectric passivation layer is formed from the surface of the substrate in the process chamber by means of a plasma containing an oxidizing gas.Type: ApplicationFiled: February 22, 2013Publication date: March 5, 2015Inventors: Jens Dirk Moschner, Henning Nagel, Agata Lachowicz, Markus Fiedler
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Patent number: 8969107Abstract: A method of manufacturing a nano-rod and a method of manufacturing a display substrate in which a seed including a metal oxide is formed. A nano-rod is formed by reacting the seed with a metal precursor in an organic solvent. Therefore, the nano-rod may be easily formed, and a manufacturing reliability of the nano-rod and a display substrate using the nano-rod may be improved.Type: GrantFiled: March 19, 2012Date of Patent: March 3, 2015Assignee: Samsung Display Co., Ltd.Inventors: Tae-Young Choi, Bo-Sung Kim, Kwang-Yeol Lee, See-Won Kim
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Patent number: 8969186Abstract: A method for manufacturing a photovoltaic cell with a selective emitter, including the steps of: depositing an antireflection layer including n-type dopants on an n- or p-type silicon substrate, said deposition being, performed in the presence of a chemical compound that accelerates the diffusion of n-type dopant atoms in said substrate; overdoping at least one area of the substrate to form at least one n++ overdoped emitter by local diffusion of the n dopants of at least one area of the antireflection layer; depositing at least one n-type conductive material on the at least one n++ overdoped emitter; and at least one p-type conductive material on the surface of the substrate opposite to that including the antireflection layer; forming the n contacts and the p contacts simultaneously to the forming of an n+ emitter by an anneal capable of diffusing within the substrate n dopants from the antireflection layer.Type: GrantFiled: November 8, 2013Date of Patent: March 3, 2015Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Bertrand Paviet-Salomon, Samuel Gall, Sylvain Manuel
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Patent number: 8969991Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.Type: GrantFiled: February 11, 2014Date of Patent: March 3, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Keng-Yu Chou, Shuang-Ji Tsai, Min-Feng Kao
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Patent number: 8970768Abstract: A unit pixel array of an image sensor includes a semiconductor substrate having a plurality of unit pixels, an interlayer insulating layer disposed on a front side of the semiconductor substrate, a plurality of color filters disposed on a back side of the semiconductor substrate, a plurality of light path converters, each of the light path converters being disposed adjacent to at least one color filter and having a pair of slanted side edges extending from opposing ends of a horizontal bottom edge, and a plurality of micro lenses disposed on the color filters.Type: GrantFiled: August 26, 2011Date of Patent: March 3, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Chak Ahn, Bum-Suk Kim, Kyung-Ho Lee, Eun-Sub Shim
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Patent number: 8969122Abstract: Processes for fabricating photovoltaic devices in which the front side contact metal semiconductor alloy metallization patterns have a uniform thickness at edge portions as well as a central portion of each metallization pattern are provided.Type: GrantFiled: June 14, 2011Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Kathryn C. Fisher, Qiang Huang, Satyavolu S. Papa Rao, David L. Rath
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THIN FILM STRUCTURES AND DEVICES WITH INTEGRATED LIGHT AND HEAT BLOCKING LAYERS FOR LASER PATTERNING
Publication number: 20150056744Abstract: Selective removal of specified layers of thin film structures and devices, such as solar cells, electrochromics, and thin film batteries, by laser direct patterning is achieved by including heat and light blocking layers in the device/structure stack immediately adjacent to the specified layers which are to be removed by laser ablation. The light blocking layer is a layer of metal that absorbs or reflects a portion of the laser energy penetrating through the dielectric/semiconductor layers and the heat blocking layer is a conductive layer with thermal diffusivity low enough to reduce heat flow into underlying metal layer(s), such that the temperature of the underlying metal layer(s) does not reach the melting temperature, Tm, or in some embodiments does not reach (Tm)/3, of the underlying metal layer(s) during laser direct patterning.Type: ApplicationFiled: August 8, 2012Publication date: February 26, 2015Applicant: Applied Materials, Inc.Inventors: Daoying Song, Chong Jiang, Byung-Sung Leo Kwak, Joseph G. Gordon, II -
Patent number: 8962374Abstract: A stack of a first anti-reflective coating (ARC) layer and a titanium layer is formed on a front surface of a semiconductor substrate including a p-n junction, and is subsequently patterned so that a semiconductor surface is physically exposed in metal contact regions of the front surface of the semiconductor substrate. The remaining portion of the titanium layer is converted into a titania layer by oxidation. A metal layer is plated on the metal contact regions, and a copper line is subsequently plated on the metal layer or a metal semiconductor alloy derived from the metal layer. A second ARC layer is deposited over the titania layer and the copper line, and is subsequently patterned to provide electrical contact to the copper line.Type: GrantFiled: June 27, 2012Date of Patent: February 24, 2015Assignee: International Business Machines CorporationInventors: Satyavolu S. Papa Rao, Kathryn C. Fisher, Harold J. Hovel, Qiang Huang, Susan Huang, Young-Hee Kim
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Patent number: 8962375Abstract: A method of creating a reflective shield for an image sensor device includes depositing a first dielectric layer on a substrate, wherein a photodiode is on the substrate. The method further includes removing surface topography by performing chemical mechanical polishing (CMP) on the first dielectric layer. The method further includes patterning the substrate to define an area on a surface of the first dielectric layer, wherein the area is directly above the photodiode. The method further includes depositing a layer of a material with high reflectivity on the substrate, wherein the material fills the area on the surface of the first dielectric layer. The method further includes removing excess material with high reflectivity, wherein the reflective shield is formed and is embedded in the first dielectric layer. The method further includes depositing a second dielectric material on the substrate, wherein the second dielectric material covers the reflective shield.Type: GrantFiled: December 16, 2013Date of Patent: February 24, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Hao Shih, Szu-Ying Chen, Hsing-Lung Chen, Jen-Cheng Liu, Dun-Nian Yaung, Volume Chien
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Publication number: 20150047700Abstract: A conductive paste for solar cell electrodes according to an embodiment of the present invention comprises a glass frit containing many glass particles, and a non-glass component containing mainly at least one of silver and copper and additionally metallic element A1. The metallic element A1 is at least one selected from the group consisting of vanadium, niobium, tantalum, rhodium, rhenium, and osmium. A solar cell according to an embodiment of the present invention includes a semiconductor substrate, an antireflection film disposed in a first region on a main surface of the semiconductor substrate, and an electrode disposed in a second region different from the first region on the main surface of the semiconductor substrate and formed by firing the conductive paste for electrodes.Type: ApplicationFiled: February 28, 2013Publication date: February 19, 2015Inventors: Yoshio Miura, Daisuke Ota, Tomomi Wataya
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Publication number: 20150048468Abstract: According to one embodiment, a solid-state imaging device includes a first light-receiving portion and a first light guide layer. The first light-receiving portion is formed in the surface of a semiconductor substrate. The first light guide layer is formed to correspond to a portion above the first light-receiving portion, and has an inverse tapered shape in which the width becomes larger from an upper surface a lower surface. The inverse tapered shape ranges from the upper surface the lower surface.Type: ApplicationFiled: March 6, 2014Publication date: February 19, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadashi IIJIMA
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Publication number: 20150047707Abstract: A solar cell module and a method of manufacturing the same. The solar cell module includes: a solar cell that includes a light absorption layer including a p-type compound semiconductor, a buffer layer disposed on the light absorption layer, and a window layer that is disposed on the buffer layer and includes an n-type metal oxide semiconductor; a reflection-prevention layer disposed on the window layer of the solar cell; an adhesive layer disposed on the reflection-prevention layer; and a cover layer disposed on the adhesive layer, wherein the reflection-prevention layer includes an organic compound.Type: ApplicationFiled: August 12, 2014Publication date: February 19, 2015Inventors: Sung-Su Kim, Soo-Youn Park, Do-Young Park, Hye-Jin Park, Jong-Hwan Park, Ji-Won Lee, Sang-Hyun Eom
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Publication number: 20150048387Abstract: Devices incorporating a single to a few-layer MoS2 channels in combination with optimized substrate, dielectric, contact and electrode materials and configurations thereof, exhibit light emission, photoelectric effect, and superconductivity, respectively.Type: ApplicationFiled: June 4, 2014Publication date: February 19, 2015Applicant: Georgetown UniversityInventors: Makarand PARANJAPE, Paola BARBARA, Amy LIU, Marcio FONTANA
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Publication number: 20150050771Abstract: A method is provided for making a solar cell. The method includes providing a stack including a substrate, a barrier layer disposed on the substrate, and an anti-reflective layer disposed on the barrier layer, where the anti-reflective layer has charge centers. The method also includes generating a corona with a charging tool and contacting the anti-reflective layer with the corona thereby injecting charge into at least some of the charge centers in the anti-reflective layer. Ultra-violet illumination and temperature-based annealing may be used to modify the charge of the anti-reflective layer.Type: ApplicationFiled: August 11, 2014Publication date: February 19, 2015Inventors: Vivek Sharma, Clarence Tracy
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Patent number: 8956909Abstract: An electronic device and a method of fabricating the same are provided. The electronic device includes: a photodiode layer; a wiring layer formed on the first surface of the photodiode layer; a plurality of electrical contact pads formed on the wiring layer; a passivation layer formed on the wiring layer and the electrical contact pads; an antireflective layer formed on the second surface of the photodiode layer; a color filter layer formed on the antireflective layer; a dielectric layer formed on the antireflective layer and the color filter layer; and a microlens layer formed on the dielectric layer, allowing the color filter layer, the dielectric layer and the microlens layer to define an active region within which the electrical contact pads are positioned. As the electrical contact pads are positioned within the active region, an area of the substrate used for an inactive region can be eliminated.Type: GrantFiled: December 23, 2013Date of Patent: February 17, 2015Assignee: Unimicron Technology CorporationInventors: Tzyy-Jang Tseng, Dyi-Chung Hu
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Patent number: 8956972Abstract: A method for manufacturing a semiconductor thick metal structure includes a thick metal deposition step, a metal patterning step, and a passivation step. In the thick metal deposition step, a Ti—TiN laminated structure is used as an anti-reflection layer to implement 4 ?m metal etching without residue. In the metal patterning step, N2 is used for the protection of a sidewall to implement on a 4 ?m metal concave-convex structure a tilt angle of nearly 90 degrees, and a main over-etching step is added to implement the smoothness of the sidewall of the 4 ?m metal concave-convex structure. A half-filled passivation filling structure is used to implement effective passivation protection of 1.5 um metal gaps having less than 4 um of metal thickness. Manufacturing of the 4 ?m thick metal structure having a linewidth/gap of 1.5 ?m/1.5 ?m is finally implemented.Type: GrantFiled: October 12, 2012Date of Patent: February 17, 2015Assignee: CSMC Technologies Fab1 Co., Ltd.Inventors: Hsiao-Chia Wu, Shilin Fang, Tse-Huang Lo, Zhengpei Chen, Shu Zhang
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Publication number: 20150044812Abstract: A method for solar cell fabrication is provided. The method includes etching a doped surface of a silicon wafer solar cell using a solution including potassium hydroxide (KOH) and sodium hypochlorite (NaOCl). Alternatively the solution could include sodium hydroxide (NaOH) and NaOCl. In one aspect, the step of back-etching an emitter of the solar cell using the KOH:NaOCl solution is simultaneously performed with porous silicon removal. In another aspect, the step of back-etching the emitter of the solar cell using the KOH:NaOCl solution also includes PSG removal. And in yet another aspect, the step of back-etching the emitter of the solar cell using the KOH:NaOCl solution is performed simultaneously with polishing.Type: ApplicationFiled: May 9, 2013Publication date: February 12, 2015Applicant: NATIONAL UNIVERSITY OF SINGAPOREInventors: Prabir Kanti Basu, Matthew Benjamin Boreland, Debajyoti Sarangi, Vinodh Shanmugam
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Publication number: 20150037924Abstract: Processes for making light to current converter devices are provided. The processes can be used to make light to current converter devices having P-N junctions located on only the top surface of the cell, located on the top surface and symmetrically or asymmetrically along a portion of the inner surface of the via holes, located on the top surface and full inner surface of the via holes, or located on the top surface, full inner surface of the via holes, and a portion of the bottom surface of the cell. The processes may isolate the desired P-N junction by etching the emitter, forming a via hole after forming the emitter, using a barrier layer to protect portions of the emitter from etching, or using a barrier layer to prevent the emitter from being formed on portions of the substrate.Type: ApplicationFiled: October 17, 2014Publication date: February 5, 2015Inventors: Lingjun ZHANG, Feng ZHANG, Jian WU, Xusheng WANG
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Publication number: 20150035106Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.Type: ApplicationFiled: July 30, 2014Publication date: February 5, 2015Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Jean-Pierre Carrere, Patrick Gros D'Aillon, Stephane Allegret-Maret, Jean-Pierre Oddou
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Publication number: 20150034968Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.Type: ApplicationFiled: October 17, 2014Publication date: February 5, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Shinji SAITO, Rei HASHIMOTO, Mizunori EZAKI, Shinya NUNOUE, Hironori ASAI
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Publication number: 20150035101Abstract: According to one embodiment, a solid-state imaging device is provided. The solid-state imaging device includes a photoelectric conversion element, a first anti-reflection film, an intermediate film, and a second anti-reflection film. The photoelectric conversion element is disposed corresponding to each of a plurality of colored lights. The first anti-reflection film is disposed on a photo-receiving surface side of the photoelectric conversion element. The intermediate film is disposed on a photo-receiving surface side of the first anti-reflection film. The second anti-reflection film is disposed on a photo-receiving surface side of the intermediate film. At least one of the first anti-reflection film, the intermediate film, and the second anti-reflection film has different film thicknesses for respective colored lights to be received.Type: ApplicationFiled: February 6, 2014Publication date: February 5, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Junji Naruse, Nagataka Tanaka
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Publication number: 20150036031Abstract: According to one embodiment of the present invention, a solid-state imaging device is provided. The solid-state imaging device includes a photoelectric conversion element, a first insulating film, a metal oxide film, an antireflection film, and a second insulating film. The photoelectric conversion element photoelectrically converts incident light into charges and stores the converted charges. The first insulating film is provided on a light-receiving surface of the photoelectric conversion element. The metal oxide film is provided on a light-receiving surface of the first insulating film. The antireflection film is provided on a light-receiving surface of the metal oxide film. The second insulating film is formed between the metal oxide film and the antireflection film, and has a thickness of 1 nm or more and 10 nm or less.Type: ApplicationFiled: March 5, 2014Publication date: February 5, 2015Applicant: Kabushiki Kaisha ToshibaInventor: Masaki KAMIMURA
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Publication number: 20150034155Abstract: An optoelectronic device includes: a semiconductor stack including an upper surface and a side surface; a first electrode formed on the upper surface of the semiconductor stack; a first anti-reflection structure formed on the first electrode and the upper surface; and a second anti-reflection structure different from the first anti-reflection structure formed on the side surface.Type: ApplicationFiled: August 2, 2013Publication date: February 5, 2015Applicant: EPISTAR CORPORATIONInventors: Yi-Hung LIN, Chien-Ming WU
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Publication number: 20150035028Abstract: A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region.Type: ApplicationFiled: August 5, 2013Publication date: February 5, 2015Applicant: Apple Inc.Inventors: Xiaofeng Fan, Philip H. Li, Chung Chun Wan, Anup K. Sharma, Xiangli Li
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Publication number: 20150034902Abstract: The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates.Type: ApplicationFiled: March 14, 2013Publication date: February 5, 2015Inventor: Robbie JORGENSON
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Patent number: 8947566Abstract: The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.Type: GrantFiled: June 22, 2011Date of Patent: February 3, 2015Assignee: Canon Kabushiki KaishaInventors: Masahiro Kobayashi, Mineo Shimotsusa
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Publication number: 20150027534Abstract: A photovoltaic (PV) structure for generating electrical power from light, the structure including an enhancing layer for increasing the absorption of the light into the structure, the enhancing layer including: a wrinkled graphene layer configured to trap the light in the PV structure; and aluminium nanoparticles configured to scatter the light into the PV structure.Type: ApplicationFiled: July 25, 2014Publication date: January 29, 2015Inventors: Baohua JIA, Min GU, Xi CHEN
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Publication number: 20150027522Abstract: A method of fabricating an all-back-contact (ABC) solar cell is disclosed. A doped layer of a first polarity (102) is formed on a rear side of a wafer (100). A first masking structure (106, 110) is formed on the doped layer of the first polarity. Portions of the first masking structure (106, 110) are removed using a first laser ablation process. Doped regions of a second polarity (118, 135, 137) are formed in areas where the first masking structure has been removed. Contact bars (134, 136) are formed by screen printing and firing such that each contact bar is in contact with one of the doped regions (135, 137).Type: ApplicationFiled: November 16, 2011Publication date: January 29, 2015Applicant: TRINA SOLAR ENERGY DEVELOPMENT PTE LTDInventors: Thomas Mueller, Armin Gerhard Aberle