Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.

Abstract: A method of etching silicon nitride on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a nitrogen-and-oxygen-containing precursor. Plasma effluents from two remote plasmas are flowed into a substrate processing region where the plasma effluents react with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while very slowly removing silicon, such as polysilicon. The silicon nitride selectivity results partly from the introduction of fluorine-containing precursor and nitrogen-and-oxygen-containing precursor using distinct (but possibly overlapping) plasma pathways which may be in series or in parallel.

Abstract: A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates across a varying pattern on a patterned substrate. The method also provides a more rectilinear profile following the etch process. Methods include a sequential exposure of gapfill silicon oxide. The gapfill silicon oxide is exposed to a local plasma treatment prior to a remote-plasma dry etch which may produce salt by-product on the surface. The local plasma treatment has been found to condition the gapfill silicon oxide such that the etch process proceeds at a more even rate within each trench and across multiple trenches. The salt by-product may be removed by raising the temperature in a subsequent sublimation step.

Abstract: A method of etching exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-and-nitrogen-containing material. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon-and-nitrogen-containing material from the exposed silicon-and-nitrogen-containing material regions while very slowly removing other exposed materials. The silicon-and-nitrogen-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate.

Abstract: In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.

Abstract: A process for surface preparation of a substrate (2), which comprises introducing or running a substrate (2) into a reaction chamber (6, 106). A dielectric barrier (14, 114) is placed between electrodes (1, 10, 110). A high-frequency electrical voltage is generated, to generate filamentary plasma (12, 112). Molecules (8, 108) are introduced into the reaction chamber (6, 106). Upon contact with the plasma, they generate active species typical of reacting with the surface of the substrate. An adjustable inductor (L) placed in parallel with the inductor of the installation is employed to reduce the phase shift between the voltage and the current generated and to increase the time during which the current flows in the plasma (12, 112).

Abstract: A method and apparatus for cleaning a wafer. The wafer is heated and moved to a processing station within the apparatus that has a platen either permanently in a platen down position or is transferable from a platen up position to the platen down position. The wafer is positioned over the platen so as not to contact the platen and provide a gap between the platen and wafer. The gap may be generated by positioning the platen in a platen down position. A plasma flows into the gap to enable the simultaneous removal of material from the wafer front side, backside and edges. The apparatus may include a single processing station having the gap residing therein, or the apparatus may include a plurality of processing stations, each capable of forming the gap therein for simultaneously removing additional material from the wafer front side, backside and edges.

Abstract: Formation of BPSG surface defects upon exposure to atmosphere is prevented by a plasma treatment method for converting boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer to gas phase compounds. The treatment plasma is generated from a treatment process gas containing one of (a) a fluorine compound or (b) a hydrogen compound.

Abstract: Ashing of organic material is conducted initially at a low temperature and then at a high temperature. A low flow rate of ashing gas maximizes ashing rate at the low temperature, and a high flow rate of ashing gas maximizes ashing rate at a high temperature. Preferably, a crossover temperature of a particular organic material in a given ashing system is determined, the crossover temperature characterized in that below the crossover temperature, a decrease in ashing gas flow rate results in an increase of ashing rate, and above the crossover temperature, an increase in ashing gas flow rate results in an increase of ashing rate.

Abstract: Plasma doping is performed using a plasma made of a gas containing an impurity which will serve as a dopant. In this case, at least one of plasma generation high-frequency power and biasing high-frequency power is supplied in the form of pulses.

Abstract: The invention relates to a process for etching a substrate (3) in an etching chamber (1) with a plasma ignited outside of the etching chamber (1). The process is characterized in that during the etching process at least temporarily at least one gas jet (10) is directed from the side to the radical stream (7) which is directed towards the substrate (3). Furthermore the invention relates to an etching chamber for etching of a substrate (3) with a substrate holder (2) and a plasma source (4) remote to the substrate holder (2), which is characterized in that between the substrate holder (2) and the plasma source (4) at least one nozzle (9) for lateral introduction of a gas jet (10) into the etching chamber (1) is provided. With this invention the distribution of the active species on the surface of a substrate can be easily influenced.

Abstract: Semiconductor device fabrication equipment performs a PEOX (physical enhanced oxidation) process, and includes a remote plasma generator for cleaning a process chamber of the equipment. After a PEOX process has been preformed, a purging gas is supplied into the process chamber to purge the process chamber, and the remote plasma generator produces plasma using a first cleaning gas. Accordingly, a reactor of the remote plasma generator is cleaned by the first cleaning gas plasma. Subsequently, the purging gas is supplied to purge the process chamber, and the remote plasma generator produces plasma using a second cleaning gas to remove the first cleaning gas plasma from the remote plasma generator and the process chamber. Finally, full flush operations are performed to remove any gases remaining in the process chamber.

Abstract: A process is provided for removing polymer from a backside of a workpiece and/or photoresist from a front side of the workpiece. For backside polymer removal, the wafer is positioned near the ceiling to above a localized or remote plasma source having a side outlet through the sidewall of the chamber, and backside polymer is removed by rotating the workpiece while flowing plasma by-products from the side outlet to the wafer backside. For front side photoresist removal, the wafer is positioned away from the ceiling and below the side outlet of the localized plasma source, and front side photoresist is remove by rotating the workpiece while flowing plasma by-products from the side outlet to the wafer front side.

Abstract: A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.

Abstract: A plasma processing method performs a desired plasma process on substrates by using a plasma generated in a processing space. A first and a second electrode are disposed in parallel in a processing vessel that is grounded, the substrate is supported on the second electrode to face the first electrode, the processing vessel is vacuum evacuated, a desired processing gas is supplied into the processing space formed between the first electrode, the second electrode and a sidewall of the processing vessel, and a first radio frequency power is supplied to the second electrode. The first electrode is connected to the processing vessel via an insulator or a space, and is electrically coupled to a ground potential via a capacitance varying unit whose electrostatic capacitance is varied based on a process condition of the plasma process performed on the substrate.

Abstract: A method and apparatus for cleaning a process chamber are provided. In one embodiment, a process chamber is provided that includes a remote plasma source and a process chamber having at least two processing regions. Each processing region includes a substrate support assembly disposed in the processing region, a gas distribution system configured to provide gas into the processing region above the substrate support assembly, and a gas passage configured to provide gas into the processing region below the substrate support assembly. A first gas conduit is configured to flow a cleaning agent from the remote plasma source through the gas distribution assembly in each processing region while a second gas conduit is configured to divert a portion of the cleaning agent from the first gas conduit to the gas passage of each processing region.

Abstract: A method to solve such a problem that plasma will not ignite in restarting operation of a processing container that has not been operated with the inside kept drawn to vacuum. Gas containing oxygen is passed in a processing container 21, and ultraviolet light is irradiated to the gas while gas inside the processing container 21 is being discharged. After that, a remote plasma source 26 is driven to ignite plasma.

Abstract: A process for removing organic electroluminescent residues from a substrate is described herein. The process includes the steps of providing a process gas comprising a fluorine-containing gas, optionally an oxygen-containing gas, and optionally an additive gas; activating the process gas in a remote chamber using at least one energy source to provide reactive species; and contacting the surface of the substrate with the reactive species to volatilize and remove the organic electroluminescent residue from the surface.

Abstract: A method for processing a substrate in a plasma processing chamber is provided. The substrate is disposed above a chuck and surrounded by a first edge ring. The first edge ring is electrically isolated from the chuck. The method includes providing a second edge ring. The second edge ring is disposed below an edge of the substrate. The method also includes providing a coupling ring. The coupling ring is configured to facilitate RF coupling from an ESC (electrostatic chuck) assembly to the first edge ring, thereby causing the first edge ring to have an edge ring potential during substrate processing and causing the RF coupling to be maximized at the first edge ring and minimized at the second edge ring during the substrate processing.

Abstract: A method of processing a workpiece in a plasma reactor chamber includes coupling RF power via an electrode to plasma in the chamber, the RF power being of a variable frequency in a frequency range that includes a fundamental frequency f. The method also includes coupling the electrode to a resonator having a resonant VHF frequency F which is a harmonic of the fundamental frequency f, so as to produce VHF power at the harmonic. The method controls the ratio of power near the fundamental f to power at harmonic F, by controlling the proportion of power from the generator that is up-converted from f to F, so as to control plasma ion density distribution.

Abstract: In a plasma reactor chamber a ceiling electrode and a workpiece support electrode, respective RF power sources of respective VHF frequencies f1 and f2 are coupled to either respective ones of the electrodes or to a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. Respective center ground return paths are provided for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequencies f1 and f2, and an edge ground return path is provided for each of the frequencies f1 and f2. The impedance of at least one of the ground return paths is adjusted so as to control the uniformity of the plasma ion density distribution.

Abstract: In a substrate processing apparatus, a control electrode (131) separates a process space (11C) including a substrate to be processed and a plasma formation space (11B) not including the substrate. The control electrode includes a conductive member formed in a processing vessel and having a plurality of apertures (131a) for passing plasma. A surface of the control electrode is covered by an aluminum oxide or a conductive nitride. In the substrate processing apparatus, a gas containing He and N2 is supplied into the processing vessel. In the plasma formation space, there is formed plasma under a condition in which atomic state nitrogen N* are excited. The atomic state nitrogen N* are used to nitride a surface of the substrate.

Abstract: Methods and apparatus for cleaning a semiconductor device are disclosed. A disclosed method comprises forming a capping layer on top of a substrate including a bottom interconnect layer; depositing and patterning an insulating layer on the capping layer to form a damascene structure; etching a portion of the capping layer exposed by the damascene structure; and (d) removing polymers and copper impurities due to the etching by using a HF vapor gas.

Abstract: A coplanar mounting member for a MEM sensor includes a first surface coplanar with a connection pad on the surface of a MEM sensor board containing the MEM sensor control circuit; a second surface inclined to the surface of the board for mounting a MEM sensor and an electrical conductor array for interconnecting the MEM sensor with the connection pad on the board.

Abstract: An edge bead removal process is disclosed. The process includes providing a wafer having a feature layer, coating a photoresist on the feature layer, rotating the wafer, and removing an edge bead from the wafer by removing an edge bump portion from the edge bead and removing an edge region from the edge bead.

Abstract: A method of forming contact openings in a semiconductor device including providing a semiconducting substrate; forming an etch stop layer on said semiconducting substrate; forming a dielectric layer on said etch stop layer; forming a bottom anti-reflective coating (BARC) on said dielectric layer; forming and patterning a mask on said BARC layer; and, forming at least a first contact opening exposing said etch stop layer by a first etching process.

Abstract: Semiconductor manufacturing processes that reduce production costs as well as increase throughput by substituting the PR strip and ACT wet cleaning procedure after the via contact etching of a semiconductor with dry cleaning to be performed while removing a photoresist in a conventional PR strip apparatus. In addition, the methods can shorten waiting time and maintain consistency in the process by performing the PR strip and cleaning at the same time in the same chamber. The resultant devices have lower via contact resistance and its deviation, as compared to the conventional PR strip and ACT wet cleaning.

Abstract: A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts.

Abstract: Chemical generator and method for generating a chemical species at a point of use such as the chamber of a reactor in which a workpiece such as a semiconductor wafer is to be processed. The species is generated by creating free radicals, and combining the free radicals to form the chemical species at the point of use.

Abstract: To resolve a problem that an etching rate profile is changed by a position of a nozzle relative to a semiconductor wafer and accordingly, at a vicinity of an outer edge of the semiconductor wafer, an accurate machining result is difficult to achieve, gas including activated species produced by plasma is blown from a nozzle locally to a surface of the semiconductor wafer W supported on a wafer table concentrically therewith to thereby remove unevenness on the surface of the semiconductor wafer. In this case, the wafer table is provided with a radius larger than a radius of the semiconductor wafer supported thereby by an outstretched portion to thereby prevent an outer edge from being removed excessively by reflected gas.

Abstract: A hot arc-type plasma generating system is described to etch a polymer on a substrate used in the manufacture of semiconductor devices. The etching process is particularly useful to remove a polymer from high aspect ratio holes, that can include trenches, greater than about 10 to 1 and even greater than 50 to 1.

Abstract: An apparatus for shaping and encapsulating near edge regions of a semiconductor wafer is described. A housing of the apparatus has a slot for receiving an edge of a wafer affixed on a rotatable chuck. At least one plasma source connected to the housing generates a flow of reactive gas towards the edge of the wafer. A channel in the housing directs a flow of diluent/quenching gas onto the wafer in close proximity to an exhaust channel for exhausting of the diluent/quenching gas and the reactive gas away from the wafer. The apparatus may also provide a plurality of plasma sources, for example, plasma sources for selectively etching of a polymer on the wafer, etching of silcon dioxide on the wafer and depositing an encapsulating silicon dioxide layer on the wafer.

Abstract: A split gate FET wordline electrode structure and method for forming the same including an improved polysilicon etching process including providing a semiconductor wafer process surface comprising first exposed polysilicon portions and adjacent oxide portions; forming a first oxide layer on the exposed polysilicon portions; blanket depositing a polysilicon layer on the first exposed polysilicon portions and adjacent oxide portions; forming a hardmask layer on the polysilicon layer; carrying out a multi-step reactive ion etching (RIE) process to etch through the hardmask layer and etch through a thickness portion of the polysilicon layer to form second polysilicon portions adjacent the oxide portions having upward protruding outer polysilicon fence portions; contacting the semiconductor wafer process surface with an aqueous HF solution; and, carrying out a downstream plasma etching process to remove polysilicon fence portions.

Abstract: In dry etching process wherein a substrate having a multi-layer film is etched, the etching process is monitored by determining a layer being processed. CHF3 gas is added to the processing gas during a period from the time when the lowermost layer on the substrate is etched until the etching is completed.

Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.

Abstract: A method for forming a desired junction profile in a semiconductor device. At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate and the at least one dopant while simultaneously exposing the semiconductor substrate to an electric field.

Abstract: Chemical generator and method for generating a chemical species at a point of use such as the chamber of a reactor in which a workpiece such as a semiconductor wafer is to be processed. The species is generated by creating free radicals, and combining the free radicals to form the chemical species at the point of use.

Abstract: A method of fabricating a semiconductor device having an L-shaped spacer is provided. A buffer dielectric layer, a first dielectric layer, and a second dielectric layer are sequentially formed on the surface of the gate electrode and on the semiconductor substrate. Next, the second dielectric layer is etched to form a first disposable spacer on the first dielectric layer at both sidewalls of the gate electrode. Next, a deeply doped source and drain region is formed on the semiconductor substrate to be aligned to the first disposable spacer. Next, the first disposable spacer and the first dielectric layer are sequentially removed. Next, a shallowly doped source and drain region is formed on the semiconductor substrate at both sidewalls of the gate electrode adjacent to the deeply doped source and drain region. Next, a third dielectric layer, a fourth dielectric layer, and a fifth dielectric layer are sequentially formed on the buffer dielectric layer.

Abstract: A technique is described for a very rapid thermal treatment of a substrate used to make semiconductor devices. The substrate is subjected to a very hot gas stream such as can be produced from an arc-type plasma generator. The substrate is then moved through the hot gas stream at a velocity selected to sufficiently heat the surface of the substrate to a high temperature at which doping and diffusion processes can be done in an efficient manner, while a thermal gradient is preserved throughout the thickness of the substrate. In this manner as the substrate moves through the hot gas stream a rapid heating of the surface is achieved and as the heated portion moves out of the gas stream, the bulk of the substrate can assist in the cooling of the heated portion. Sharply defined doping regions can be formed in the substrate. The method yields temperature heating and cooling rates of the order of 105° C.

Abstract: A process is disclosed for manufacturing a film that is smooth and has large nitride grains of a diffusion barrier material. Under the process, a nitride of the diffusion barrier material is deposited by physical vapor deposition in an environment of nitrogen. The nitrogen content of the environment is selected at an operating level such that nitride nuclei of the diffusion barrier material are evenly distributed. A grain growth step is then conducted in the nitrogen environment to grow a film of large nitride grains of the diffusion barrier material. Also disclosed is a stack structure suitable for MOS memory circuits incorporating a lightly nitrided refractory metal suicide diffusion barrier with a covering of a nitride of a diffusion barrier material. The stack structure is formed in accordance with the diffusion barrier material nitride film manufacturing process and exhibits high thermal stability, low resistivity, long range agglomeration blocking, and high surface smoothness.

Abstract: A method of manufacturing a semiconductor device includes forming a silicon nitride layer on a semiconductor substrate on which a predetermined pattern is formed. The silicon nitride layer includes a plurality of bonds formed between silicon and nitrogen. A portion of the bonds formed between silicon and nitrogen is broken to form at least one free bonding site on a surface of the silicon nitride layer. A silane compound and a flow fill method are used to form a silicon oxide layer on the silicon nitride layer.

Abstract: A method for processing substrates, in which a photoresist layer is applied and structured on their surface. By blasting the substrate with particles, recesses are put into the surface of the substrate in those areas not covered by photoresist.

Abstract: A novel batch processing system used, for example, in plasma etching and chemical vapor deposition, wherein the pressure in the reactor is cycled through a varying pressure to increase the transfer of the reactant materials to the center of the wafer. One version of the invention provides a method that includes the steps of (I) feeding reactant gases into a reaction vessel, (ii) exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (iii) cycling the pressure in the reaction vessel between a higher pressure Phigh and a lower pressure Plow. Another version of the invention provides an apparatus that comprises (I) a reaction vessel, (ii) a feed means for feeding reactive gases into the reaction vessel, (iii) an exhaust means for exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (d) a pressure control means for cycling the pressure in the reaction vessel between a higher pressure Phigh and a lower pressure Plow.

Abstract: Chemical generator and method for generating a chemical species at a point of use such as the chamber of a reactor in which a workpiece such as a semiconductor wafer is to be processed. The species is generated by creating free radicals, and combining the free radicals to form the chemical species at the point of use.

Abstract: A method for processing a semiconductor wafer with a plasma using continuous RF power for a first phase of wafer processing and with pulsed RF power for a second phase of wafer processing.

Abstract: In pre-treating a surface of a substrate in a process of forming a narrowed thin film pattern on the surface of the substrate from a solution such as a plating liquid, a mask with an opening corresponding to the thin film pattern to be formed later is formed on the surface of the substrate. Then, by micronizing a pre-treating liquid such as a water, a plating liquid, an acidic liquid ad an alkaline liquid, an atmosphere containing microparticles having diameters smaller than the minimum distance of the opening of the mask is produced. The substrate is positioned into the atmosphere, and the microparticles of the pre-treating liquid are stuck on the surface of the substrate exposing to the lower part of the opening of the mask. In using a water as the pre-treating liquid, the substrate is positioned into an atmosphere containing moisture vapor and the water particles are stuck on the surface of the substrate through their condensation.

Abstract: The present invention provides for an improvement of the interlayer adhesion property of the low-K layers in a dual damascene process. The method includes a shallow ion implantation process to bombard a bottom low-k layer for forming a densified layer on the bottom low-k layer. The densified layer can be a used as a substitute in the oxidation of the prior art to avoid the peeling phenomenon between the organic low-k layers.

Abstract: A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device on a first surface of a silicon carbide substrate and with at least one metal contact for the device on the first surface of the substrate. The opposite, second surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished second surface of the silicon carbide substrate to define a predetermined location for a via that is opposite the device metal contact on the first surface; etching the desired via through the desired masked location until the etch reaches the metal contact on the first surface; and metallizing the via to provide an electrical contact from the second surface of the substrate to the metal contact and to the device on the first surface of the substrate.

Abstract: A dual plasma process generates a microwave neutral plasma remote from a semiconductor wafer and a radio frequency (RF) ionized plasma adjacent to the wafer for simultaneous application to the wafer. A first gas flows through a microwave plasma generation area, without a second gas in the gas flow, to generate the neutral microwave plasma. The second gas is added to the gas flow downstream of the microwave plasma generation area prior to an RF plasma generation area.

Abstract: The invention provides a system for providing a flow of a short-lived, reactive process gas species into an RTP chamber without creating ionic species. An RTP chamber includes a transparent quartz window assembly. The window assembly has a first pane facing a wafer inside the RTP chamber. A second pane is positioned adjacent a heat lamp array on the outside of the RTP chamber. A window side wall joins the first and second panes at their peripheral edges to provide an internal chamber therebetween. A plurality of channels extend through the first pane from the internal chamber to the inside of the RTP chamber. A port communicates between the internal chamber and a process gas source. The window assembly also includes a reflective surface facing the internal chamber. An ultraviolet light source is positioned to illuminate process gas flowing through the window assembly with ultraviolet light such that the ultraviolet light alters the chemistry of the process gas.