Abstract: A material can be locally etched with arbitrary changes in the direction of the etch. A ferromagnetic-material-including catalytic particle is employed to etch the material. A wet etch chemical or a plasma condition can be employed in conjunction with the ferromagnetic-material-including catalytic particle to etch a material through a catalytic reaction between the catalytic particle and the material. During a catalytic etch process, a magnetic field is applied to the ferromagnetic-material-including catalytic particle to direct the movement of the particle to any direction, which is chosen so as to form a contiguous cavity having at least two cavity portions having different directions. The direction of the magnetic field can be controlled so as to form the contiguous cavity in a preplanned pattern, and each segment of the contiguous cavity can extend along an arbitrary direction.

Abstract: Methods and apparatus for plasma-enhanced substrate processing are provided herein. In some embodiments, an apparatus for processing a substrate includes: a process chamber having an internal processing volume disposed beneath a dielectric lid of the process chamber; a substrate support disposed in the process chamber; two or more concentric inductive coils disposed above the dielectric lid to inductively couple RF energy into the processing volume above the substrate support; and an electromagnetic dipole disposed proximate a top surface of the dielectric lid between two adjacent concentric inductive coils of the two or more concentric inductive coils.

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

Abstract: A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the dielectric film having a dielectric constant no greater than about 4.0, and stripping the resist composition to leave a substantially silicon-containing ash residue on the dielectric film. The method then includes contacting the ash residue with plasma comprising an ionized, essentially pure noble gas such as helium to remove the resist residue without substantially affecting the underlying dielectric film.

Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.

Abstract: A process for surface preparation of a substrate (2), which comprises introducing or running a substrate (2) into a reaction chamber (6, 106). A dielectric barrier (14, 114) is placed between electrodes (1, 10, 110). A high-frequency electrical voltage is generated, to generate filamentary plasma (12, 112). Molecules (8, 108) are introduced into the reaction chamber (6, 106). Upon contact with the plasma, they generate active species typical of reacting with the surface of the substrate. An adjustable inductor (L) placed in parallel with the inductor of the installation is employed to reduce the phase shift between the voltage and the current generated and to increase the time during which the current flows in the plasma (12, 112).

Abstract: A component of a substrate support assembly such as a substrate support or edge ring includes a plurality of current loops incorporated in the substrate support and/or the edge ring. The current loops are laterally spaced apart and extend less than halfway around the substrate support or edge ring with each of the current loops being operable to induce a localized DC magnetic field of field strength less than 20 Gauss above a substrate supported on the substrate support during plasma processing of the substrate. When supplied with DC power, the current loops generate localized DC magnetic fields over the semiconductor substrate so as to locally affect the plasma and compensate for non-uniformity in plasma processing across the substrate.

Abstract: Disclosed herein are various embodiments related to metal-assisted chemical etching of substrates on the micron, sub-micron and nano scales. In one embodiment, among others, a method for metal-assisted chemical etching includes providing a substrate; depositing a non-spherical metal catalyst on a surface of the substrate; etching the substrate by exposing the non-spherical metal catalyst and the substrate to an etchant solution including a composition of a fluoride etchant and an oxidizing agent; and removing the etched substrate from the etchant solution.

Abstract: Methods for providing an integrated circuit using a multi-stage molding process to protect wirebonds. In one embodiment, a method includes attaching a die to a leadframe having a lead finger, attaching a wirebond between the die and the leadfinger, applying a first mold material over at least a portion of the wirebond and the die and the leadfinger to form an assembly, waiting for the first mold material to at least partially cure, and applying a second mold material over the assembly.

Abstract: A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the dielectric film having a dielectric constant no greater than about 4.0, and stripping the resist composition to leave a substantially silicon-containing ash residue on the dielectric film. The method then includes contacting the ash residue with plasma comprising an ionized, essentially pure noble gas such as helium to remove the resist residue without substantially affecting the underlying dielectric film.

Abstract: A plasma reactor includes a vacuum enclosure including a side wall and a ceiling defining a vacuum chamber, and a workpiece support within the chamber and facing the ceiling for supporting a planar workpiece, the workpiece support and the ceiling together defining a processing region between the workpiece support and the ceiling. Process gas inlets furnish a process gas into the chamber. A plasma source power electrode is connected to an RF power generator for capacitively coupling plasma source power into the chamber for maintaining a plasma within the chamber. The reactor further includes at least a first overhead solenoidal electromagnet adjacent the ceiling, the overhead solenoidal electromagnet, the ceiling, the side wall and the workpiece support being located along a common axis of symmetry.

Abstract: A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.

Abstract: In a magnetic field generator for magnetron plasma generation which comprises a dipole-ring magnet with a plurality of columnar anisotropic segment magnets arranged in a ring-like manner, or in an etching apparatus and a method both of which utilize the magnetic field generator, the uniformity of plasma treatment over the entire surface of a wafer (workpiece) is improved by controlling the direction of the magnetic field relative to the working surface of the wafer (workpiece) which is subject to plasma treatment such as etching.

Abstract: Methods for resputtering and plasma etching include an operation of generating an ultra-high density plasma using an ultra-high magnetic field. For example, a plasma density of at least about 1013 electrons/cm3 is achieved by confining a plasma using a magnetic field of at least about 1 Tesla. The ultra-high density plasma is used to create a high flux of low energy ions at the wafer surface. The formed high density low energy plasma can be used to sputter etch a diffusion barrier or a seed layer material in the presence of an exposed low-k dielectric layer. For example, a diffusion barrier material can be etched with a high etch rate to deposition rate (E/D) ratio (e.g., with E/D>2) without substantially damaging an exposed dielectric layer. Resputtering and plasma etching can be performed, for example, in iPVD and in plasma pre-clean tools, equipped with magnets configured for confining a plasma.

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a dielectric layer, a composite plug and a conductive line. The dielectric layer is disposed on the substrate covering the conductive part. The composite plug is disposed in the dielectric layer electrically connecting with the conductive part, and includes a first plug and a second plug on the first plug, wherein the material or the critical dimension of the second plug is different from that of the first plug. The conductive line is disposed on the dielectric layer electrically connecting with the composite plug.

Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.

Abstract: A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.

Abstract: A distributor (30) includes a square waveguide (31) to be connected to a microwave oscillator (20) and a square waveguide (41) having a plurality of openings (43) formed in a narrow wall (41B). The square waveguide (31) is hollow. A wave delaying member (53) having a relative dielectric constant ?r is arranged in the square waveguide (41). Narrow walls (31A, 41A) of the two square waveguides (31, 41) are brought into contact with each other, and a communication hole (32) through which the two waveguides (31, 41) communicate with each other is formed in the narrow walls (31A, 41A). The widths of the two waveguides (31, 41) do not become narrow at their connecting portion even if the width of the communication hole (32) is decreased. Thus, a band of a frequency that can pass through the connecting portion is suppressed from becoming narrow. Consequently, reflection loss that occurs when the frequency of electromagnetic waves to be input to the distributor (30) changes can be decreased.

Abstract: A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302. A capping layer 306 is formed the metal line 304. A second dielectric layer 308 is formed over the first dielectric layer 302 and the metal line 304. A first via 310 is formed in the second dielectric layer 308 and in contact with the metal line 304. A second via 312 is formed in the second dielectric layer 308 and in contact with the metal line 304, and is positioned a distance away from the first via 310. An electrically isolated via 326 is formed in the second dielectric layer 308 and in contact with the metal line 304 and in between the first via 310 and the second via 312. A third dielectric layer 314 is formed over the second dielectric layer 308. First and second trenches 316, 318 are formed in the third dielectric layer 314 and in contact with the first via 310 and the second via 312, respectively. An isolated trench 328 is formed in the third dielectric layer and in contact with the isolated via 326.

Abstract: A method for manufacturing a semiconductor device includes: forming a protrusion-patterned layer on a substrate, the protrusion-patterned layer including a plurality of separated protrusions, each of which includes a base portion formed on the substrate and a top end portion opposite to the base portion; laterally growing a base layer on the top end portions of the protrusions of the protrusion-patterned layer in such a manner that each of the top end portions is covered by the base layer and that the base layer cooperates with the protrusions to define a plurality of cavities thereamong; thickening the base layer to a predetermined layer thickness; and separating the base layer from the substrate by destroying the protrusions of the protrusion-patterned layer.

Abstract: Apparatus and methods protect a central process exclusion region of a substrate during processing of an edge environ region of process performance. Removal of undesired materials is only from the edge environ region while the central device region is protected from damage. Field strengths are configured to protect the central region from charged particles from plasma in a process chamber and to foster removal of the undesired materials from only the edge environ region. A magnetic field is configured with a peak value adjacent to a border between the central and edge environ regions. A strong field gradient extends from the peak radially away from the border and away from the central region to repel the charged particles from the central region. The strength and location of the field are adjustable by axial relative movement of magnet sections, and flux plates are configured to redirect the field for desired protection.

Abstract: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.

Abstract: A method for removing native oxides from a substrate surface is provided. In at least one embodiment, the method includes supporting the substrate surface in a vacuum chamber and generating reactive species from a gas mixture within the chamber. The substrate surface is then cooled within the chamber and the reactive species are directed to the cooled substrate surface to react with the native oxides thereon and form a film on the substrate surface. The substrate surface is then heated within the chamber to vaporize the film.

Abstract: When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.

Abstract: In a substrate processing apparatus, a control electrode (131) separates a process space (11C) including a substrate to be processed and a plasma formation space (11B) not including the substrate. The control electrode includes a conductive member formed in a processing vessel and having a plurality of apertures (131a) for passing plasma. A surface of the control electrode is covered by an aluminum oxide or a conductive nitride. In the substrate processing apparatus, a gas containing He and N2 is supplied into the processing vessel. In the plasma formation space, there is formed plasma under a condition in which atomic state nitrogen N* are excited. The atomic state nitrogen N* are used to nitride a surface of the substrate.

Abstract: Methods and apparatus for cleaning a semiconductor device are disclosed. A disclosed method comprises forming a capping layer on top of a substrate including a bottom interconnect layer; depositing and patterning an insulating layer on the capping layer to form a damascene structure; etching a portion of the capping layer exposed by the damascene structure; and (d) removing polymers and copper impurities due to the etching by using a HF vapor gas.

Abstract: A device structure and method for forming an interconnect structure in a magnetic random access memory (MRAM) device. In an exemplary embodiment, the method includes defining a magnetic stack layer on a lower metallization level, the magnetic stack layer including a non-ferromagnetic layer disposed between a pair of ferromagnetic layers. A conductive hardmask is defined over the magnetic stack layer, and selected portions of the hardmask and the magnetic stack layer, are then removed, thereby creating an array of magnetic tunnel junction (MTJ) stacks. The MTJ stacks include remaining portions of the magnetic stack layer and the hardmask, wherein the hardmask forms a self aligning contact between the magnetic stack layer and an upper metallization level subsequently formed above the MTJ stacks.

Abstract: A method for manufacturing integrated circuits uses an atmospheric magnetic mirror plasma etching apparatus to thin a semiconductor wafer. In addition the process may, while thinning, both segregate and expose through-die vias for an integrated circuit chip. To segregate, the wafer may be partially diced. Then, the wafer may be tape laminated. Next, the backside of the wafer may be etched. As the backside material is removed, the partial dicing and through-die vias may be exposed. As such, the method reduced handling steps and increases yield. Furthermore, the method may be used in association with wafer level processing and flip chip with bump manufacturing.

Abstract: A plasma processing system and method wherein a power source produces a magnetic field and an electric field, and a window disposed between the power source and an interior of a plasma chamber couples the magnetic field into the plasma chamber thereby to couple power inductively into the chamber and based thereon produce a plasma in the plasma chamber. The window can be shaped and dimensioned to control an amount of power capacitively coupled to the plasma chamber by means of the electric field so that the amount of capacitively coupled power is selected in a range from zero to a predetermined amount. Also, a tuned antenna strap having r.f. power applied thereto to produce a standing wave therein can be arranged adjacent the window to couple magnetic field from a current maximum formed in the strap to the interior of the chamber.

Abstract: A device and a method for etching a substrate, in particular a silicon body, by using an inductively coupled plasma. A high-frequency electromagnetic alternating field is generated using an ICP source, and an inductively coupled plasma composed of reactive particles is generated by the action of a high-frequency electromagnetic alternating field on a reactive gas in a reactor. In addition, a static or time-variable magnetic field is generated between the substrate and the ICP source, for which purpose at least two magnetic field coils arranged one above the other are provided. The direction of the resulting magnetic field is also approximately parallel to the direction defined by the tie line connecting the substrate and the inductively coupled plasma.

Abstract: This invention relates to a method and apparatus for forming a micromachined device, where a workpiece is plasma etched to define a microstructure. The plasma etching is conducted in the presence of a magnetic field, which can be generated and manipulated by an electric field. The magnetic field effects the electrons present in the plasma by directing them to “collect” on a desired plane or surface of the workpiece. The electrons attract the ions of the plasma to etch the desired region of the a workpiece to a greater extent than other regions of the workpiece, thereby enabling the formation of more precise “cuts” in the workpiece to form specific shapes of microstructures. The magnetic field can be controlled in direction and intensity and substrate bias power can also be controlled during etching to precisely and accurately etch the workpiece.

Abstract: The present invention is provided to prevent yield reduction of semiconductor device in dry cleaning of semiconductor device manufacturing process. The electric action and chemical action due to plasma of a first gas generated by means of a plasma generating means and the physical action due to viscous friction force of high speed gas flow generated by means of a planar pad that is brought close to the main surface of a wafer are applied together for cleaning the main surface of the wafer. After cleaning, the wafer is exposed to plasma of a second gas in the same vacuum chamber and then transferred to the atmosphere.

Abstract: Nanotip arrays are formed by exposing a substrate to a process gas mixture that simultaneously forms nanomasks on the substrate surface and etches exposed portions of the substrate surface to form the nanotip array. Components of the process gas mixture form nanocrystallites on the surface of the substrate, thereby masking portions of the substrate from other components of the process gas mixture, which etch exposed portions of the substrate. Accordingly, nanotip arrays formed using this technique can have nanocrytallite endpoints.

Abstract: A method of rapid etching of an insulating film including an organic-based dielectric film without forming a damage layer or causing decline of the throughput, including the steps of forming an insulating film including an organic-based dielectric film such as a stacked film comprised of a polyarylether film or other organic-based dielectric film and a silicon oxide-based dielectric film or other insulating film, forming a mask layer by patterning above the insulating film, and when etching the organic-based dielectric film portion, using ions or radicals containing NH group generated by gaseous discharge in a mixed gas of hydrogen gas and nitrogen gas or a mixed gas of ammonia gas for etching using the mask layer as an etching mask, to etch the insulating layer and form openings etc. while generating reaction products containing CN group.

Abstract: A method for forming a photoresist pattern with minimally reduced transformations through the use of ArF photolithography, including the steps of: forming an organic anti-reflective coating layer on a an etch-target layer already formed on a substrate; coating a photoresist for ArF on the organic anti-reflective coating layer; exposing the photoresist with ArF laser; forming a first photoresist pattern by developing the photoresist, wherein portions of the organic anti-reflective coating layer are revealed; etching the organic anti-reflective coating layer with the first photoresist pattern as an etch mask and forming a second photoresist pattern by attaching polymer to the first photoresist pattern, wherein the polymer is generated during etching the organic anti-reflection coating layer with an etchant including O2 plasma; and etching the etch-target layer by using the second photoresist pattern as an etch mask.

Abstract: An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a stop layer and a feature in the substrate to be contacted into the first etching chamber to etch the dielectric layer. The substrate is then transferred from the first etching chamber to the second etching chamber under vacuum conditions and, in the second etching chamber, is exposed to an oxygen plasma or similar environment to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the stop layer is etched through to the feature to be contacted in either the second or a third etching chamber of said multichamber substrate processing system. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps.

Abstract: An injection valve is provided with vibration to dislodge residue therefrom and to thus avoid injection valve clogging. A wave generator which preferably generates an ultrasonic sine wave, is operatively coupled to the vaporization region of the injection valve (i.e., via the injection block, via a piezoelectric valve controller, etc.). The wave may be applied to the injection valve whenever vaporization takes place, in which case a removable trap is coupled between the injection valve and the processing chamber. Alternatively, the sonic wave may be applied to the injection valve only in conjunction with a chamber cleaning process.

Abstract: A method for forming an etched silicon layer. There is first provided a first substrate having formed thereover a first silicon layer. There is then etched the first silicon layer to form an etched first silicon layer while employing a plasma etch method employing a plasma reactor chamber in conjunction with a plasma etchant gas composition which upon plasma activation provides at least one of an active bromine containing etchant species and an active chlorine containing etchant species.

Abstract: Disclosed is a method for manufacturing a semiconductor device which efficiently carries out a process on a semiconductor substrate, such as dry etching, and cleaning for removing a foreign matter after the process. The method includes a step of removing a foreign matter by using both an electric action of a plasma generated by plasma generation means and a physical action caused by a frictional stress of a fast gas stream formed by a pad structure which is arranged close to a wafer surface.

Abstract: In order to provide an etching method for silicone oxide film by fluorocarbon plasma in semiconductor production, which is superior in precise manufacturing and highly selective to resist and silicone nitride film, two kinds of electronic temperature regions are generated in plasma, and a generation ratio of CF2/F is controlled independently from a generation amount of ions by making areas of these two electronic temperature regions variable with a magnetic field gradient and a distance between a wafer and a wafer facing plane.

Abstract: A substrate etching chamber has a substrate support, a gas supply to introduce a process gas into the chamber; an inductor antenna to sustain a plasma of the process gas in a process zone of the chamber, and an exhaust to exhaust the process gas. A magnetic field generator disposed about the chamber has first and second solenoids. A controller is adapted to control a power supply to provide a first current to the first solenoid and a second current to the second solenoid, thereby generating a magnetic field in the process zone of the chamber to controllably shape the plasma in the process zone to reduce etch rate variations across the substrate.

Abstract: A method for liquid phase deposition, including the steps of providing at least two raw materials from at least two supply devices of a saturation reaction system into a mixture trough and stirring until saturation occurs, filtering out unnecessary solid-state particles, and providing saturated and filtered liquid into an over-saturation reaction trough of a steady-flow over-saturation loop reaction system and stopping the saturated and filtered liquid when the over-saturation reaction trough is filled and the saturated and filtered liquid over-flows into a liquid level control trough to a pre-determined level. The method also includes the steps of providing a substrate in the over-saturation reaction trough, providing reactants from at least two supply devices into the over-saturation reaction trough, and depositing a thin film onto the substrate when the saturated liquid becomes over-saturated.

Abstract: Removing photoresist from alignment marks on a semiconductor wafer using a wafer edge exposure process is disclosed. The alignment marks on the wafer are covered by photoresist used in conjunction with semiconductor processing of one or more layers deposited on the semiconductor wafer. One or more parts of the edge of the wafer are exposed to remove the photoresist from these parts and thus reveal alignment marks on the wafer. The exposure of the one or more parts of the wafer is accomplished without performing a photolithographic clear out process. Rather, a wafer edge exposure (WEE) process is inventively utilized. Once the WEE process is performed, subsequent layers may be deposited by aligning them using the revealed alignment marks.

Abstract: In plasma processing equipment having a vacuum processing chamber, a plasma generation means, a stage for loading a wafer to be processed in the vacuum processing chamber, an opposing electrode having an area almost equal to or wider than the aforementioned wafer which is installed opposite to the stage, and a bias power source for applying a high frequency bias to the wafer, a current path correction means is provided for correcting the current path part in the neighborhood of the outer periphery of the wafer among the high frequency current paths produced by the high frequency bias so as to be directed toward the wafer opposing surface of the opposing electrode.

Abstract: The invention concerns a method for treating a surface for the protection and functionalisation of polymers (4) by gas plasma deposit in a confined chamber (10) of one or several silicon alloy layers (43). The silicon alloy is selected among silicon and its oxides, nitrides, oxynitrides; the deposit is performed at a temperature less than the degradation temperature of the polymer, and a physico—chemical surface pre-treatment by plasma is performed in the same chamber before the silicon alloy is deposited; the pre-treatment consisting in a surface treatment comprising etching a surface zone of the polymer and step which consists in depositing a polymeric carbon compound.

Abstract: A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.

Abstract: The semiconductor device includes a semiconductor substrate and, in an element isolating region in the semiconductor substrate, a first active area A/A dummy pattern and a second A/A dummy pattern having a pitch smaller than that of the first A/A dummy pattern. Placement of the first A/A dummy pattern and placement of the second A/A dummy pattern are carried out in separate steps. The semiconductor substrate may be divided into a plurality of mesh regions, and a dummy pattern may be placed in each mesh region according to an area of the mesh region being occupied by an element pattern located therein.

Abstract: An oxide etching recipe including a heavy hydrogen-free fluorocarbon having F/C ratios less than 2, preferably C4F6, an oxygen-containing gas such as O2 or CO, a lighter fluorocarbon or hydrofluorocarbon, and a noble diluent gas such as Ar or Xe. The amounts of the first three gases are chosen such that the ratio (F—H)/(C—O) is at least 1.5 and no more than 2. Alternatively, the gas mixture may include the heavy fluorocarbon, carbon tetrafluoride, and the diluent with the ratio of the first two chosen such the ratio F/C is between 1.5 and 2.

Abstract: A method and a system for etching a substrate are disclosed. The substrate is disposed in a process chamber. A flow of precursor gas is introduced into the process chamber. An ionic plasma is then formed from the precursor gas in a plasma volume within the process chamber. A magnetic field is generated in the process chamber using magnetic sources disposed external to the plasma volume. The magnetic field divides the ionic plasma into a two regions, plasma within one region having a higher electron temperature than plasma within the other region. The low-electron temperature region is confined substantially above the substrate. Radicals are formed in this region for etching the substrate.