Abstract: A wet etchant solution composition and method for etching oxides of hafnium and zirconium including at least one solvent present at greater than about 50 weight percent with respect to an arbitrary volume of the wet etchant solution; at least one chelating agent present at about 0.1 weight percent to about 10 weight percent with respect to an arbitrary volume of the wet etchant solution; and, at least one halogen containing acid present from about 0.0001 weight percent to about 10 weight percent with respect to an arbitrary volume of the wet etchant solution.

Abstract: A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.

Abstract: A method of manufacturing a semiconductor device, including the steps of (a) rowing an InP layer on a surface of starting growth, resulting in the InP layer having a convex structure, and (b) wet etching the InP layer by an enchant including hydrochloric acid and acetic acid, and thereby flattening a surface of the InP layer.

Abstract: A first conductive type layer having a band gap energy smaller than that of an under growth layer formed on a substrate is formed by selective growth from an opening portion formed in the under growth layer, and an active layer and a second conductive type layer are stacked on the first conductive type layer, to form a stacked structure. When such a stacked structure for forming a semiconductor device is irradiated with laser beams having an energy value between the band gap energies of the under growth layer and the first conductive type layer, abrasion occurs at a first conductive type layer side interface between the under growth layer and the first conductive type layer, so that the stacked structure is peeled from the substrate and the under growth layer and simultaneously isolated from another stacked structure for forming another semiconductor device.

Abstract: In order to prevent dusting from a peripheral end portion of a wafer, a semiconductor film formed is removed from at least the entire surface of the backside of the wafer and from the peripheral portion of the wafer by etching at a high etching rate relative to an insulating film present beneath the semiconductor film, to realize a semiconductor apparatus in which the semiconductor film is formed in an integrated circuit pattern region on the face side of the wafer. Thus, the problem of dusting from the peripheral portion of the wafer is obviated, and a semiconductor apparatus with high reliability is realized.

Abstract: When using hot alkaline etchants such as KOH, the wafer front side, where various devices and/or circuits are located, must be isolated from any contact with the etchant. This has been achieved by using two chambers that are separated from each other by the wafer that is to be etched. Etching solution in one chamber is in contact with the wafer's back surface while deionized water in the other chamber contacts the front surface. The relative liquid pressures in the chambers is arranged to be slightly higher in the chamber of the front surface so that leakage of etchant through a pin hole from back surface to front surface does not occur. As a further precaution, a monitor to detect the etchant is located in the DI water so that, if need be, etching can be terminated before irreparable damage is done.

Abstract: Embodiments of the present invention relate to a process for filling a trench structure of a semiconductor device to prevent formation of voids in the trench structure so as to minimize current leakage and provide excellent electrical properties. In one embodiment, a process for filling a trench of a semiconductor device comprises providing a semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate; forming an oxide layer on the silicon nitride layer; partially removing the oxide layer, the silicon nitride layer and the semiconductor substrate to form at least one trench; forming a sacrificial oxide layer on sidewalls of the trench; removing the sacrificial oxide layer; performing an etching procedure to remove portions of the silicon nitride layer protruding from the sidewalls of the trench so as to form substantially even sidewalls of the trench; and forming a trench-fill layer to fill the trench and deposit on the oxide layer.

Abstract: A method is disclosed for accurately predicting the wet etch end points as a function of the temperature and concentration of the etching solution, as well as of the thickness of the film to be etched. This is accomplished by fitting an etch rate equation to the process of etching a film in terms of two constant parameters that are determined by one set of experiments performed on a given wet etch bench. Thereafter, the constants are used with the rate equation to calculate precisely the etch rate of a film, and then the etch rate is divided into a target film loss or a target film thickness to obtain etching time, or time to etch, which takes into account the variations in temperature and concentration, for example, of the acid in the solution. The resulting film either looses the specified amount of material, or acquires the specified thickness without incurring any damage, which is especially suited for sub-micron semiconductor technology where precise etching is required.

Abstract: Methods are provided for removing edge beads from spin-on films. A spin-on film is removed from a region of a surface of a spin-coated substrate adjacent to an edge of the surface by spinning the spin-coated substrate, expanding a fluid through a nozzle to form a cryogenic aerosol stream, and directing the cryogenic aerosol stream against the spin-on film in the region as the substrate spins. In another aspect of the invention, a film is formed on a surface of a substrate by dispensing a liquid composition onto the surface, spinning the substrate to distribute the liquid composition to form a substantially uniform film on the surface, expanding a fluid through a nozzle to form a cryogenic aerosol stream, and directing the cryogenic aerosol stream against the film in a region of the surface adjacent to an edge of the surface as the substrate spins. The film may include an alkoxysilane and a low volatility solvent. The fluid may consists essentially of liquid carbon dioxide.

Abstract: Disclosed is a a method of fabricating a MEMS device by means of surface micromachining without leaving any stiction or residues by etching silicon oxide of a sacrificial layer, which is an intermediate layer between a substrate and a microstructure, rather than by etching silicon oxide of a semiconductor device. The method according to the invention includes the steps of supplying alcohol vapor bubbled with anhydrous HF, maintaining a temperature of the supplying device and a moving path of the anhydrous HF and the alcohol to be higher than a boiling point of the alcohol, performing a vapor etching by controlling a temperature and a pressure to be within the vapor region of a phase equilibrium diagram of water, and removing silicon oxide of a sacrificial layer on a lower portion of the microstructure.

Abstract: A develop process for reduced cycle time and reduced defects in the develop process for semiconductor/IC fabrication is shown. The use of a linear slit scan nozzle provides even distribution of a layer of develop material within an acceptable thickness and uniformity range such that a pre-wet step is not needed to spread the develop material evenly over the surface of a wafer. The use of a whip operation prior to rinsing with DI water significantly reduces develop defects.

Abstract: A passive integrated component (10) is formed overlying a semiconductor substrate by etching a composite conductive layer using a solution of sodium persulfate or ceric ammonium nitrate to remove a lower portion of the composite copper layer (64) exposed by an upper portion of the composite copper layer (74, 76, 78) to expose an underlying surface (62).

Abstract: A method for forming thoroughly deposited shallow trench isolation. A first oxide layer is formed conformally over the surface of a semiconductor substrate and on a trench thereon with an aspect ratio greater than 3. A liquid etching shield is filled in the trench by spin-spraying to cover the oxide layer in the trench. An etchant is then sprayed over the surface of the semiconductor substrate to remove the uncovered oxide layer and expose the surface of the semiconductor substrate. The density of the etchant is less than that of the liquid etching shield. A second oxide layer is deposited in the trench to form isolation without voids or seams.

Abstract: An apparatus for processing a semiconductor wafer or similar article includes a reactor having a processing chamber formed by upper and lower rotors. The wafer is supported between the rotors. The rotors are rotated by a spin motor. A processing fluid is introduced onto the top or bottom surface of the wafer, or onto both surfaces, at a central location. The fluid flows outwardly uniformly and in all directions. A wafer support automatically lifts the wafer, so that it can be removed from the reactor by a robot, when the rotors separate from each other after processing.

Abstract: The invention includes semiconductor processing methods, including methods of forming capacitors. In one implementation, a semiconductor processing method includes providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form. The metal comprises an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof. At least a portion of the layer is etched in a halogenide, ozone and H2O comprising ambient.

Abstract: This application is about a method for removing the deep trench Si-needles on a wafer. The method includes steps of forming a photoresist layer on a frontside surface of the wafer, removing a specific area of the photoresist layer for exposing the Si-needles, proceeding a first etching and a second etching, and finally removing the photoresist layer on the frontside surface of the wafer. The first etching is a wet etching for removing the Si-needles by an etching solution etching from a backside surface of the wafer back to the frontside surface of the wafer. And, the second etching is a dry etching for removing the residual silicon nitride (SiN) slices formed during the first etching.

Abstract: A process for producing a semiconductor wafer is based upon etching the semiconductor wafer with an etching medium flowing in a laminar flow along a direction of flow toward an edge of the semiconductor wafer. There is a protective shield arranged in front of the edge of the semiconductor wafer, so that the etching medium flows onto the protective shield and not onto the edge of the semiconductor wafer. There is also a process that has the semiconductor wafer being inclined with respect to the direction of flow of the etching medium, so that there is an angle of less than 180° between the direction of flow of the etching medium and a first side of the semiconductor wafer. Also, there is an angle of greater than 180° between the direction of flow of the etching medium and a second side of the semiconductor wafer, and the second side of the semiconductor wafer is subsequently polished.

Abstract: An in-process microelectronics device is treated by applying a heated liquid to the surface of the in-process microelectronics device, removing a portion of the liquid from the surface of the in-process microelectronics device and applying anhydrous HF gas to the surface of the in-process microelectronics device.

Abstract: A method of relieving surface stress on a thin wafer by removing a small portion of the wafer substrate, the substrate being removed by applying a solution of KOH to the wafer while the wafer spins.

Abstract: A method and apparatus for etching a semiconductor die are disclosed whereby flowing an etchant material across an inactive thereof thins the semiconductor die. In one embodiment, the etchant includes a mixture of nitric acid, hydrofluoric acid, and acetic acid and turbulently flows from one edge of the semiconductor die, across the inactive surface of the semiconductor die, to an opposing edge of the semiconductor die.

Abstract: A non-contact apparatus and method for removing a metal layer from a substrate are provided. The apparatus includes a rotatable anode substrate support member configured to support a substrate in a face-up position and to electrically contact the substrate positioned thereon. A pivotally mounted cathode fluid dispensing nozzle assembly positioned above the anode substrate support member is also provided. A power supply in electrical communication with the anode substrate support member and the cathode fluid dispensing nozzle is provided, and a system controller configured to regulate at least one of a rate of rotation of the anode substrate support member, a radial position of the cathode fluid dispensing nozzle, and an output power of the power supply is provided. The method provides for the removal of a metal layer from a substrate by rotating the substrate in a face up position on a rotatable substrate support member.

Abstract: In this disclosure, air flow is formed above chemical liquid film and a move of the chemical liquid is generated by making the air flow into a contact with the surface of chemical liquid. Further, a negative pressure is generated in a space between a processing object substrate and a plate by rotating the plate. Consequently, uniformity of processing of chemical liquid is improved, so that liquid removing step can be carried out effectively. As a result, yield rate of chemical liquid treatment can be improved.

Abstract: Process solutions comprising one or more acetylenic diol type surfactants are used to reduce the number of defects in the manufacture of semiconductor devices. In certain preferred embodiments, the process solution of the present invention may reduce post-development defects by improving the wetting of the solution on the surface of the patterned photoresist layer while minimizing foaming and bubble generation.

Abstract: Process solutions comprising one or more surfactants are used to reduce the number of defects in the manufacture of semiconductor devices. In certain preferred embodiments, the process solution of the present invention may reduce post-development defects such as pattern collapse when employed as a rinse solution either during or after the development of the patterned photoresist layer. Also disclosed is a method for reducing the number of pattern collapse defects on a plurality of photoresist coated substrates employing the process solution of the present invention.

Abstract: A method of manufacturing an electronic device, in particular but not exclusively a semiconductor device, in which method a substrate (2) is placed inside a process chamber (1) and a surface (3) of the substrate (2) is subjected to an ozone treatment comprising the steps of: providing a liquid onto the surface (3) of the substrate (2) via first supply means, introducing a solution comprising a liquid carrier solvent and ozone gas into the process chamber (1) via second supply means, without bringing about direct contact between the solution and the surface (3) of the substrate (2).

Abstract: A method is described for local etching of surfaces. The method includes the steps of providing a surface, providing an etchant, and providing a device for supplying and extracting the etchant. The device contains two cylindrical lines of different cross-sectional areas, of which the cylindrical line with the smaller cross-sectional area is guided inside the cylindrical line with the larger cross-sectional area. An etchant is fed through the inner line to the region of the semiconductor wafer that is to be etched, and the etchant that spreads out beyond the region of the surface that is to be etched is extracted through the outer line. The cross-sectional area of the outer line is less than or equal to the area of the region of the surface which is to be etched.

Abstract: An embedding resin embeds an electronic part in an object and has a dielectric constant of about 5 or less and tan &dgr; of about 0.08 or less.

Abstract: A method for the duplication of microscopic patterns from a master to a substrate is disclosed, in which a replica of a topographic structure on a master is formed and transferred when needed onto a receiving substrate using one of a variety of printing or imprint techniques, and then dissolved. Additional processing steps can also be carried out using the replica before transfer, including the formation of nanostructures, microdevices, or portions thereof. These structures are then also transferred onto the substrate when the replica is transferred, and remain on the substrate when the replica is dissolved. This is a technique that can be applied as a complementary process or a replacement for various lithographic processing steps in the fabrication of integrated circuits and other microdevices.

Abstract: An integrated semiconductor substrate bevel cleaning system that enables transfer of substrates through the bevel cleaner either with or without substrate processing within the bevel cleaner. The invention provides an integrated bevel cleaning apparatus comprising a transfer position, a rinsing position and an etching position.

Abstract: A method and an apparatus for removing coating layers from the top of alignment marks on a wafer situated in a spin processor are described. The method may be carried out by first providing a spin process equipped with a rotatable wafer pedestal, then providing a wafer that has at least one alignment mark covered by a coating layer, mounting an edge ring on an outer periphery of the wafer pedestal, the edge ring has at least one tab section extending outwardly from an inner periphery of the edge ring, then positioning the wafer faced down and supported by an inert gas flow on the edge ring such that a narrow gap is formed between the tab section on the edge ring and the alignment marks and dispensing an etchant onto a backside of the wafer while rotating.

Abstract: An apparatus and method for delivering ozone to a workpiece. In one embodiment, fluid is sprayed onto a workpiece placed in an ozone-rich environment. Alternatively, ozone is mixed with the fluid prior to spraying the fluid onto the workpiece. When spraying the fluid, the invention pulses the fluid at desired rates to create a substantially uniform layer of ozone-rich fluid on the workpiece. In another embodiment, the workpiece is also slowly rotated during at least a portion of the time the layer of ozone-rich fluid is applied to the workpiece.

Abstract: An etchant for patterning indium tin oxide, wherein the etchant is a mixed solution of HCl, CH3COOH, and water, and a method of fabricating a liquid crystal display device are disclosed in the present invention. The method includes forming a gate electrode on a substrate, forming a gate insulating layer and an amorphous silicon layer on the gate electrode including the substrate, forming an active area by patterning the amorphous silicon layer, forming a source electrode and a drain electrode on the active area, forming a passivation layer on the source electrode and the drain electrode and the gate insulating layer, forming a contact hole exposing a part of the drain electrode, forming an indium tin oxide layer on the passivation layer, and forming an indium tin oxide electrode by selectively etching the indium tin oxide layer using a mixed solution of HCl, CH3COOH, and water as an etchant.

Abstract: The invention includes a method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising NO3−, F− and one or more organic acid anions having carboxylate groups. The invention also includes a semiconductor processing method of forming an opening to a copper-containing material. A mass is formed over a copper-containing material within an opening in a substrate. The mass contains at least one of an oxide barrier material and a dielectric material. A second opening is etched through the mass into the copper-containing material to form a base surface of the copper-containing material that is at least partially covered by particles comprising at least one of a copper oxide, a silicon oxide or a copper fluoride. The base surface is cleaned with a solution comprising nitric acid, hydrofluoric acid and one or more organic acids to remove at least some of the particles.

Abstract: The semiconductor wafer is made thin without any cracks and warp under good workability. The semiconductor wafer thinning process includes the first step of preparing a carrier 1 formed of a base 1a and a suction pad 1b provided on one surface of the base 1a or formed of a base film with an adhesive, the second step of bonding a semiconductor wafer to the carrier 1 in such a manner that a rear surface of the semiconductor wafer 2 with no circuit elements formed therein is opposite to the carrier to form a wafer composite 10, and the third step of holding the carrier of the wafer composite 10 with its semiconductor wafer 2 side up and spin-coating an etchant on the rear surface of the semiconductor wafer 2 thereby to make the semiconductor wafer 2 thin.

Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems apply liquid etchant in a precise manner at the edge bevel region of the wafer under viscous flow conditions, so that the etchant is applied on to the front edge area and flows over the side edge and onto the back edge in a viscous manner. The etchant thus does not flow or splatter onto the active circuit region of the wafer. An edge bevel removal embodiment involving that is particularly effective at obviating streaking, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.

Abstract: In the method for removing etching residue adhered on a semiconductor substrate using a stripping liquid containing fluorine, the stripping liquid on the semiconductor substrate can be flung away by rotating the semiconductor substrate after the residue removing treatment. Thereby, the etching of the interlayer insulating film caused between the residue removing treatment and washing with water can be minimized.

Abstract: In this disclosure, air flow is formed above chemical liquid film and a move of the chemical liquid is generated by making the air flow into a contact with the surface of chemical liquid. Further, a negative pressure is generated in a space between a processing object substrate and a plate by rotating the plate. Consequently, uniformity of processing of chemical liquid is improved, so that liquid removing step can be carried out effectively. As a result, yield rate of chemical liquid treatment can be improved.

Abstract: A method of removing a photoresist layer on a semiconductor wafer starts with placing the semiconductor wafer into a dry strip chamber. A dry stripping process is performed to remove the photoresist layer on the semiconductor wafer. The semiconductor wafer is then placed on a rotator of a wet clean chamber and horizontally rotated. A first cleaning process is performed to remove polymers and organic components on a surface of the semiconductor wafer. Then a second cleaning process is performed as well to remove polymers and particles on the surface of the semiconductor wafer. By performing a third cleaning process, a first cleaning solution employed in the first cleaning process and a second cleaning solution employed in the second cleaning process are removed from the surface of the semiconductor wafer. Finally, the semiconductor wafer is spun dry at the end of the method.

Abstract: A develop process for reduced cycle time and reduced defects in the develop process for semiconductor/IC fabrication is shown. The use of a linear slit scan nozzle provides even distribution of a layer of develop material within an acceptable thickness and uniformity range such that a pre-wet step is not needed to spread the develop material evenly over the surface of a wafer. The use of a whip operation prior to rinsing with DI water significantly reduces develop defects.

Abstract: A ruthenium containing metal 6′ adhering to a periphery of a device forming area, an end face and a rear face in a silicon substrate 10 is removed using a first remover containing (a) at least one compound selected from the group consisting of salts containing chlorate, perchlorate, iodate, periodate, salts containing bromine oxide ion, salts containing manganese oxide ion and salts containing tetravalent cerium ion and (b) at least one acid selected from the group consisting of nitric acid, acetic acid, iodic acid and chloric acid. After the removing treatment, the substrate is washed with hydrofluoric acid to remove the residual remover.

Abstract: The present invention generally provides an improved apparatus and method for removing an edge bead from a substrate. The apparatus includes a processing chamber having an edge bead removal fluid distribution system positioned therein and a substrate support member positioned in the processing chamber proximate the fluid distribution system. The substrate support member generally includes an upper substrate support surface having a plurality of fluid dispensing apertures formed therein, at least three capillary ring support posts radially positioned about a perimeter of the upper substrate support surface, and a annular capillary ring having a planar upper surface rigidly mounted to the capillary ring support posts.

Abstract: A substrate with striped ridge patterns formed on the surface thereof is transported along a transport path. A relationship is determined between the direction of the striped ridge patterns on the substrate surface and the direction of jetting out fluid to the substrate surface. The fluid is jetted out and blown to the substrate surface along the direction satisfying the determined relationship to process the surface of the substrate. It is possible to reliably perform a surface process of each substrate irrespective of different directions of striped ridge patterns on substrate surfaces.

Abstract: Embodiments of the invention generally provide an etchant mixing assembly for a semiconductor processing system. The etchant mixing assembly includes at least one acid source, at least one oxidizer source, a mixing tank selectively in fluid communication with the at least one acid source and the at least one oxidizer source, and a mixed etchant tank in fluid communication with the mixing tank. Additionally, a system controller configured to sense a low level of fluid in the mixed etchant tank, cause a fresh fluid solution to be mixed in the mixing tank, and cause the fresh fluid solution to the communicated to the mixed etchant tank is also provided in the etchant mixing assembly.

Abstract: The present invention provides a planar clean method applicable to shallow trench isolation (STI) for cleaning a substrate having a STI region formed thereon and a high density plasma (HDP) oxide on the surface of the STI region. A buffer oxide etch cleaning solution is exploited and matched by a planar clean way to let the oxide losses of the surface of the silicon substrate and the STI corners match the height and shape of the HDP oxide in the STI region. Thereby, the phenomenon of wrap rounding at the STI corners, which influences growth of the next thermal oxide, can be avoided. The present invention can prevent the STI corners from generating parasitic device characteristics and enhance electric characteristics of the device.

Abstract: An etching method and an etching apparatus for applying an etchant containing nitric acid and hydrofluoric acid to silicon to etch the silicon. The etchant used in etching is recovered, and brought into contact with a gas inert to the etchant, whereby the etchant is regenerated. At least a part of the regenerated etchant is reused in etching.

Abstract: An integrated semiconductor substrate bevel cleaning system that enables transfer of substrates through the bevel cleaner either with or without substrate processing within the bevel cleaner. The invention provides an integrated bevel cleaning apparatus comprising a transfer position, a rinsing position and an etching position.

Abstract: A method of manufacturing semiconductor devices is provided for forming a tungsten plug or polysilicon plug and minimizing the step-height of the intermediate insulating layer. An etching composition for this process is also provided as are semiconductor devices manufactured by this process. The method of manufacturing semiconductor devices includes the steps of forming a tungsten film having a certain thickness on an insulating layer and burying contact holes formed in the insulating layer constituting a specific semiconductor structure, and spin-etching the tungsten film using a certain etching composition such that the tungsten film is present only inside the contact holes not existing on the insulating film.

Abstract: A method for improving alignment precision in forming a color filter array is disclosed. This method comprises providing a substrate having a node region in the substrate and a dielectric layer on the substrate, and etching a portion of the dielectric layer to expose the node region. As a result, the alignment precision is improved by use of the node region with enhanced step height to increase the intensity of signal in a semiconductor process.

Abstract: In a process for treating a workpiece such as a semiconductor wafer, a processing fluid is selectively applied or excluded from an outer peripheral margin of at least one of the front or back sides of the workpiece. Exclusion and/or application of the processing fluid occurs by applying one or more processing fluids to the workpiece while the workpiece and a reactor holding the workpiece are spinning. The flow rate of the processing fluids, fluid pressure, and/or spin rate are used to control the extent to which the processing fluid is selectively applied or excluded from the outer peripheral margin.

Abstract: In-laid metallization patterns of copper or a copper alloy are fabricated by a damascene-type process wherein the upper surface of a thick, electroplated copper or copper alloy blanket or overburden layer filling recesses in a substrate surface is subjected to a mask-less, chemically-based differential etching step for partially planarizing/thickness reduction prior to a step of planarization by chemical-mechanical polishing (CMP). The inventive process enables an increase in manufacturing throughput, reduction in cost, and reduction in spent CMP slurry generation.