Projection Of Etchant Against A Moving Substrate Or Controlling The Angle Or Pattern Of Projected Etchant Patents (Class 438/748)
  • Patent number: 6376390
    Abstract: Methods and apparatuses for removing material from discrete areas on a semiconductor wafer are described. In one implementation, an etchant applicator is provided having a tip portion. Liquid etchant material is suspended proximate the tip portion and the etchant applicator is moved, together with the suspended liquid, sufficiently close to a discrete area on a wafer to transfer liquid etchant onto the discrete area. In various embodiments the tip portion can comprise fluid permeable materials, fluid-absorbent materials, and/or wick assemblies. An exhaust outlet can be provided operably proximate the tip portion for removing material from over the wafer. The tip portion can be moved to touch the discrete area.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: April 23, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Daniel B. Dow, Richard H. Lane
  • Patent number: 6365526
    Abstract: An optical illumination system wherein an increased amount of light from a light source can reach a light valve, in which a luminous flux of the light source is irradiated upon a first lens array. The luminous flux having passed through the first lens array is introduced to the polarization conversion system provided immediately before a second lens array, and a luminous flux coming out from the polarization conversion system is introduced to the second lens array and then irradiated upon the light valve. The first lens array has an image forming position f which satisfies S<f<L where L is an optical path length of a longer one of optical paths of P polarized light and S polarized light decomposed from the luminous flux from the light source by the polarization conversion system and S is an optical path length of a shorter one of the optical paths.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: April 2, 2002
    Assignee: Sony Corporation
    Inventors: Tatsuru Kanamori, Kenji Sugihara, Koji Kita, Makoto Shinoda
  • Patent number: 6340628
    Abstract: A chemical vapor deposition (CVD) process uses a precursor gas, such as with a siloxane or alkylsilane, and a carbon-dioxide-containing gas, such as CO2 with O2 or CO2 with CxH(2x+1)OH where 1≦x≦5, to deposit a dielectric layer with no photoresist “footing”, a low dielectric constant, and high degrees of adhesion and hardness. Because nitrogen is not used in the deposition process (the carbon-dioxide-containing gas replaces nitrogen-containing gases in conventional processes), amines do not build into the deposited layer, thereby preventing photoresist “footing”.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: January 22, 2002
    Assignee: Novellus Systems, Inc.
    Inventors: Patrick A. Van Cleemput, Ravi Kumar Laxman, Jen Shu, Michelle T. Schulberg, Bunsen Nie
  • Patent number: 6337027
    Abstract: The present invention relates to micro electromechanical systems (MEMS) devices and more specifically to a process for manufacturing MEMS devices having at least one suspended structural element. The present invention seeks to provide an improved method for manufacture of MEMS devices having improved safety and increased yield and throughput compared to conventional EDP immersion process techniques. MEMS devices are made using a modified dissolution process that removes, in a selective etch step, inactive silicon to release an active silicon device from a sacrificial substrate. The present invention uses a selective etchant in conjunction with a commercial spray acid processing tool to provide a dissolution process with improved throughput, improved repeatable and uniform etch rates and reduction in the number of processing steps and chemical containment for improved safety.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: January 8, 2002
    Assignee: Rockwell Science Center, LLC
    Inventor: Kurt D. Humphrey
  • Patent number: 6333275
    Abstract: A chemical etching system provides a mixture of sulfuric acid and hydrogen peroxide and serves as the etchant for removing residual copper from an edge bevel region of a semiconductor wafer. The etching system includes a dilution module where concentrated sulfuric acid and concentrated hydrogen peroxide are diluted to the appropriate concentrations and then stored. To reduce the likelihood that oxygen bubbles (from hydrogen peroxide decomposition) will appear in the etchant solution, stored sulfuric acid and hydrogen peroxide are mixed immediately prior to use. In this manner, the dissolved oxygen concentration in the hydrogen peroxide decreases well below the saturation level.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: December 25, 2001
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John B. Alexy, Jinbin Feng
  • Patent number: 6323134
    Abstract: To move an article in and out of plasma during plasma processing, the article is rotated by a first drive around a first axis, and the first drive is itself rotated by a second drive. As a result, the article enters the plasma at different angles for different positions of the first axis. The plasma cross-section at the level at which the plasma contacts the article is asymmetric so that those points on the article that move at a greater linear velocity (due to being farther from the first axis) move longer distances through the plasma. As a result, the plasma processing time becomes more uniform for different points on the article surface. In some embodiments, two shuttles are provided for loading and unloading the plasma processing system. One of the shuttles stands empty waiting to unload the processed articles from the system, while the other shuttle holds unprocessed articles waiting to load them into the system.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: November 27, 2001
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6319861
    Abstract: A method for improving the quality of a deposited layer over a silicon substrate in a selective deposition where the silicon substrate has a native oxide layer thereon. A plasma reaction using a halogen compound as a reactive agent is performed so that the native oxide layer is transformed into a silicon halide layer and then removed at low pressure. A layer of the desired material is formed over the native oxide free silicon substrate surface by selective deposition.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: November 20, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Hsueh-Hao Shih, Alan Cheng, Juan-Yuan Wu
  • Patent number: 6309981
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems apply liquid etchant in a precise manner at the edge bevel region of the wafer under viscous flow conditions, so that the etchant is applied on to the front edge area and flows over the side edge and onto the back edge in a viscous manner. The etchant thus does not flow or splatter onto the active circuit region of the wafer.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: October 30, 2001
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Carl Russo, Evan Patton
  • Publication number: 20010031425
    Abstract: In a semiconductor device fabricating process, a chemical amplification resist layer is formed on an insulating film formed on a semiconductor substrate, and the chemical amplification resist layer is patterned to form an opening. The insulating film formed on the semiconductor substrate is wet-etched using the patterned chemical amplification resist layer as a mask. Before the wet-etching is carried out, a surface treatment is conducted for the patterned chemical amplification resist layer to form an insoluble layer at a surface of the patterned chemical amplification resist layer, thereby to elevate a wet-etching-resistance of the patterned chemical amplification resist layer. Thus, deformation of a resist pattern formed of the patterned chemical amplification resist layer is prevented in the wet etching process, so that an opening pattern of a desired shape is formed in the insulating film.
    Type: Application
    Filed: May 25, 1999
    Publication date: October 18, 2001
    Inventor: KATSUYUKI ITO
  • Publication number: 20010027029
    Abstract: At least one strippable film on a surface of a thin film to be patterned is formed, then the at least one strippable film and the thin film to be patterned is patterned by using FIB, and thereafter the at least one strippable film is removed.
    Type: Application
    Filed: May 9, 2001
    Publication date: October 4, 2001
    Inventor: Akifumi Kamijima
  • Patent number: 6290865
    Abstract: The present invention removes unwanted deposited material from a substrate backside by chemically dissolving the material, while substantially preventing dissolution of the material from the substrate front side. Preferably, the dissolving process is included with a spin-rinse-dry process and uses a greater flow rate of rinsing fluid directed onto the front side compared to the flow rate of dissolving fluid directed onto a substrate backside to protect the substrate front side while the unwanted backside material is removed. The present invention includes the method of dissolving the unwanted material from the backside and edge and the associated apparatus.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: September 18, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Mark Lloyd, Ashok K. Sinha, Sergio Edelstein, Michael Sugarman
  • Publication number: 20010016428
    Abstract: A structure to enable damascene copper semiconductor fabrication is disclosed. There is a silicon nitride film for providing a diffusion barrier for Cu as well as an etch stop for the duel damascene process. Directly above the silicon nitride film is a silicon oxynitride film. The silicon oxynitride film is graded, to form a gradual change in composition of nitrogen and oxygen within the film. Directly above the silicon oxynitride film is silicon oxide. The silicon oxide serves as an insulator for metal lines. Preferably, the film stack of silicon nitride, silicon oxynitride and silicon oxide is all formed in sequence, within the same plasma-processing chamber, by modifying the composition of film-forming gases for forming each film.
    Type: Application
    Filed: March 12, 2001
    Publication date: August 23, 2001
    Inventors: Preston Smith, Chi-hing Choi
  • Patent number: 6274505
    Abstract: By locally heating or cooling a substrate in an etching process, temperature unevenness is controlled, and convection currents of an etching liquid are restricted simultaneously. By setting the etching temperature low in an initial stage of the etching process and increasing it in a final stage, uniform and quick etching is possible. In a drop etching method, generation of bubbles can be prevented to ensure uniform etching by providing gas release openings in a member opposed to the substrate.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: August 14, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shoko Ito, Mokuji Kageyama
  • Patent number: 6274506
    Abstract: A centrifugal spray processor for dispensing a stream of ozonated water toward one or more semiconductor wafers at a non-parallel angle that is inclined from the plane of the surface of the semiconductor wafer. The spray processor includes one or more supports for receiving a plurality of semiconductor wafers and a spray post for dispensing ozonated water from a reservoir onto the semiconductor wafers. The spray post includes a plurality of nozzles that are configured to dispense ozonated water at a generally downward angle toward the surface of the semiconductor wafer. The angle of incidence of the stream of ozonated water from the spray post as measured from the plane of the semiconductor is greater than 0 degrees, and is preferably greater than about 0 degrees and less than or equal to about 30 degrees depending upon the configuration of the spray post and the semiconductor wafers.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: August 14, 2001
    Assignee: FSI International, Inc.
    Inventors: Kurt K. Christenson, Steven L. Nelson
  • Patent number: 6265323
    Abstract: Disclosed herein is a method for processing a substrate. The method includes supplying a liquid agent such as a developer onto the surface of a substrate, bringing an upper surface of a film formed of the liquid agent into contact with a liquid agent holding member arranged so as to face the substrate, holding the liquid agent between the substrate and the liquid agent holding member, moving the substrate or the liquid agent holding member, or both, in parallel to the main surface of the substrate, while the main surface of the substrate is being treated with the liquid agent. Since the concentrations of reaction products and starting reaction materials become uniform in the liquid agent which contacts the substrate, the entire substrate can be processed uniformly.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: July 24, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroko Nakamura, Shinichi Ito, Katsuya Okumura
  • Patent number: 6245678
    Abstract: A Bernoulli type chucking device 2 supports the rear surface 12 of a semiconductor wafer 1. The etchant 30 turns around and reaches the portion beneath the beveled portion 13 of the semiconductor wafers 1. However, the etchant is restrained on the beveled portion by a gas flow coming from the openings 22A of the gas-expelling passages 22 in the centrifugal direction. The gas belows off the etchant, which has turned around and is going to reach the rear surface. Thus, the beveled portion 13 is mirror-finished when etching of the semiconductor wafer front surface 11 is carried out, and mirror-finishing of part of the rear surface 12 can be avoided. Furthermore, mirror-finishing can be performed without being influenced by the shape of the beveled portions of semiconductor wafers. Compared with conventional method, this invention can perform mirror-finishing more efficiently.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: June 12, 2001
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Hiroaki Yamamoto, Akihiro Ishii
  • Patent number: 6240933
    Abstract: The invention encompasses methods for cleaning surfaces of wafers or other semiconductor articles. Oxidizing is performed using an oxidation solution which is wetted onto the surface. The oxidation solution can include one or more of: water, ozone, hydrogen chloride, sulfuric acid, or hydrogen peroxide. A rinsing step removes the oxidation solution and inhibits further activity. The rinsed surface is thereafter preferably subjected to a drying step. The surface is exposed to an oxide removal vapor to remove semiconductor oxide therefrom. The oxide removal vapor can include one or more of: acids, such as a hydrogen halide, for example hydrogen fluoride or hydrogen chloride; water; isopropyl alcohol; or ozone. The processes can use centrifugal processing and spraying actions.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: June 5, 2001
    Assignee: Semitool, Inc.
    Inventor: Eric J. Bergman
  • Patent number: 6235641
    Abstract: This invention relates to a method and system for establishing and maintaining a precise concentration of dissolved gas in a liquid. More particularly, the invention relates to a method and system of establishing and maintaining a precise concentration of dissolved gas in a liquid by utilizing a gas blend comprising a sufficient concentration of the desired gas so as to be in equilibrium with the desired concentration of the gas to be dissolved in the liquid, i.e., a “matched gas blend”, to prepare a liquid admixture comprising the desired concentration of the gas. In this manner, the method and system of the present invention are able to produce liquid admixtures comprising precise concentrations of dissolved gas suitable for use in applications with tight specifications, and further, are capable of delivering the liquid admixture so produced to a point of use with substantially no loss of dissolved gas.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: May 22, 2001
    Assignee: FSI International Inc.
    Inventor: Kurt K. Christenson
  • Patent number: 6232228
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: May 15, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 6225235
    Abstract: The invention concerns a method for wet-chemical cleaning and etching of disc-shaped substrates in a closed processing chamber, wherein the substrate to be processed is received by a substrate support, the substrate is rotated and both sides of the substrate are simultaneously sprayed with chemicals.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: May 1, 2001
    Inventor: Horst Kunze-Concewitz
  • Patent number: 6162739
    Abstract: A process of controlled wet etching of semiconductor wafers having a silicon dioxide layer on each of two surfaces, includes entirely removing the silicon dioxide layer from a top side and selectively removing the silicon dioxide layer from the opposite side bottom in a defined area which extends to the inside from the peripheral edge of the semiconductor wafer using an etching medium which includes hydrofluoric acid or a combination of hydrofluoric acid and ammonium fluoride and at least one carboxylic acid.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: December 19, 2000
    Assignee: SEZ Semiconductor-Equipment Zubehor fur die Halbleiterfertigung AG
    Inventors: Franz Sumnitsch, Gerald Wagner
  • Patent number: 6156126
    Abstract: A method for cleaning a silicon wafer. The method includes intentionally exposing the wafer into a volatile solvent with a polarity between about 2 and 4, whereby the wafer is cleaned by the solvent such that the formation of silicon recesses in source/drain extension regions on the silicon wafer can be prevented or avoided.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: December 5, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Tung-Po Chen, Jih-Wen Chou
  • Patent number: 6153532
    Abstract: Methods and apparatuses for removing material from discrete areas on a semiconductor wafer are described. In one implementation, an etchant applicator is provided having a tip portion. Liquid etchant material is suspended proximate the tip portion and the etchant applicator is moved, together with the suspended liquid, sufficiently close to a discrete area on a wafer to transfer liquid etchant onto the discrete area. In various embodiments the tip portion can comprise fluid permeable materials, fluid-absorbent materials, and/or wick assemblies. An exhaust outlet can be provided operably proximate the tip portion for removing material from over the wafer. The tip portion can be moved to touch the discrete area.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: November 28, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Daniel B. Dow, Richard H. Lane
  • Patent number: 6146924
    Abstract: A new method is provided for the creation of a pre-molded chip carrier. The invention teaches putting magnetic inserts into the upper mold. The magnetic inserts attract the lead fingers that are inserted into the upper mold during the process of filling the cavity with a compound pressing the lead fingers tightly against the surface of the magnet. The possibility of mold compound spilling over the lead fingers and forming resin depositions on the surface of the lead fingers is thereby voided.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: November 14, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Daniel Chang, Chengder Huang, Pei-Haw Tsao
  • Patent number: 6140233
    Abstract: A method of manufacturing semiconductor devices is provided for forming a tungsten plug or polysilicon plug and minimizing the step-height of the intermediate insulating layer. An etching composition for this process is also provided as are semiconductor devices manufactured by this process. The method of manufacturing semiconductor devices includes the steps of forming a tungsten film having a certain thickness on an insulating layer and burying contact holes formed in the insulating layer constituting a specific semiconductor structure, and spin-etching the tungsten film using a certain etching composition such that the tungsten film is present only inside the contact holes not existing on the insulating film. The etching composition includes at least one oxidant selected from the group comprising H.sub.2 O.sub.2, O.sub.2, IO.sub.4.sup.-, BrO.sub.3, ClO.sub.3, S.sub.2 O.sub.8.sup.-, KlO.sub.3, H.sub.5 IO.sub.6, KOH, and HNO.sub.3, at least one enhancer selected from the group comprising HF, NH.sub.4 OH, H.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: October 31, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 6136724
    Abstract: An apparatus and method for performing multiple wet processing steps on objects placed within a sealed chamber. The apparatus include a sealable chamber, at least one processing tank within the chamber, and preferably also includes an intrachamber robot configured to move objects to be treated within the chamber. Preferred embodiments utilize at least two processing tanks within the chamber. During use of these exemplary embodiments, objects to be treated are placed within the sealed chamber and the chamber is sealed to create a sealed interior environment. The objects are immersed in a first treatment fluid which is in a first one of the tanks, and then carried by the intrachamber robot from the first to the second tank where there are immersed in a second treatment fluid in the second tank. The objects may be moved back and forth between the tanks as needed in order to complete the process being performed. After processing is complete, the chamber is unsealed and the objects are removed from the chamber.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: October 24, 2000
    Assignee: SCP Global Technologies
    Inventors: Eric T. Hansen, William Warren Becia, Thomas Wayne Ives, Victor B. Mimken, Randy Mark Hall, Tom Krawzak
  • Patent number: 6099662
    Abstract: An improved method for removing residual slurry particles and metallic residues from the surface of a semiconductor substrate after chemical-mechanical polishing has been developed. The cleaning method involves sequential spray cleaning solutions of NH.sub.4 OH and H.sub.2 O, NH.sub.4 OH, H.sub.2 O.sub.2 and H.sub.2 O, HF and H.sub.2 O, and HCl, H.sub.2 O.sub.2 and H.sub.2 O. The cleaning sequence is: 1. A pre-soak in a spray solution of NH.sub.4 OH and H.sub.2 O; 2. Spray cleaning in a solution of NH.sub.4 OH, H.sub.2 O.sub.2 and H.sub.2 O; 3. Spray cleaning in a dilute solution of HF and H.sub.2 O; 4. Spray rinsing in DI-water. It is important that slurry particulates first be removed by NH.sub.4 OH, H.sub.2 O.sub.2 and H.sub.2 O, followed by spray cleaning in a dilute solution of HF and H.sub.2 O to remove metallic residues.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: August 8, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ying-Lang Wang, Jowei Dun, Ken-Shen Chou, Yu-Ku Lin
  • Patent number: 6096233
    Abstract: The present invention provides a wet etching method applied to a thin, including the steps of (a) setting in advance an etching rate of said thin film in view of a kind of the thin film to be etched, components of said etchant solution, and temperature, (b) loading the substrate on a spin chuck such that the surface having the thin film formed thereon faces upward and, (c) detecting a thickness of the thin film in at least a peripheral portion and a central portion of the substrate.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: August 1, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Hiroki Taniyama, Miyako Yamasaka, Hiroyuki Kudou, Akira Yonemizu
  • Patent number: 6090721
    Abstract: Compositions of ammonium fluoride, propylene glycol, and water and methods of using these compositions to remove etch residues from silicon substrates which result from plasma or reactive ion etching of silicon substrate are provided. Not only do the compositions of the present invention overcome the environmental concerns associated with the use of ethylene glycol, but unlike previous compositions of ammonium fluoride in propylene glycol which are acidic, the compositions of the present invention are neutral to slightly basic (i.e., pH 7 to about pH 8). Hence, they remove etch residues from silicon substrates with minimal attack on other features on the silicon substrates.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: July 18, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Donald L. Yates
  • Patent number: 6063712
    Abstract: An oxide etchant and method of etching are provided. The etchant includes at least one fluorine-containing compound and at least one auxiliary component selected from the group of a boron-containing compound and a phosphorus-containing compound.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: May 16, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, David A. Korn
  • Patent number: 6033988
    Abstract: There is provided a spin coating process of forming a coating film through spin coating of a solution on a substrate, wherein periphery portions of the coating film are removed. The film forming method comprises the steps of: (a) initiating dropwise dispensing of a first solvent having a relatively low affinity for the coating film at a position slightly insider a periphery of the substrate covered by the coating film; (b) initiating dropwise dispensing of a second solvent having a relatively high affinity for the coating film at a position closer to the periphery of the substrate as compared to the position of the dropwise dispensing of the first solvent, where the dropwise dispensing of the second solvent is initiated simultaneous to or after the initiation of the dropwise dispensing of the first solvent; (c) stopping the dropwise dispensing of the first solvent; and (d) stopping the dropwise dispensing of the second solvent after stopping the dropwise dispensing of the first solvent.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: March 7, 2000
    Assignee: Kawasaki Steel Corporation
    Inventor: Shinji Hirano
  • Patent number: 6028010
    Abstract: A ring prevents particulate build-up in a chemical spraying chamber, and includes a top portion that has a rim, and rests on a base flange of the spraying chamber, and a bottom portion that has a vertical segment that extends below a bottom surface of the base flange.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: February 22, 2000
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Joseph Mitchell Szettella, Jeffrey Eugene Ozee, Augusto James Gonzales, Bryan Cary Tucker
  • Patent number: 6010964
    Abstract: A surface treatment method for use in integrated circuit fabrication includes providing a substrate assembly having a surface. A liquid is provided adjacent the surface resulting in an interface therebetween. An electrical potential difference is applied across the interface and the surface is treated as the electrical potential difference is applied across the interface. The liquid may be a planarization liquid when the treatment of the surface includes planarizing a substrate assembly or the liquid may be a coating material when the treatment of the surface includes applying a coating material on the surface.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: January 4, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Thomas R. Glass
  • Patent number: 5932493
    Abstract: Formation of watermarks during semiconductor processing can be prevented by rinsing silicon wafers in an organic solvent prior to drying. Water droplets on the silicon wafer surface are taken up by the solvent and film is formed over the wafer surface. Following this rinse, the wafer may be subjected to standard IPA-based drying techniques.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: August 3, 1999
    Assignee: International Business Machines Corporaiton
    Inventors: Hiroyuki Akatsu, Ronald Hoyer, Ravikumar Ramachandran
  • Patent number: 5925259
    Abstract: A process for producing lithographic features in a substrate layer is is described, comprising the steps of lowering a stamp (15) carrying an reactant (14) onto a substrate (10), confining the subsequent reaction to the desired pattern, lifting said stamp and removing the debris of the reaction from the substrate. Preferably, the stamp carries the pattern to be etched or depressions corresponding to such a pattern. Using the described methods, patterns with submicron features can be generated. The method allows a general solution to parallel handling and transfer of materials in a variety of technical fields.
    Type: Grant
    Filed: August 1, 1996
    Date of Patent: July 20, 1999
    Assignee: International Business Machines Corporation
    Inventors: Hans Andre Biebuyck, Bruno Michel
  • Patent number: 5914281
    Abstract: According to the invention, a plurality of wafers are disposed in a steady-state rotating flow of a mixed acid in a main chemical processing zone in an etching trough, the rotating flow being formed to be substantially concentric circle with the wafers, thus permitting uniform dispersion of air bubbles for bubbling in the mixed acid and stable flow thereof to obtain reliable reproduction of satisfactory flatness and luster. A flow of mixed acid in the etching trough is formed as a superficial horizontal laminar flow in the neighborhood of the liquid level and a rotating flow induced in the neighborhood of the semiconductor wafer. Mixed acid in the etching trough is caused to overflow from the mixed acid supply side to the opposite side and is thus discharged.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: June 22, 1999
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Tatsuo Abe, Makoto Suzuki
  • Patent number: 5897379
    Abstract: A method of using diluted nitric acid and an edge bead removal tool to remove copper from the perimeter of a semiconductor wafer is provided. In one embodiment, sensitive areas of the wafer are covered with photoresist, and the wafer perimeter cleared of photoresist, before the acid is applied. In another embodiment, sensitive areas of the wafer are protected with water spray as the copper etchant is applied. In a third embodiment, the nitric acid is applied to clear the wafer perimeter of copper before a chemical mechanical polishing (CMP) is performed on the layer of deposited copper. The excess thickness of copper protects copper interconnection structures from reacting with the copper etchant. All these methods permit copper to be removed at a low enough temperature that copper oxides are not formed. A semiconductor wafer cleaned of copper in accordance with the above-described method, and a system for low temperature copper removal is also provided.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: April 27, 1999
    Assignees: Sharp Microelectronics Technology, Inc., Sharp Kabushiki Kaisha
    Inventors: Bruce Dale Ulrich, Tue Nguyen, Masato Kobayashi
  • Patent number: 5893983
    Abstract: A technique for polishing an exposed surface of metal on a substrate to remove defects from mechanical working of metals, such as burrs and pigtails resulting from drilling, and defects from plating, such as nodules and depressions, is provided. The substrate has an exposed metal surface such as copper thereon which is to be treated to remove defects. A planarizing or polishing head, preferably a rotating roller, is provided which is continuously rotating with respect to the substrate, with the head in contact with the metal surface on the substrate. A chemical etchant, essentially free of abrasive material, is continuously supplied to the interface between the metal surface and the head. The treating and polishing continues until the defects have been removed or reduced to an acceptable value. In some instances where significant height reduction is required, thus requiring significant metal removal, several passes of the substrate may be required or a device with multiple heads may be used.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: April 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Voya Rista Markovich, George Frederick Reel, Jose Antonio Rios, Timothy Leroy Wells, Michael Wozniak
  • Patent number: 5883012
    Abstract: Trench structures (12,32,35,46) are formed in single crystal silicon substrates (10,30) that have either a (110) or (112) orientation. A selective wet etch solution is used that removes only the exposed portions of the single crystal silicon substrates (10,30) that are in the (110) or (112) crystal planes. The trench structures (12,32,35,46) are defined by the {111} crystal planes in the single crystal silicon substrate (10,30) that are exposed during the selective wet etch process. Trench structures (32,35) can be formed on both sides of a single crystal silicon substrate (30) to form an opening (34). Opening (34) can be used as an alignment mark to align front side processing to backside and vice versa. Trench structures can also be use to form a microstructure (41,61) for a sensor (40,60).
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: March 16, 1999
    Assignee: Motorola, Inc.
    Inventors: Herng-Der Chiou, Ping-Chang Lue
  • Patent number: 5879577
    Abstract: A method is described for selectively etching photoresist on a semiconductor substrate having one or more layers of a spin on glass, including an edge bead that was formed when the glass was originally applied. First the wafer is coated with a layer of unexposed, undeveloped negative photoresist. Then, while spinning the wafer, a vertical jet of photoresist EBR solvent is directed to a point just inside the edge so that photoresist gets removed from an annular area extending inwards from the perimeter. The edge bead is then removed using a liquid etchant and integrated circuit processing can now proceed, making use of the unexposed, undeveloped layer of photoresist in the usual way; that is, exposing it through a mask and then developing and baking it before using it as an etch mask. The method is general and may be used in other situations where selective removal of photoresist along the periphery is required and where the remaining resist is to be used for other purposes.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: March 9, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Kuo-Yao Weng, Yeh-Jye Wann
  • Patent number: 5874366
    Abstract: The method and system of the invention allow etching even relatively thick layers on the rear side of a semiconductor substrate where the front side is resist-free. An etching solution is sprayed in fine droplets onto the rear side of the semiconductor substrate. The semiconductor substrate may thereby be heated to a temperature .ltoreq.100.degree. C.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: February 23, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Roland Sporer, Josef Mathuni, Alexander Gschwandtner
  • Patent number: 5868898
    Abstract: A wet chemical process tank for processing semiconductor wafers equipped with a specially designed fluid dispenser positioned at the bottom of the tank where the dispenser has a fluid dispensing member having an elongated body connected on at least one end to at least one support member for stabilizing the member and a fluid passage therein in fluid communication with a plurality of openings provided on at least one of the vertical sides of the member such that a fluid may only exit the member in a horizontal direction so that bubbles generated do not directly contact the semiconductor wafers suspended at the center of the tank.
    Type: Grant
    Filed: November 21, 1996
    Date of Patent: February 9, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai Huai Liu, Kuo Liang Lu, B. J. Chang
  • Patent number: 5866480
    Abstract: A polishing pad is adhered to the top surface of a flat polishing pad holder of a platen. A substrate holding head for holding and rotating a semiconductor substrate is provided above the platen. The semiconductor substrate is rotated and pressed against the polishing pad on the platen. A slurry is supplied in a prescribed amount from a slurry supply pipe onto the polishing pad. A slat-like slurry pushing member for pushing the slurry to a central portion of the platen is provided slidably over the polishing pad. The slurry pushing member is fixed so that an inner portion thereof in a radial direction of the platen is downstream of an outer portion thereof in the radial direction of the platen in the direction of rotation of the platen during polishing.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: February 2, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomoyasu Murakami, Mikio Nishio
  • Patent number: 5851928
    Abstract: A method of etching a semiconductor substrate (11) includes thinning (102) the semiconductor substrate (11), providing (103) a support layer (30) for the semiconductor substrate (11), providing (104) an etch mask (28) over the semiconductor substrate (11), and etching (105) the semiconductor substrate (11) using an etchant mixture of hydrofluoric acid, nitric acid, phosphoric acid, sulfuric acid, and a wetting agent at a temperature below ambient. The method is capable of using one etch step (105) and one etch mask (28) to form a plurality of trenches (12, 13) having the same width (15, 17) but different depths (16, 18) and different orientations. The method can be used to singulate different sizes and configurations of semiconductor dice from the semiconductor substrate (11).
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: December 22, 1998
    Assignee: Motorola, Inc.
    Inventors: Jerry D. Cripe, Jerry L. White, Carl E. D'Acosta
  • Patent number: 5821170
    Abstract: A method for etching aluminum containing layers. A layer (13) of aluminum nitride is formed on a semiconductor substrate (11). The layer (13) of aluminum nitride is etched using a dilute ammonium hydroxide solution that is diluted with water such that the ammonium hydroxide solution has one part of ammonium hydroxide to at least fifteen parts of water. The dilute ammonium hydroxide solution is showered onto the semiconductor substrate and forms an aluminum hydroxide layer. The aluminum hydroxide layer is dissolved by excess water in the dilute aluminum hydroxide solution and rinsed from the semiconductor substrate (11).
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: October 13, 1998
    Assignee: Motorola, Inc.
    Inventors: Lawrence S. Klingbeil, Jr., Terry K. Daly
  • Patent number: 5780363
    Abstract: An aqueous etchant composition containing about 0.01 to about 15 percent by weight of sulfuric acid and about 0.01 to about 20 percent by weight of hydrogen peroxide or about 1 to 30 ppm of ozone is effective in removing polymer residue from a substrate, and especially from an integrated circuit chip having aluminum lines thereon.
    Type: Grant
    Filed: April 4, 1997
    Date of Patent: July 14, 1998
    Assignee: International Business Machines Coporation
    Inventors: Donald John Delehanty, Rangarajan Jagannathan, Kenneth John McCullough, Donna Diane Miura, George F. Ouimet, Jr., David Lee Rath, Bryan Newton Rhoads, Frank John Schmidt, Jr.
  • Patent number: 5759427
    Abstract: A technique for chemically planarizing an exposed surface of metal on a substrate to a pre-determined thickness is provided. The substrate has an exposed metal surface such as copper circuitry on a dielectric substrate which is to be planarized. Typically, this will be circuitization extending above a photoresist layer. A planarizing head is rotated against the substrate, with the planarizing head in contact with the metal surface on the substrate. A chemical etchant, essentially free of abrasive material, is continuously supplied to the interface between the metal surface and the planarizing head. The planarizing continues until a predetermined thickness of the metal has been reached. In circuit board manufacturing, this will form a surface co-planar with the photoresist. In some instances where significant height reduction is required, thus requiring significant metal removal, several passes of the substrate may be required or a device with multiple heads may be used.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: June 2, 1998
    Assignee: International Business Machines Corporation
    Inventors: Edward Cibulsky, Gerald Andrew Kiballa, Voya Rista Markovich, Gary Leigh Newman, John Francis Prikazsky, Michael Wozniak