Abstract: A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.

Abstract: A method of creating insulating layers on different semiconductor materials includes providing a substrate having disposed thereon a first material and a second material, the second material having a chemical composition different from the first material; non-epitaxially depositing a continuous sacrificial layer of approximately constant thickness onto the first material and the second material, and then converting the sacrificial layer into a layer consisting essentially of SiO2 without oxidizing more than 10 angstroms into the second material. A structure includes a silicon nitride film disposed conformally on a silicon layer and a silicon germanium layer; a SiO2 layer is disposed on the silicon nitride film.

Abstract: A method of forming a semiconductor device is provided that includes forming a Ge-containing layer atop a p-type device regions of the substrate. Thereafter, a first dielectric layer is formed in a second portion of a substrate, and a second dielectric layer is formed overlying the first dielectric layer in the second portion of the substrate and overlying a first portion of the substrate. Gate structures may then formed atop the p-type device regions and n-type device regions of the substrate, in which the gate structures to the n-type device regions include a rare earth metal.

Abstract: A method of electrically activating a structure having one or more graphene layers formed on a silicon carbide layer includes subjecting the structure to an oxidation process so as to form a silicon oxide layer disposed between the silicon carbide layer and a bottommost of the one or more graphene layers, thereby electrically activating the bottommost graphene layer.

Abstract: The present invention provides methods of protecting a surface of an aluminum nitride substrate. The substrate with the protected surface can be stored for a period of time and easily activated to be in a condition ready for thin film growth or other processing. In certain embodiments, the method of protecting the substrate surface comprises forming a passivating layer on at least a portion of the substrate surface by performing a wet etch, which can comprise the use of one or more organic compounds and one or more acids. The invention also provides aluminum nitride substrates having passivated surfaces.

Abstract: An antenna with air-filled trench is integrated with a radio frequency (RF) circuit. The trench locates directly under the metal lines that made up the antenna and is formed by etching from the back side of the semiconductor substrate until all the substrate material in the trench is removed. The air-filled trench greatly reduces the losses due to the semiconductor substrate; therefore the performance of the antenna improves greatly. When the antenna is a large planar spiral inductor, the air-filled trench means the semiconductor substrate inside the spiral inductor is untouched; hence integrated circuit can be built inside the antenna and on that substrate. Therefore the RF integrated circuit has a smaller size. Air-filled trench can also be used to reduce the semiconductor substrate noise coupling between digital circuit block and analog/RF circuit block. This air-filled trench and the air-filled trench under the antenna are formed at the same time.

Abstract: A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.

Abstract: An apparatus for producing a group-III nitride semiconductor layer which forms a group-III nitride semiconductor layer on a substrate by a sputtering method, the apparatus including: a first plasma-generating region where a target containing a group-III element is disposed and the target is sputtered to generate material particles formed of a material contained in the target; and a second plasma generating region where the substrate is disposed and nitrogen-containing plasma is generated. The first plasma-generating region and the second plasma-generating region are provided inside a chamber, and the first plasma-generating region and the second plasma-generating region are separated by a shielding wall which has an opening part from which the material particles are supplied onto the substrate. Also disclosed are a method of producing a group-III nitride semiconductor layer, a method of producing a group-III nitride semiconductor light-emitting device, and a lamp thereof.

Abstract: An object of the present invention is to remove micro-scratches on a surface of a GaN substrate cut from a GaN ingot. The invention is directed to establish a method for surface treatment of a GaN substrate, including heating the surface in an atmosphere containing trimethylgallium, ammonia, and hydrogen. It is preferable that the trimethylgallium feeding rate is 150 ?mol/min or higher, the ratio of trimethylgallium feeding rate to ammonia feeding rate (V/III ratio) is 1,200 to 4,000, and the heating temperature is 1,000° C. to 1,250° C. In addition, the temperature of the surface treatment is set to be higher than that of the following GaN growth, and the feed rate of trimethylgallium is lower than that of the growth procedure. RMS of roughness on the substrate was equal to or less than 1.3 nm, and the substrate whose step condition is excellent can be obtained.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes ion-implanting an impurity in a surface of a silicon carbide wafer, and forming a carbon protection film of a predetermined thickness over all surfaces of the silicon carbide wafer, which has been ion-implanted with the impurity, by a chemical vapor deposition method that deposits a film by pyrolyzing a hydrocarbon gas. The method also includes annealing the silicon carbide wafer after the forming the carbon protection film.

Abstract: Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. A two frequency plasma source is used to form a plasma in a plasma reactor. In various embodiments, different quantities of power are supplied to a power source operating at the first frequency and a power source operating at the second frequency over time.

Abstract: An apparatus for depositing a solid film onto a substrate from a reagent solution includes a reservoir of solution maintained at a low temperature to inhibit homogeneous reactions. The solution contains multiple ligands to control temperature stability and shelf life. The chilled solution is periodically dispensed onto a substrate positioned in a holder having a raised peripheral structure that retains a controlled volume of solution over the substrate. The solution is periodically replenished so that only the part of the solution directly adjacent to the substrate is heated. A heater maintains the substrate at an elevated temperature at which the deposition of a desired solid phase from the solution may be initiated. The apparatus may also dispense excess chilled solution to cool various components within the apparatus and minimize nucleation of solids in areas other than on the substrate. The apparatus is particularly suited to forming films of II-VI semiconductors.

Abstract: A method of manufacturing a metal compound thin film is disclosed. The method may include forming a first metal compound layer on a substrate by atomic layer deposition, performing annealing on the first metal compound layer in an atmosphere containing a nitrogen compound gas, thereby diffusing nitrogen into the first metal compound layer, and forming a second metal compound layer on the first metal compound layer by atomic layer deposition.

Abstract: A method of manufacturing a silicon carbide semiconductor device having low interface state density in an interface region between a gate insulating film and a silicon carbide layer is provided. An epitaxially grown layer is grown on a 4H-SiC substrate, and thereafter ion implantation is performed to form a p well region, a source region and a p+ contact region that are ion implantation layers. Thereafter, using thermal oxidation or CVD, the gate insulating film formed by a silicon oxide film is formed on the p well region, the source region and the p+ contact region. Then, plasma is generated using a gas containing N2O, which is the gas containing at least any one of oxygen and nitrogen, so as to expose the gate insulating film to plasma.

Abstract: Pile ups of threading dislocations in thick graded buffer layer are reduced by enhancing dislocation gliding. During formation of a graded SiGe buffer layer, deposition of SiGe from a silicon precursor and a germanium precursor is interrupted one or more times with periods in which the flow of the silicon precursor to the substrate is stopped while the flow of the germanium precursor to the substrate is maintained.

Abstract: This invention provides apparatus, protocols, and methods that permit wafers to be loaded and unloaded in a gas-phase epitaxial growth chamber at high temperatures. Specifically, this invention provides a device for moving wafers or substrates that can bath a substrate being moved in active gases that are optionally temperature controlled. The active gases can act to limit or prevent sublimation or decomposition of the wafer surface, and can be temperature controlled to limit or prevent thermal damage. Thereby, previously-necessary temperature ramping of growth chambers can be reduced or eliminated leading to improvement in wafer throughput and system efficiency.

Abstract: A wafer support pin has a front end contacted with a wafer such that the front end is flat or rounded. Thus, gravitational stress is minimized during annealing the wafer, thereby minimizing slip dislocation. This wafer support pin is suitably used for annealing of a wafer, particularly high temperature rapid thermal annealing of a large-diameter wafer.

Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.

Abstract: The present invention provides a manufacturing method of a group III nitride semiconductor light-emitting device, including a lamination step of forming a plurality of lamination films including a group III nitride semiconductor on a substrate, in which a substrate on which is formed a foundation layer including a monocrystalline group III nitride semiconductor is used as the substrate, and lamination films are formed on the foundation layer by a sputtering method, with the substrate including the foundation layer and a target made from a group III metal or an alloy including a group III metal being placed in a sputtering chamber.

Abstract: A semiconductor device manufacturing method and a substrate processing apparatus are provided to reduce contaminants generating due to striping of an oxide film formed on a silicon carbide member. The manufacturing method includes: loading a substrate into a silicon carbide reaction tube; forming an oxide film on the substrate by supplying oxidizing gas into the reaction tube and causing thermal oxidation; unloading the processed substrate from the reaction tube; and in a state where the processed substrate is unloaded from the reaction tube, after increasing an inside temperature of the reaction tube until temperature of an oxide film formed on an inner wall of the reaction tube through the thermal oxidation is increased to at least a temperature corresponding to a strain point of the oxide film, decreasing the inside temperature of the reaction tube to below a temperature at which the processed substrate is unloaded from the reaction tube.

Abstract: An apparatus for depositing a solid film onto a substrate from a reagent solution includes a reservoir of reagent solution maintained at a sufficiently low temperature to inhibit homogeneous reactions within the reagent solution. The reagent solution contains multiple ligands to further control temperature stability and shelf life. The chilled solution is dispensed through a showerhead onto a substrate. The substrate is positioned in a holder that has a raised structure peripheral to the substrate to retain or impound a controlled volume (or depth) of reagent solution over the exposed surface of the substrate. The reagent solution is periodically or continuously replenished from the showerhead so that only the part of the solution directly adjacent to the substrate is heated. A heater is disposed beneath the substrate and maintains the substrate at an elevated temperature at which the deposition of a desired solid phase from the reagent solution may be initiated.

Abstract: A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, thereby forming a copper-metal cap layer. In another embodiment, a copper-metal silicide cap is provided. In this embodiment, silane is introduced before, during, or after a process gas is introduced, the process gas comprising germanium, arsenic, tungsten, or gallium. Thereafter, an optional etch stop layer may be formed, and a second dielectric layer may be formed over the etch stop layer or the first dielectric layer.

Abstract: A method of forming surface irregularities comprises preparing a GaN substrate; forming a mask on a surface of the GaN substrate, the mask defining a surface-irregularity formation region; and wet-etching portions of the surface of the GaN substrate by using the mask as an etching mask. The wet-etching of the GaN substrate is performed until the end of one surface of the GaN substrate to be formed by the wet-etching using the mask meets the end of another surface of the GaN substrate to be formed by the wet-etching using the mask, the another surface being adjacent to the one surface.

Abstract: A substrate used for fabricating devices thereon includes an insulating film, and a monocrystal Ge thin layer formed on the insulating film in contact therewith, the monocrystal Ge thin layer having a thickness not more than 6 nm. The monocrystal Ge thin layer has a thickness not less than 2 nm and a compressive strain.

Abstract: Adhesion of a porous low K film to an underlying barrier layer is improved by forming an intermediate layer lower in carbon content, and richer in silicon oxide, than the overlying porous low K film. This adhesion layer can be formed utilizing one of a number of techniques, alone or in combination. In one approach, the adhesion layer can be formed by introduction of a rich oxidizing gas such as O2/CO2/etc. to oxidize Si precursors immediately prior to deposition of the low K material. In another approach, thermally labile chemicals such as alpha-terpinene, cymene, and any other non-oxygen containing organics are removed prior to low K film deposition. In yet another approach, the hardware or processing parameters, such as the manner of introduction of the non-silicon containing component, may be modified to enable formation of an oxide interface prior to low K film deposition.

Abstract: A method and system for forming a nitrided germanium-containing layer by plasma processing. The method includes providing a germanium-containing substrate in a process chamber, generating a plasma from a process gas containing N2 and a noble gas, where the plasma conditions are selected effective to form plasma excited N2 species while controlling formation of plasma excited N species, and exposing the substrate to the plasma to form a nitrided germanium-containing layer on the substrate. A method is also provided that includes exposing a germanium-containing dielectric layer to liquid or gaseous H2O to alter the thickness and chemical composition of the layer.

Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.

Abstract: A method for depositing a Ru metal layer on a patterned substrate from a film precursor vapor delivered from a multi-tray film precursor evaporation system. The method comprises providing a patterned substrate in a process chamber of a deposition system, and forming a process gas containing Ru3(CO)12 precursor vapor and a carrier gas comprising CO gas. The process gas is formed by: providing a solid Ru3(CO)12 precursor in a plurality of spaced trays within a precursor evaporation system, wherein each tray is configured to support the solid precursor and wherein the plurality of spaced trays collectively provide a plurality of surfaces of solid precursor; heating the solid precursor in the plurality of spaced trays in the precursor evaporation system to a temperature greater than about 60° C.

Abstract: In a process involving the formation of an insulating film on a substrate for an electronic device, the insulating film is formed on the substrate surface by carrying out two or more steps for regulating the characteristic of the insulating film involved in the process under the same operation principle. The formation of an insulating film having a high level of cleanness can be realized by carrying out treatment such as cleaning, oxidation, nitriding, and a film thickness reduction while avoiding exposure to the air. Further, carrying out various steps regarding the formation of an insulating film under the same operation principle can realize simplification of the form of an apparatus and can form an insulating film having excellent property with a high efficiency.

Abstract: Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein the processing gas comprises a carrier gas, hydrogen, and one or more precursor compounds, generating a plasma of the processing gas by applying power from a dual-frequency RF source, and depositing an amorphous carbon layer on the substrate.

Abstract: A method of manufacturing a semiconductor device, includes the steps of: raising a temperature of a sapphire substrate which is included in the semiconductor device from a room temperature to a preheat temperature of 150° C. to 450° C. and keeping the preheat temperature for a first predetermined time, thereby preheating the semiconductor device; and subsequently raising a temperature of the sapphire substrate from the preheat temperature to a thermal reaction temperature of 500° C. or higher and keeping the thermal reaction temperature for a second predetermined time, thereby performing a thermal reaction treatment of the semiconductor device.

Abstract: A method of growing planar non-polar m-plane III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane silicon carbide (m-SiC) substrate, using metalorganic chemical vapor deposition (MOCVD). The method includes performing a solvent clean and acid dip of the substrate to remove oxide from the surface, annealing the substrate, growing a nucleation layer such as an aluminum nitride (AlN) on the annealed substrate, and growing the non-polar m-plane III-Nitride epitaxial layer on the nucleation layer using MOCVD.

Abstract: The present invention is related to a device comprising a substrate comprising a silicon substrate having a porous top layer, a second layer on said top layer, said second layer made of a material comprising Ge, and a further layer of a Group III-nitride material on the second layer. The present invention further is related to methods of production and to intermediate or template devices highly suitable for the epitaxial growth of a high quality Group III-nitride layer.

Abstract: A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas heated by the side sections and the heated side sections themselves quickly heat the wafer to a desired temperature. Process gas directed to the “device side” of the wafer can be kept at a temperature that will not cause deposition on that side section, but yet the desired wafer temperature can be obtained by heating non-process gas from the other side section to the desired temperature. A plurality of passages around the periphery of the wafer on the non-processed side can be employed to provide purge gas flow that prevents process gas from reaching the non-processed side of the wafer and the adjacent area of that side section.

Abstract: Methods for preparing a surface for selective silicon-germanium epitaxy by forming a thin silicon (Si) buffer layer or a thin, low concentration SiGe buffer layer for uniform nucleation, are disclosed.

Abstract: A method for fabricating a plurality of semiconductor bodies, in particular based on nitride compound semiconductor material. The method includes forming a mask layer (3) over a substrate (1) or over an initial layer (2), which mask layer has a plurality of windows (4) leading to the substrate (1) or to the initial layer (2), etching back the substrate (1) or the initial layer (2) in the windows (4), in such a manner that pits (41) are formed in the substrate (1) or in the initial layer (2) starting from these windows.

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract: Methods for fabricating multi-layer semiconductor structures including strained material layers using a minimum number of process tools and under conditions optimized for each layer. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Abstract: A method is disclosed for depositing a dielectric film on a substrate having a plurality of gaps formed between adjacent raised surfaces disposed in a high density plasma substrate processing chamber substrate. In one embodiment the method comprises flowing a process gas comprising a germanium source, a silicon source and an oxidizing agent into the substrate processing chamber; forming a high density plasma that has simultaneous deposition and sputtering components from the process gas to deposit a dielectric film comprising silicon, germanium and oxygen; and during the step of forming a high density plasma, maintaining a pressure within the substrate processing chamber of less than 100 mTorr while allowing the dielectric film to be heated above its glass transition temperature.

Abstract: A method is provided for forming a Si and Si—Ge thin films. The method comprises: providing a low temperature substrate material of plastic or glass; supplying an atmosphere; performing a high-density (HD) plasma process, such as an HD PECVD process using an inductively coupled plasma (ICP) source; maintaining a substrate temperature of 400 degrees C., or less; and, forming a semiconductor layer overlying the substrate that is made from Si or Si-germanium. The HD PECVD process is capable of depositing Si at a rate of greater than 100 ? per minute. The substrate temperature can be as low as 50 degrees C. Microcrystalline Si, a-Si, or a polycrystalline Si layer can be formed over the substrate. Further, the deposited Si can be either intrinsic or doped. Typically, the supplied atmosphere includes Si and H. For example, an atmosphere can be supplied including SiH4 and H2, or comprising H2 and Silane with H2/Silane ratio in the range of 0–100.

Abstract: This invention is generally related to a method of making a molecule-surface interface comprising at least one surface comprising at least one material and at least one organic group wherein the organic group is adjoined to the surface and the method comprises contacting at least one organic group precursor with at least one surface wherein the organic group precursor is capable of reacting with the surface in a manner sufficient to adjoin the organic group and the surface.

Abstract: A method for in situ formation of low defect, strained silicon and a device formed according to the method are disclosed. In one embodiment, a silicon germanium layer is formed on a substrate, and a portion of the silicon germanium layer is removed to expose a surface that is smoothed with a smoothing agent. A layer of strained silicon is formed on the silicon germanium layer. In various embodiments, the entire method is conducted in a single processing chamber, which is kept under vacuum.

Abstract: A method of thermally treating a substrate that has multiple layers is provided. A substrate layer that is covered on opposite sides is oxidized from side edges thereof toward a center thereof such that, via the following steps, a defined central portion is not oxidized. The substrate is heated in a process chamber to a prescribed treatment temperature. A hydrogen-rich water vapor is introduced into the process chamber for a specified period of time, wherein such introduction is effected prior to, during and/or after the step of heating the substrate to the prescribed temperature. After conclusion of the specified period of time, introduced into the process chamber is one of the group consisting of: dry oxygen, namely pure oxygen in the form of at least one of atomic O, molecular O2 and O3; a mixture of oxygen and an inert gas that does not chemically react with the layers of the substrate; an oxygen-containing compound that contains no water; and an oxygen-rich water vapor.

Abstract: A method of manufacturing a semiconductor device including a gallium nitride related semiconductor. The method include preparing a substrate having surface of a gallium nitride related semiconductor; contacting the surface with atomic nitrogen, which is obtained by decomposing a nitrogen-containing gas in a catalytic reaction, to nitride the surface; and forming, on the surface, a gate electrode and source and drain electrodes opposing each other across the gate electrode.

Abstract: A method for preparing a semiconductor substrate surface (28) for semiconductor device fabrication, includes providing a semiconductor substrate (20) having a pure Ge surface layer (28) or a Ge-containing surface layer (12), such as SiGe. The semiconductor substrate (20) is cleaned using a first oxygen plasma process (14) to remove foreign matter (30) from the surface (28) of the substrate (20). The substrate surface (28) is next immersed in a hydrochloric acid solution (16) to remove additional foreign matter (30) from the surface (28) of the substrate (20). The immersion step is followed by a second oxygen plasma etch process (18), passivate the surface with a passivation layer (34), and provide for an atomically smooth surface for subsequent epitaxial or gate dielectric growth.

Abstract: A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-based material. Second, the nitrogen incorporation is followed by an oxidation step. The method yields excellent thickness control of high quality gate dielectrics for Ge-based field effect devices, such as MOS transistors. Structures of devices having the thin germanium oxynitride gate dielectric and processors made with such devices are disclosed, as well.

Abstract: Disclosed is a method of fabricating nitride semiconductors in a MOCVD reactor. GaN is first deposited on an inner wall of the MOCVD reactor, and a sapphire substrate is loaded into the MOCVD reactor. The sapphire substrate is heated and etching gas is injected into the MOCVD reactor. NH3 gas is injected into the MOCVD reactor to nitrify the surface of the sapphire substrate. A nitride semiconductor layer is grown on the nitrified sapphire substrate. By surface-reforming the sapphire substrate and then growing the nitride semiconductor layer on the surface-reformed sapphire substrate via MOCVD without formation of a low temperature buffer layer, an excellent nitride semiconductor structure can be realized. In this circumstance, the nitride semiconductor layer for example of GaN can be grown effectively on the surface-treated sapphire substrate because GaN deposition occurs on the sapphire substrate while it is etched.

Abstract: The invention concerns a method of preparing the surface of a semiconductor wafer intended for microelectronics and/or optoelectronics applications. In particular, a method of preparing a SiC surface of a semiconductor wafer to make it epiready is described. The technique includes annealing the wafer in an oxidizing atmosphere, and polishing a surface of the wafer with an abrasive based on particles of colloidal silica to make the SiC wafer surface suitable for homoepitaxy or heteroepitaxy.

Abstract: Methods for fabricating multi-layer semiconductor structures including strained material layers using a minimum number of process tools and under conditions optimized for each layer. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Abstract: A method of the production of a nanoparticle dispersed composite material capable of controlling a particle size and a three dimensional arrangement of the nanoparticles is provided. The method of the production of a nanoparticle dispersed composite material of the present invention includes a step (a) of arranging a plurality of core fine particle-protein complexes having a core fine particle, which comprises an inorganic material, internally included within a protein on the top surface of a substrate, a step (b) of removing the protein, a step (c) of conducting ion implantation from the top surface of the substrate, and a step (d) of forming nanoparticles including the ion implanted by the ion implantation as a raw material, inside of the substrate.