Abstract: Generation of low work function, stable compound thin films by laser ablation. Compound thin films with low work function can be synthesized by simultaneously laser ablating silicon, for example, and thermal evaporating an alkali metal into an oxygen environment. For example, the compound thin film may be composed of Si/Cs/O. The work functions of the thin films can be varied by changing the silicon/alkali metal/oxygen ratio. Low work functions of the compound thin films deposited on silicon substrates were confirmed by ultraviolet photoelectron spectroscopy (UPS). The compound thin films are stable up to 500° C. as measured by x-ray photoelectron spectroscopy (XPS). Tests have established that for certain chemical compositions and annealing temperatures of the compound thin films, negative electron affinity (NEA) was detected. The low work function, stable compound thin films can be utilized in solar cells, field emission flat panel displays, electron guns, and cold cathode electron guns.

Abstract: A passivation process for a previously sulfided, selenided or tellurated III-V compound semiconductor surface. The concentration of undesired mid-gap surface states on a compound semiconductor surface is reduced by the formation of a near-monolayer of metal-(sulfur and/or selenium and/or tellurium)-semiconductor that is effective for long term passivation of the underlying semiconductor surface. Starting with the III-V compound semiconductor surface, any oxidation present thereon is substantially removed and the surface is then treated with sulfur, selenium or tellurium to form a near-monolayer of chalcogen-semiconductor of the surface in an oxygen-free atmosphere. This chalcogenated surface is then contacted with a solution of a metal that will form a low solubility chalcogenide to form a near-monolayer of metal-chalcogen-semiconductor.

Abstract: Reduction of surface leakage current by surface passivation of Cd1-xZnxTe and other materials using hyperthermal oxygen atoms. Surface effects are important in the performance of CdZnTe room-temperature radiation detectors used as spectrometers since the dark current is often dominated by surface leakage. A process using high-kinetic-energy, neutral oxygen atoms (˜3 eV) to treat the surface of CdZnTe detectors at or near ambient temperatures is described. Improvements in detector performance include significantly reduced leakage current which results in lower detector noise and greater energy resolution for radiation measurements of gamma- and X-rays, thereby increasing the accuracy and sensitivity of measurements of radionuclides having complex gamma-ray spectra, including special nuclear materials.

Abstract: A method for mask-free molecular or atomic patterning of surfaces of reactive solids is disclosed. A molecular-scale pattern of adsorbate molecules is used in place of the conventional macroscopic "mask". Molecules adsorb at surfaces in patterns, governed by the structure of the surface, the chemical nature of the adsorbate, and the adsorbate coverage at the surface. The surface is patterned and then marked or imprinted with the pattern by inducing localized chemical reaction between adsorbate molecules and the surface of the solid, resulting in an imprint being formed in the vicinity of the adsorbate molecules. In one aspect of the invention, photoinduced reaction of the patterned adsorbate leads to patterned photoreaction with the surface.

Abstract: A liquid phase deposition method for growing a titanium dioxide on the gallium arsenide substrate is disclosed. Wherein the solution of hexafluorotitanic acid (H.sub.2 TiF.sub.6) is added with nitric acid (HNO.sub.3) and boric acid (H.sub.3 BO.sub.3) or only added with a nitric acid. Thus a titanium dioxide film is grown on the gallium arsenide substrate which is the most important material of semiconductor. The refractive index will achieve to a value of 2.5. The growth rate can be exactly controlled by the concentration of the nitric acid. The present invention has the advantages of lower cost and low growing temperature. Not only the industrial necessity is satisfied, but also the disadvantages from other growing process having a high cost and expensive equipment is avoided. Thus, the present invention is potentially used in the process of integrated circuits, such as being used in the memory structure with a higher dielectric constant.

Abstract: There is provided a method of forming an insulating film containing fluorine therein, including the steps of dissociating a process gas containing no hydrogen molecules and atoms with plasma in a reduced pressure, and varying said pressure while said insulating film is being formed, for controlling a content of fluorine in said insulating film. For instance, the pressure is first set low, then raised, and then lowered in the second step. The insulating film containing fluorine therein may be an amorphous carbon fluoride film or a silicon dioxide film containing fluorine therein. In accordance with the above-mentioned method, it is possible to form a fluorine-added insulating film in which hydrofluoric acid, a product causing many problems, is not generated, by using material containing no hydride.

Abstract: A process for thermal oxidation of a semiconductor substrate comprising exposing the substrate to a chlorine plasma, and then heating the substrate in an oxidizing ambient. The substrate may comprise silicon, germanium, or a combination thereof. The heating step may further comprise heating at a temperature of between about 750.degree. C. and about 850.degree. C.

Abstract: In the manufacture of semiconductor components, a SiC single crystal is exposed, during storage or transport between two process steps, to an oxygen-containing gas atmosphere, for example air. In order to prevent an oxide coating from forming on the SiC surface of the SiC single crystal, a carbon coating which does not react chemically with oxygen, preferably a graphite coating, is produced on said SiC surface.

Abstract: A method of fabricating an oxidation barrier for a thin film is provided. The method may include forming a thin film (10) outwardly from a semiconductor substrate (12) and separated from the semiconductor substrate (12) by a primary insulator layer (14). A reactive layer (16) may be formed in-situ adjacent to the thin film (10). An oxidation barrier (20) may be formed by a chemical reaction between the thin film (10) and the reactive layer (16). The oxidation barrier (20) may comprise a silicide alloy that operates to reduce oxidation of the thin film (10).

Abstract: A production process for protecting the surface of compound semiconductor wafers includes providing a multi-wafer epitaxial production system with a transfer and load module, a III-V growth chamber and an insulator chamber. The wafer is placed in the transfer and load module and the pressure is reduced to .ltoreq.10.sup.-10 Torr, after which the wafer is moved to the III-V growth chamber and layers of compound semiconductor material are epitaxially grown on the surface of the wafer.

Abstract: A method is provided for forming an oxide film on a III-V substrate. The method includes steps of (a) preparing an acidic solution containing a IIIA-ion, (b) adding an basic solution into the acidic solution to provide a growth solution of a specific pH value, and (c) placing the III-V substrate into the growth solution to form the oxide film on the III-V substrate.

Abstract: It has been found that a Ga-oxide-containing layer is substantially not etched in HF solution if the layer is a Ga-Gd-oxide with Gd:Ga atomic ratio of more than about 1:7.5, preferably more than 1:4 or even 1:2. This facilitates removal of a protective dielectric (typically SiO.sub.2) layer after an ohmic contact anneal, with the Ga-Gd-oxide gate oxide layer serving as etch stop and not being adversely affected by contact with the HF etchant. Gd-Ge-oxide also exhibits a composition-dependent etch rate in HCl:H.sub.2 O.

Abstract: A method of thermal processing a supporting structure comprised of various compound semiconductor layers having a Gd free Ga.sub.2 O.sub.3 surface layer including coating the surface layer with a dielectric or a metallic cap layer or combinations thereof, such that the low D.sub.it Ga.sub.2 O.sub.3 -compound semiconductor structure is conserved during thermal processing, e.g. during activation of ion implants of a self aligned metal-oxide-compound semiconductor gate structure. In a preferred embodiment, the semiconductor structure has a surface of GaAs, the Gd free Ga.sub.2 O.sub.3 layer has a thickness in a range of approximately 1 nm to 20 nm, and the insulating or metallic cap layer has a thickness in a range of approximately 1 nm to 500 nm.

Abstract: A method of passivating semiconductor devices including the steps of providing a semiconductor device having a surface of semiconductor material to be passivated, exposing the surface of semiconductor material to deep ultra-violet (DUV) radiation in an ambiance including oxygen so as to form a layer of oxide on the surface of semiconductor material, and forming a layer of passivation material on the layer of oxide. The DUV oxide forms a different interface with the semiconductor material which significantly improves operating characteristics of the semiconductor device.

Abstract: A method of removing an oxide mask during fabrication of semiconductor devices which includes providing a providing a III-V compound semiconductor substrate having a surface, the surface having a growth area and a masked area masked by an oxide film formed on the surface thereof. The oxide film is removed with a Trisdimethylamino group V compound.

Abstract: A process for synthesizing wide band gap materials, specifically, GaN, employs plasma-assisted and thermal nitridation with NH.sub.3 to convert GaAs to GaN. Thermal assisted nitridation with NH.sub.3 can be employed for forming layers of substantial thickness (on the order of 1 micron) of cubic and hexagonal GaN on a GaAs substrate. Plasma-assisted nitridation of NH.sub.3 results in formation of predominantly cubic GaN, a form particularly useful in optoelectronic devices. Preferably, very thin GaAs membranes are employed to permit formation thereon of GaN layers of any desired thickness without concern for critical thickness constraints. The thin membranes are preferably formed either with an epitaxial bonding technique, or by undercut etching.

Abstract: A high quality interface between a GaAs-based semiconductor and a Ga.sub.2 O.sub.3 dielectric an be formed if the semiconductor surface is caused to have less than 1% of a monolayer impurity coverage at completion of the first monolayer of the Ga.sub.2 O.sub.3 on the surface. This is achieved, for instance, by preparing the surface of a GaAs wafer under UHV conditions in a first growth chamber, transferring the wafer through a transfer module under UHV to a second growth chamber that is also under UHV, and growing the dielectric by evaporation of Ga.sub.2 O.sub.3 from a solid source, the process carried out such that the integrated impurity exposure of the surface is at most 100 Langmuirs. Articles according to the invention have low interface state density (<10.sup.11 /cm.sup.2 .multidot.eV) and interface recombination velocity (<10.sup.4 cm/s). Semiconductor/Ga.sub.2 O.sub.3 structures according to the invention can be used advantageously in a variety of electronic or optoelectronic devices, e.g.

Abstract: A method of obtaining high quality passivation layers on silicon carbide surfaces by oxidizing a sacrificial layer of a silicon-containing material on a silicon carbide portion of a device structure to substantially consume the sacrificial layer to produce an oxide passivation layer on the silicon carbide portion that is substantially free of dopants that would otherwise degrade the electrical integrity of the oxide layer.

Abstract: A technique for manufacturing a semiconductor device includes the steps of preparing a stepped substrate made of a group III-V compound semiconductor and having a flat surface exposing a (1 0 0) plane and a slanted surface exposing an (n 1 1)B plane, wherein is a real number of about 1.ltoreq.n, and epitaxially growing the group III-V compounds semiconductor to form an epitaxial layer on the surface of the stepped substrate while doping p- and n-type impurities, selectively at the same time or, alternatively, under conditions such that the grown epitaxial layer has an n-type region on the slanted surface and a p-type region on the flat surface.