Subsequent Heating Modifying Organic Coating Composition Patents (Class 438/781)
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Patent number: 8298965Abstract: Disclosed herein are precursors and methods for their use in the manufacture of semiconductor, photovoltaic, TFT-LCD, or flat panel type devices.Type: GrantFiled: September 3, 2009Date of Patent: October 30, 2012Assignee: American Air Liquide, Inc.Inventors: James J. F. McAndrew, Francois Doniat
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Patent number: 8293658Abstract: Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.Type: GrantFiled: February 17, 2010Date of Patent: October 23, 2012Assignee: ASM America, Inc.Inventors: Eric Shero, Mohith Verghese, Anthony Muscat, Shawn Miller
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Patent number: 8288252Abstract: There is provided a damage recovery method capable of recovering electrical characteristics of a low dielectric insulating film sufficiently while suppressing oxidation of buried metal and generation of pattern defaults. A damaged functional group generated in a surface of the low dielectric insulating film by a processing is substituted with a hydrophobic functional group (ST. 2). A damaged component present under a dense layer generated in the surface of the low dielectric insulating film by the substitution process is recovered by using an ultraviolet heating process (ST. 3).Type: GrantFiled: August 9, 2011Date of Patent: October 16, 2012Assignee: Tokyo Electron LimitedInventors: Ryuichi Asako, Yusuke Ohsawa
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Patent number: 8283199Abstract: Embodiments of the present invention generally provide methods for forming conductive structures on the surfaces of a solar cell. In one embodiment, conductive structures are formed on the front surface of a solar cell by depositing a sacrificial polymer layer, forming patterned lines in the sacrificial polymer via a fluid jet, depositing metal layers over the front surface of the solar cell, and performing lift off of the metal layers deposited over the sacrificial polymer by dissolving the sacrificial polymer with a water based solvent.Type: GrantFiled: November 24, 2009Date of Patent: October 9, 2012Assignee: Applied Materials, Inc.Inventors: Virendra V. S. Rana, Chris Eberspacher, Karl J. Armstrong, Nety M. Krishna
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Publication number: 20120252218Abstract: A biphenyl derivative having formula (1) is provided wherein Ar1 and Ar2 denote a benzene or naphthalene ring, and x and z each are 0 or 1. A material comprising the biphenyl derivative or a polymer comprising recurring units of the biphenyl derivative is spin coated and heat treated to form a resist bottom layer having improved properties, optimum values of n and k, step coverage, etch resistance, heat resistance, solvent resistance, and minimized outgassing.Type: ApplicationFiled: March 20, 2012Publication date: October 4, 2012Applicant: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Daisuke Kori, Takeshi Kinsho, Katsuya Takemura, Tsutomu Ogihara, Takeru Watanabe, Hiroyuki Urano
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Publication number: 20120231635Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.Type: ApplicationFiled: May 18, 2012Publication date: September 13, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Sung Kyu MIN, Ja Chun KU, Sang Tae AHN, Chai O CHUNG, Hyeon Ju AN, Hyo Seok LEE, Eun Jeong KIM, Chan Bae KIM
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Publication number: 20120231396Abstract: There is provided that a method for producing a resin pattern, and the method includes at least the steps (1) to (7) in this order; (1) a coating step of coating a photosensitive resin composition on a substrate; (2) a solvent removal step of removing the solvent from the applied photosensitive resin composition; (3) an exposure step of patternwise exposing the photosensitive resin composition from which the solvent has been removed, to an active radiation; (4) a development step of developing the exposed photosensitive resin composition using an aqueous developer liquid; (5) an overcoating step of providing an overcoat layer on the developed photosensitive resin composition; (6) a heat-treating step of heat-treating the photosensitive resin composition on which the overcoat layer has been provided; and (7) a removal step of removing the overcoat layer.Type: ApplicationFiled: March 9, 2012Publication date: September 13, 2012Applicant: FUJIFILM CORPORATIONInventors: Takeshi ANDOU, Junichi FUJIMORI, Hiroyuki YONEZAWA, Yasumasa KAWABE, Hideyuki NAKAMURA
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Publication number: 20120231634Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.Type: ApplicationFiled: May 18, 2012Publication date: September 13, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Sung Kyu MIN, Ja Chun KU, Sang Tae AHN, Chai O CHUNG, Hyeon Ju AN, Hyo Seok LEE, Eun Jeong KIM, Chan Bae KIM
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Patent number: 8252697Abstract: Methods of forming transparent zinc-tin oxide structures are described. Devices that include transparent zinc-tin oxide structures as at least one of a channel layer in a transistor or a transparent film disposed over an electrical device that is at a substrate.Type: GrantFiled: May 14, 2007Date of Patent: August 28, 2012Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 8242031Abstract: A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.Type: GrantFiled: September 27, 2010Date of Patent: August 14, 2012Assignee: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Ellie Yieh
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Patent number: 8241946Abstract: The present invention provides a method of forming a semiconducting device comprising an organic semiconducting material, which method comprises: heating a composition comprising the organic semiconducting material to a temperature at or above the melting point or glass transition temperature of the composition to form a melt; cooling the melt to a temperature below the melting point or glass transition temperature of the composition; and wherein a first substance or object capable of inhibiting and/or preventing dewetting is adjacent the composition before or during heating, or the composition further comprises an agent capable of inhibiting and/or preventing dewetting.Type: GrantFiled: April 22, 2005Date of Patent: August 14, 2012Assignee: Creator Technology B.V.Inventors: Sepas Setayesh, Dagobert M. de Leeuw, Natalie Stutzmann-Stingelin
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Patent number: 8232204Abstract: Embodiments of the present invention provide a method of forming borderless contact for transistor. The method may include forming a gate of a transistor, on top of a substrate, and spacers adjacent to sidewalls of the gate; forming a sacrificial layer surrounding the gate; causing the sacrificial layer to expand in height to become higher than the gate, the expanded sacrificial layer covering at most a portion of a top surface of the spacers and thereby leaving an opening on top of the gate surrounded by the spacers; filling the opening with a dielectric cap layer; replacing the expanded sacrificial layer with a dielectric layer; and forming a conductive stud contacting source/drain of the transistor, the conductive stud being isolated from the gate by the dielectric cap layer.Type: GrantFiled: June 29, 2011Date of Patent: July 31, 2012Assignee: International Business Machines CorporationInventors: David V. Horak, Charles W. Koburger, III, Steven J. Holmes, Shom Ponoth, Chih-Chao Yang
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Patent number: 8232216Abstract: Provided are a semiconductor manufacturing apparatus and method, capable of reliably and rapidly transporting a heated semiconductor wafer. the apparatus is provided for transporting a semiconductor wafer, which has been processed by desired treatment (for example, film formation) and is held by a susceptor equipped with a heater, to the outside by a transport arm which holds the semiconductor wafer by suction, by moving the susceptor to a certain position above a top of a wafer waiting stage and introducing the semiconductor wafer held by the susceptor onto the top of the wafer waiting stage. Then, the susceptor present on the top of the wafer waiting stage is moved in a horizontal direction. After a certain cooling time, the transport arm holds the semiconductor wafer placed on the wafer waiting stage by suction and transports the semiconductor wafer to outside.Type: GrantFiled: June 8, 2010Date of Patent: July 31, 2012Assignee: Oki Semiconductor Co., Ltd.Inventors: Hiroyuki Baba, Tomoyasu Kai
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Publication number: 20120187422Abstract: A semiconductor substrate that includes a semiconductor layer that exhibits high crystallinity includes a graphite layer formed of a heterocyclic polymer obtained by condensing an aromatic tetracarboxylic acid and an aromatic tetramine, and a semiconductor layer that is grown on the surface of the graphite layer, or includes a substrate that includes a graphite layer formed of a heterocyclic polymer obtained by condensing an aromatic tetracarboxylic acid and an aromatic tetramine on its surface, a buffer layer that is grown on the surface of the graphite layer, and a semiconductor layer that is grown on the surface of the buffer layer.Type: ApplicationFiled: September 7, 2010Publication date: July 26, 2012Applicants: TOKAI CARBON CO., LTD., THE UNIVERSITY OF TOKYOInventors: Hiroshi Fujioka, Tetsuro Hirasaki, Hitoshi Ue, Junya Yamashita, Hiroaki Hatori
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Patent number: 8227028Abstract: A method of forming on a substrate an amorphous silica-based coating film having a low dielectric constant of 3.0 or below and a film strength (Young's modulus) of 3.0 GPa or more, which comprises, as a typical one, the steps of; (a) coating on the substrate a liquid composition containing hydrolysate of an organic silicon compound or compounds hydrolyzed in the presence of tetraalkylammonium hydroxide (TAAOH); (b) setting the substrate in a chamber and then drying a coating film formed on the substrate at a temperature in the range from 25 to 340° C.; (c) heating the coating film at a temperature in the range from 105 to 450° C. with introduction of a superheated steam having such a temperature into the chamber, and (d) curing the coating film at a temperature in the range from 350 to 450° C. with introduction of a nitrogen gas into the chamber.Type: GrantFiled: July 11, 2007Date of Patent: July 24, 2012Assignee: JGC Catalysts and Chemicals Ltd.Inventors: Miki Egami, Akira Nakashima, Michio Komatsu
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Patent number: 8222096Abstract: A method for forming an organic semiconductor thin film includes the steps of forming a mixed ink layer on a principal plane of a printing plate, the mixed ink layer including a mixture of an organic semiconductor material incapable of transcription and an organic material capable of transcription from the printing plate to a substrate in ink form dissolved in a solvent, and forming an organic semiconductor thin film by transcribing the mixed ink layer onto the substrate by transcribing the mixed ink layer on the printing plate to the substrate.Type: GrantFiled: July 23, 2009Date of Patent: July 17, 2012Assignee: Sony CorporationInventor: Akihiro Nomoto
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Patent number: 8206788Abstract: In the manufacture of electronic devices that use porous dielectric materials, the properties of the dielectric in a pristine state can be altered by various processing steps. In a method for restoring and preserving the pristine properties of a porous dielectric layer, a substrate is provided with a layer of processed porous dielectric on top, whereby the processed porous dielectric is at least partially exposed. A thin aqueous film is formed at least on the exposed parts of the processed porous dielectric. The exposed porous dielectric with the aqueous film is exposed to an ambient containing a mixture comprising at least one silylation agent and dense CO2, resulting in the restoration and preservation of the pristine properties of the porous dielectric.Type: GrantFiled: July 3, 2007Date of Patent: June 26, 2012Assignee: IMECInventors: Fabrice Sinapi, Jan Alfons B. Van Hoeymissen
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Patent number: 8207059Abstract: A layer of a porous insulating film precursor is formed on or over a substrate, a layer of a specific silicon compound is then formed, this silicon compound layer is pre-cured as necessary, and the porous insulating film precursor is exposed to UV through the silicon compound layer or pre-cured layer.Type: GrantFiled: August 4, 2008Date of Patent: June 26, 2012Assignee: Fujitsu LimitedInventors: Shirou Ozaki, Yoshihiro Nakata, Ei Yano
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Publication number: 20120156893Abstract: The present invention provides a method for forming a siliceous film. According to the method, a siliceous film having a hydrophilic surface can be formed from a polysilazane compound at a low temperature. In the method, a composition containing a polysilazane compound and a silica-conversion reaction accelerator is applied on a substrate surface to form a polysilazane film, and then a polysilazane film-treatment solution is applied thereon so that the polysilazane compound can be converted into a siliceous film at 300° C. or less. The polysilazane film-treatment solution contains a solvent, hydrogen peroxide and an alcohol.Type: ApplicationFiled: September 2, 2010Publication date: June 21, 2012Inventors: Yuki Ozaki, Masanobu Hayashi
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Patent number: 8202805Abstract: A method for processing a substrate including a processing target layer and an organic film, include: a deposition/trimming process of forming a reinforcement film on a surface of the organic film and, at the same time, trimming a line width of a line portion of the organic film constituting an opening pattern. The deposition/trimming process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto the surface of the organic film and an oxidation process in which the line width of the organic film is trimmed while the adsorbed silicon-containing gas is converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.Type: GrantFiled: March 9, 2010Date of Patent: June 19, 2012Assignee: Tokyo Electron LimitedInventors: Masato Kushibiki, Eiichi Nishimura
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Patent number: 8202807Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.Type: GrantFiled: December 27, 2007Date of Patent: June 19, 2012Assignee: Hynix Semiconductor Inc.Inventors: Sung Kyu Min, Ja Chun Ku, Chan Bae Kim, Sang Tae Ahn, Chai O Chung, Hyeon Ju An, Hyo Seok Lee, Eun Jeong Kim
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Publication number: 20120142195Abstract: There is provided a resist underlayer film having both heat resistance and etching selectivity. A composition for forming a resist underlayer film for lithography, comprising a reaction product (C) of an alicyclic epoxy polymer (A) with a condensed-ring aromatic carboxylic acid and monocyclic aromatic carboxylic acid (B). The alicyclic epoxy polymer (A) may include a repeating structural unit of Formula (1): (T is a repeating unit structure containing an alicyclic ring in the polymer main chain; and E is an epoxy group or an organic group containing an epoxy group). The condensed-ring aromatic carboxylic acid and monocyclic aromatic carboxylic acid (B) may include a condensed-ring aromatic carboxylic acid (B1) and a monocyclic aromatic carboxylic acid (B2) in a molar ratio of B1:B2=3:7 to 7:3. The condensed-ring aromatic carboxylic acid (B1) may be 9-anthracenecarboxylic acid and the monocyclic aromatic carboxylic acid (B2) may be benzoic acid.Type: ApplicationFiled: August 11, 2010Publication date: June 7, 2012Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Tetsuya Shinjo, Hirokazu Nishimaki, Yasushi Sakaida, Keisuke Hashimoto
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Publication number: 20120142515Abstract: An electronic device, such as a thin-film transistor, includes a substrate and a dielectric layer formed from a dielectric composition. The dielectric composition includes a dielectric material, a crosslinking agent, and a thermal acid generator. In particular embodiments, the dielectric material comprises a lower-k dielectric material and a higher-k dielectric material. When deposited, the lower-k dielectric material and the higher-k dielectric material form separate phases. The thermal acid generator allows the dielectric layer to be cured at relatively lower temperatures and/or shorter time periods, permitting the selection of lower-cost substrate materials that would otherwise be deformed by the curing of the dielectric layer.Type: ApplicationFiled: December 1, 2010Publication date: June 7, 2012Applicant: XEROX CORPORATIONInventors: Yiliang Wu, Ping Liu, Anthony James Wigglesworth, Nan-Xing Hu
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Patent number: 8188577Abstract: The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. The present invention further provides an exposure apparatus preferably used in such a production method.Type: GrantFiled: July 14, 2008Date of Patent: May 29, 2012Assignee: Sharp Kabushiki KaishaInventors: Seiichi Uchida, Hiroyuki Ogawa
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Publication number: 20120115333Abstract: A polybenzoxazole precursor is represented by the following formula (1): wherein R1a to R4a, R1b to R4b, X1, Y1 and m are defined in the specification.Type: ApplicationFiled: January 18, 2012Publication date: May 10, 2012Applicant: FUJIFILM CORPORATIONInventors: Kenichiro SATO, Tsukasa YAMANAKA
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Patent number: 8168449Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) includes forming a mask over a magnetic layer; forming a template on the mask; applying a diblock copolymer to the template; curing the diblock copolymer to form a first plurality of uniform shapes registered to the template; etching the mask to form a second plurality of uniform shapes; and etching the magnetic layer to form a third plurality of uniform shapes, the third plurality of uniform shapes comprising a plurality of magnetic tunnel junctions (MTJs). A diblock copolymer mask for fabricating a magnetoresistive random access memory (MRAM) includes a magnetic layer; a mask formed on the magnetic layer; a template formed on the mask; and a diblock copolymer mask comprising a plurality of uniform shapes formed on and registered to the template.Type: GrantFiled: November 4, 2009Date of Patent: May 1, 2012Assignee: International Business Machines CorporationInventor: Michael C. Gaidis
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Patent number: 8163659Abstract: In method and apparatus for oxide film formation, light in an ultraviolet light range is irradiated on a substrate, a starting gas of an organosilicon and an ozone gas are supplied to the substrate to form an oxide film on a surface of the substrate, and the ozone gas is mixed with the starting gas at room temperature and a mixture quantity of the ozone gas with the starting gas is set to be equal to a chemical equivalent or more necessary for totally oxidizing the starting gas.Type: GrantFiled: August 22, 2007Date of Patent: April 24, 2012Assignees: Meidensha Corporation, National Institute of Advanced Industrial Science and TechnologyInventors: Tetsuya Nishiguchi, Naoto Kameda, Shigeru Saitou, Hidehiko Nonaka, Shingo Ichimura
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Patent number: 8154121Abstract: Polymer interlayer dielectric and passivation materials for a microelectronic device are generally described. In one example, an apparatus includes one or more interconnect structures of a microelectronic device and one or more polymeric dielectric layers coupled with the one or more interconnect structures, the polymeric dielectric layers including copolymer backbones having a first monomeric unit and a second monomeric unit wherein the first monomeric unit has a different chemical structure than the second monomeric unit and wherein the copolymer backbones are cross-linked by a first cross-linker or a second cross-linker, or combinations thereof.Type: GrantFiled: February 26, 2008Date of Patent: April 10, 2012Assignee: Intel CorporationInventors: Kunal Shah, Michael Haverty, Sadasivan Shankar, Doug Ingerly, Grant Kloster
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Patent number: 8153353Abstract: A method and a material for creating an antireflective coating on an integrated circuit. A preferred embodiment comprises applying a dark polymer material on a reflective surface, curing the dark polymer material, and roughening a top surface of the dark polymer material. The roughening can be achieved by ashing the dark polymer material in an ash chamber. The dark polymer material, preferably a black matrix resin or a polyimide black matrix resin, when ashed in an oxygen rich atmosphere for a short period of time, forms a surface that is capable of absorbing light as well as randomly refracting light it does not absorb. A protective cap layer may be formed on top of the ashed dark polymer material to provide protection for the dark polymer material.Type: GrantFiled: October 8, 2009Date of Patent: April 10, 2012Assignee: Texas Instruments IncorporatedInventor: Jason Michael Neidrich
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Patent number: 8148229Abstract: Disclosed is a method for manufacturing a semiconductor light-receiving device having high reproducibility and reliability. Specifically disclosed is a semiconductor light-receiving device 100 with a mesa structure wherein a light-absorbing layer 6, an avalanche multiplication layer 4 and an electric-field relaxation layer 5 are formed on a semiconductor substrate 2. The light-absorbing layer 6, avalanche multiplication layer 4 and electric-field relaxation layer 5 exposed in the side wall of the mesa structure are protected by an SiNx film or an SiOyNz film. The hydrogen concentration in the side wall surface of the electric-field relaxation layer 5 is set at not more than 15%, preferably not more than 10% of the carrier concentration of the electric-field relaxation layer 5.Type: GrantFiled: July 20, 2010Date of Patent: April 3, 2012Assignee: NEC CorporationInventors: Kazuhiro Shiba, Kikuo Makita, Takeshi Nakata
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Publication number: 20120077345Abstract: There is provided a resist underlayer film having heat resistance that is used for a lithography process in the production of semiconductor devices, and a high refractive index film having transparency that is used for an electronic device. A polymer comprising a unit structure of Formula (1): wherein each of R1, R2, R3, and R5 may be a hydrogen atom, R4 may be phenyl group or naphthyl group. A resist underlayer film forming composition comprising the polymer, and a resist underlayer film formed from the composition. A high refractive index film forming composition comprising the polymer, and a high refractive index film formed from the composition.Type: ApplicationFiled: June 16, 2010Publication date: March 29, 2012Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Daigo Saito, Hiroaki Okuyama, Hideki Musashi, Tetsuya Shinjo, Keisuke Hashimoto
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Patent number: 8143128Abstract: A method forms a first inorganic dielectric layer having a first concentration of defects and a second inorganic dielectric layer in contact with a first layer and having a second lesser concentration of defects.Type: GrantFiled: July 9, 2010Date of Patent: March 27, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Gregory S. Herman, Peter Mardilovich, Randy L. Hoffman, Laura Lynn Kramer, Kurt M. Ulmer
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Patent number: 8143091Abstract: A method realizes a thin film organic electronic device integrated on a substrate and includes an organic material layer and an organic thin film transistor or OTFT transistor. The method comprises: depositing the organic material layer on the substrate, the organic material layer being a conductive organic polymer; patterning by a soft-lithographic procedure the organic material layer to create a reduced portion in order to make a channel area of the OTFT transistor; masking the organic material layer by covering with a cover mask a source area and a drain area of the OTFT transistor; irradiating by ultraviolet radiation to deactivate exposed portions of the organic material layer defining the source area, the drain area and the channel area; depositing on the organic material layer a semiconductor layer; and creating on the semiconductor layer a gate area of the OTFT transistor.Type: GrantFiled: November 24, 2009Date of Patent: March 27, 2012Assignee: STMicroelectronics S.r.l.Inventors: Giovanna Salzillo, Maria Grazia Maglione, Anna Morra, Luigi Occhipinti
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Patent number: 8143173Abstract: A method for manufacturing a semiconductor device includes: (a) forming a stress relaxation layer on a first surface having an electrode of a semiconductor substrate; (b) forming a wiring line so as to cover the electrode and the stress relaxation layer after step (a); (c) forming a solder resist layer on the wiring line after step (b); and (d) forming a protective layer on a second surface opposite to the first surface of the semiconductor substrate after step (c).Type: GrantFiled: November 20, 2007Date of Patent: March 27, 2012Assignee: Seiko Epson CorporationInventor: Yasunori Kurosawa
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Patent number: 8138102Abstract: A method of placing a functionalized semiconducting nanostructure, includes functionalizing a semiconducting nanostructure including one of a nanowire and a nanocrystal, with an organic functionality including a functional group for bonding to a bonding surface, dispersing the functionalized semiconducting nanostructure in a solvent to form a dispersion, and depositing the dispersion onto the bonding surface.Type: GrantFiled: August 21, 2008Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Ali Afzali-Ardakani, Supratik Guha, Cherie R. Kagan, George S. Tulevski, Emanuel Tutuc
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Patent number: 8133821Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.Type: GrantFiled: November 18, 2009Date of Patent: March 13, 2012Assignee: Renesas Electronics CorporationInventors: Fuminori Ito, Yoshihiro Hayashi
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Patent number: 8124239Abstract: The silica film forming material of the present invention comprises a silicone polymer which comprises, as part of its structure, CHx, an Si—O—Si bond, an Si—CH3 bond and an Si—CHx- bond, where x represents an integer of 0 to 2.Type: GrantFiled: December 17, 2009Date of Patent: February 28, 2012Assignee: Fujitsu LimitedInventors: Yoshihiro Nakata, Ei Yano
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Patent number: 8124545Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.Type: GrantFiled: May 11, 2010Date of Patent: February 28, 2012Assignee: Micron Technology, Inc.Inventors: Niraj B. Rana, Kevin R. Shea, Janos Fucsko
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Patent number: 8123997Abstract: The present invention provides a process for preparing a melt-processed organic-inorganic hybrid material including the steps of maintaining a solid organic-inorganic hybrid material at a temperature above the melting point but below the decomposition temperature of the organic-inorganic hybrid material for a period of time sufficient to form a uniform melt and thereafter, cooling the uniform melt to an ambient temperature under conditions sufficient to produce the melt-processed organic-inorganic hybrid material.Type: GrantFiled: July 3, 2008Date of Patent: February 28, 2012Assignee: International Business Machines CorporationInventors: Patrick W DeHaven, David R Medeiros, David B Mitzi
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Patent number: 8119533Abstract: Provided is a semiconductor device. The device includes a substrate having a photo acid generator (PAG) layer on the substrate. The PAG layer is exposed to radiation. A photoresist layer is formed on the exposed PAG layer. The exposed PAG layer generates an acid. The acid decomposes a portion of the formed photoresist layer. In one embodiment, the PAG layer includes organic BARC. The decomposed portion of the photoresist layer may be used as a masking element.Type: GrantFiled: December 31, 2009Date of Patent: February 21, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: George Liu, Kuei Shun Chen, Vencent Chang, Shang-Wen Chang
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Patent number: 8119542Abstract: The present invention essentially relates to a method of preparing an electrically insulating film at the surface of an electrical conductor or semiconductor substrate, such as a silicon substrate. According to the invention, this method comprises: a) bringing said surface into contact with a liquid solution comprising: a protic solvent; at least one diazonium salt; at least one monomer that is chain-polymerizable and soluble in said protic solvent; at least one acid in a sufficient quantity to stabilize said diazonium salt by adjusting the pH of said solution to a value less than 7, preferably less than 2.5; b) the polarization of said surface according to a potentio- or galvano-pulsed mode for a duration sufficient to form a film having a thickness of at least 60 nanometers, and preferably between 80 and 500 nanometers. Application: Metallization of through-vias, especially of 3D integrated circuits.Type: GrantFiled: June 30, 2009Date of Patent: February 21, 2012Assignee: AlchimerInventors: Vincent Mevellec, José Gonzalez, Dominique Suhr
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Patent number: 8119483Abstract: Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing and exposure to an ambient that contains one or both of oxygen and nitrogen. The methods may include using the polysilazane in forming a charge trapping layer of a non-volatile memory cell. The methods may alternatively, or additionally include using the polysilazane in forming intergate dielectric material of a non-volatile memory cell. Some embodiments include methods of forming memory cells of a NAND memory array.Type: GrantFiled: March 3, 2011Date of Patent: February 21, 2012Assignee: Micron Technology, Inc.Inventor: Ronald A. Weimer
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Patent number: 8114788Abstract: A method for manufacturing a semiconductor device. The method includes forming an energy cured resin layer on a semiconductor substrate having an electrode pad and a passivation film; fusing the resin layer so that fusion of a surface section is progressed more than of a central section by a first energy supply processing; forming a resin boss by curing and shrinking the resin layer by a second energy supply processing; and forming an electrical conducting layer which is electrically connected to the electrode pad and passes over the resin boss.Type: GrantFiled: February 16, 2011Date of Patent: February 14, 2012Assignee: Seiko Epson CorporationInventors: Yasuo Yamasaki, Shuichi Tanaka, Nobuaki Hashimoto
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Patent number: 8114786Abstract: Disclosed is a heat treatment unit 4 serving as a heat treatment apparatus, which includes a chamber 42 for containing a wafer W on which a low dielectric constant interlayer insulating film is formed, a formic acid supply device 44 for supplying gaseous formic acid into the chamber 42, and a heater 43 for heating the wafer W in the chamber 42 which is supplied with formic acid by the formic acid supply device 44.Type: GrantFiled: May 28, 2007Date of Patent: February 14, 2012Assignee: Tokyo Electron LimitedInventor: Hidenori Miyoshi
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Patent number: 8114787Abstract: Implementations of encapsulated nanowires are disclosed.Type: GrantFiled: February 19, 2009Date of Patent: February 14, 2012Assignee: Empire Technology Development LLCInventor: Ezekiel Kruglick
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Publication number: 20120028477Abstract: A method of fabricating a semiconductor device is provided which includes providing a substrate. A material layer is formed over the substrate. A polymer layer is formed over the material layer. A nano-sized feature is self-assembled using a portion of the polymer layer. The substrate is patterned using the nano-sized feature.Type: ApplicationFiled: October 7, 2011Publication date: February 2, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tsung-Lin Lee, Clement Hsingjen Wann, Ching-Yu Chang
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Patent number: 8101527Abstract: The present invention relates to a dicing film having an adhesive film for dicing a wafer and a die adhesive film, which are used for manufacturing a semiconductor package, and a method of manufacturing a semiconductor package using the same. More particularly, the present invention relates to a dicing film wherein a shrinkage release film is inserted between an adhesive film for dicing a wafer and a die adhesive film so that the die adhesive film and a die can be easily separated from the adhesive film for dicing a wafer when picking up a semiconductor die, and a method of manufacturing a semiconductor package using the same.Type: GrantFiled: April 12, 2010Date of Patent: January 24, 2012Assignee: LG Innotek Co. Ltd.Inventors: Joon Mo Seo, Hyuk Soo Moon, Cheol Jong Han, Jong Geol Lee, Kyung Tae Wi
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Publication number: 20110318907Abstract: There is provided a novel composition for forming a gate insulating film taking into consideration also electrical characteristics after other processes such as wiring by irradiation with an ultraviolet ray and the like during the production of an organic transistor using a gate insulating film. A composition for forming a gate insulating film for a thin-film transistor comprising: a component (i): an oligomer compound or a polymer compound containing a repeating unit having a structure in which a nitrogen atom of a triazine-trione ring is bonded to a nitrogen atom of another triazine-trione ring through a hydroxyalkylene group; and a component (ii): a compound having two or more blocked isocyanate groups in one molecule thereof.Type: ApplicationFiled: November 26, 2009Publication date: December 29, 2011Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Shinichi Maeda, Takahiro Kishioka
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Patent number: 8084372Abstract: In the present invention, a coating solution containing polysilazane is applied to a substrate to form a coating film. Thereafter, an ultraviolet ray is applied to the coating film formed on the substrate to cut a molecular bond of polysilazane in the coating film. Then, the coating film in which the molecular bond of polysilazane has been cut is oxidized while the coating film is being heated. Then, the oxidized coating film is baked at a baking temperature equal to or higher than a heating temperature when the coating film is oxidized.Type: GrantFiled: August 15, 2008Date of Patent: December 27, 2011Assignee: Tokyo Electron LimitedInventors: Gen You, Makoto Muramatsu, Hiroyuki Fujii, Shouichi Terada, Takanori Nishi
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Publication number: 20110309511Abstract: Hydrophobicity of a low dielectric constant film comprising a porous silica film is improved by applying a raw material for forming a porous silica film onto a substrate, and performing vapor-phase transport treatment to expose the substrate to an atmosphere of organic amine vapor to which no water is added. Simultaneously, reduction in a dielectric constant, reduction in leakage current, and improvement in mechanical strength are attained by controlling a pore diameter in a predetermined range.Type: ApplicationFiled: August 31, 2011Publication date: December 22, 2011Applicant: Elpida Memory, Inc.Inventors: Yoshinori CHO, Takamaro Kikkawa