Having Blooming Suppression Structure (e.g., Antiblooming Drain, Etc.) Patents (Class 438/79)
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Patent number: 10501853Abstract: Embodiments provide an etchant composition including (A) a copper ion source, (B) a source of an organic acid ion having one or more carboxyl groups in a molecule, (C) a fluoride ion source, (D) an etching controller, a surface oxidizing power enhancer or a combination thereof as a first additive, and (E) a surfactant as a second additive; a method for etching a multilayered film; and a method for preparing a display device.Type: GrantFiled: October 7, 2015Date of Patent: December 10, 2019Assignees: SAMYOUNG PURE CHEMICALS CO., LTD., MITSUBISHI GAS CHEMICAL COMPANY, INC., SAMSUNG DISPLAY CO., LTD.Inventors: Jung-Ig Jeon, Chi-Sung Ihn, Mi-Soon Lee, Hyun-Eok Shin, Joon-Woo Bae
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Patent number: 9024361Abstract: Provided is a solid-state imaging device including: a photodiode which converts an optical signal to signal charges; a transfer gate which transfers the signal charges from the photodiode; an impurity diffusion layer to which the signal charges are transferred by the transfer gate; and a MOS transistor of which a gate is connected to the impurity diffusion layer. The impurity diffusion layer has a first conduction type semiconductor layer and a second conduction type semiconductor layer which is formed in the first conduction type semiconductor layer and under an end portion of the transfer gate.Type: GrantFiled: July 19, 2010Date of Patent: May 5, 2015Assignee: Sony CorporationInventors: Hiroyuki Ohri, Yasunori Sogoh
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Patent number: 8994139Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.Type: GrantFiled: March 8, 2012Date of Patent: March 31, 2015Assignee: Semiconductor Components Industries, LLCInventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
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Patent number: 8993373Abstract: Methods of doping a solar cell, particularly a point contact solar cell, are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. At least one lithography step can be eliminated by the use of a blanket doping of species having one conductivity and a patterned counterdoping process of species having the opposite conductivity. The areas doped during the patterned implant receive a sufficient dose so as to completely reverse the effect of the blanket doping and achieve a conductivity that is opposite the blanket doping. In some embodiments, counterdoped lines are also used to reduce lateral series resistance of the majority carriers.Type: GrantFiled: May 4, 2012Date of Patent: March 31, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Nicholas Bateman, John Graff
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Patent number: 8936962Abstract: An optical modulator according to the present invention is configured at least by a semiconductor layer subjected to a doping process so as to exhibit a first conductivity type, and a semiconductor layer subjected to a doping process so as to exhibit a second conductivity type. Further, in the optical modulator, at least the first conductivity type semiconductor layer, a dielectric layer, the second conductivity type semiconductor layer, and a transparent electrode optically transparent in at least a near-infrared wavelength region are laminated in order.Type: GrantFiled: February 15, 2010Date of Patent: January 20, 2015Assignee: NEC CorporationInventors: Junichi Fujikata, Toshio Baba, Jun Ushida
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Patent number: 8927348Abstract: Provided are a method of manufacturing a group-III nitride semiconductor light-emitting device in which a light-emitting device excellent in the internal quantum efficiency and the light extraction efficiency can be obtained, a group-III nitride semiconductor light-emitting device and a lamp. Included are an epitaxial step of forming a semiconductor layer (30) so as to a main surface (20) of a substrate (2), a masking step of forming a protective film on the semiconductor layer (30), a semiconductor layer removal step of removing the protective film and the semiconductor layer (30) by laser irradiation to expose the substrate (2), a grinding step of reducing the thickness of the substrate (2), a polishing step of polishing the substrate (2), a laser processing step of providing processing marks to the inside of the substrate (2), a division step of creating a plurality of light-emitting devices (1) while forming a division surface of the substrate (2) to have a rough surface.Type: GrantFiled: May 12, 2009Date of Patent: January 6, 2015Assignee: Toyoda Gosei Co., Ltd.Inventors: Susumu Sugano, Hisayuki Miki, Hironao Shinohara
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Patent number: 8916869Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10?13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.Type: GrantFiled: January 3, 2013Date of Patent: December 23, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Shunpei Yamazaki
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Patent number: 8822255Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.Type: GrantFiled: August 30, 2010Date of Patent: September 2, 2014Assignee: Ulvac, Inc.Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
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Patent number: 8785991Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.Type: GrantFiled: May 28, 2009Date of Patent: July 22, 2014Assignee: Sony CorporationInventor: Keiji Mabuchi
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Patent number: 8717556Abstract: A microfluidic system may include an image sensor integrated circuit containing image sensor pixels. A channel containing a fluid with particles such as cells may be formed on top of the image sensor. Flow control components may be mounted to the image sensor integrated circuit for controlling the flow of fluids through the channel. The flow control components may include a chemically powered pump. The chemical pump may include one or more chambers and a valve between the chambers. The valve may be operable to allow chemical reactants stored in the chambers to be mixed to produce gasses for generating pressure in the channel. The pressure in the channel may be used to control the flow of the fluid. As the fluid and particles flow through the channel, the image sensor pixels may be used to capture images of the particles.Type: GrantFiled: May 10, 2012Date of Patent: May 6, 2014Assignee: Aptina Imaging CorporationInventor: Kenneth Edward Salsman
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Patent number: 8679891Abstract: A heterostructure containing IC and LED and a method of fabricating. An IC and an LED are established with the IC having a first electric-conduction block and a first connection block. The IC electrically connects to the first electric-conduction block. A first face of the LED has a second electric-conduction block and a second connection block. The LED is electrically connected to the second electric-conduction block. The first electric-conduction block and the first connection block are respectively joined to the second electric-conduction block and the second connection block, and the first electric-conduction block are electrically connected with the second electric-conduction block to form a heterostructure. The heterostructure provides functions of heat radiation and electric communication for IC and LED.Type: GrantFiled: September 6, 2013Date of Patent: March 25, 2014Assignee: National Chiao Tung UniversityInventors: Kuan-Neng Chen, Cheng-Ta Ko, Wei-Chung Lo
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Photoelectric conversion apparatus and manufacturing method for a photoelectric conversion apparatus
Patent number: 8570418Abstract: A photoelectric conversion apparatus (100) comprises: multiple photoelectric converting units (PD) disposed in a semiconductor substrate; (SB) and isolation portions (103,104,105,106) disposed in the semiconductor substrate.Type: GrantFiled: January 26, 2010Date of Patent: October 29, 2013Assignee: Canon Kabushiki KaishaInventor: Takanori Watanabe -
Patent number: 8546174Abstract: In a method for manufacturing a semiconductor device according to an embodiment, an epitaxial semiconductor layer is epitaxially grown on a semiconductor substrate, a photoelectric converting portion is formed on the epitaxial semiconductor layer, a wiring layer is formed on the epitaxial semiconductor layer after forming the photoelectric converting portion, a support substrate is bonded onto the wiring layer, and the semiconductor substrate is etched from an opposite surface side to a side for the bonding after the bonding. In the method for manufacturing a semiconductor device, an amorphous Si layer is formed on the opposite surface side of the epitaxial semiconductor layer after the etching and an antireflection film and a color filter are formed on the amorphous Si layer in sequence.Type: GrantFiled: January 31, 2012Date of Patent: October 1, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Tadashi Iijima
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Patent number: 8520210Abstract: Methods for increasing the amount of cenospheres in a fly ash sample are disclosed. The cenospheres are obtained in a dry state by using air as the “fluid” media for separation. In one version, the invention is a two step process, that is, screen by size followed by density separation such as in a fluidizing vertical column by density. In another version of the invention, the separation by density is followed by screening by size. Additional cycles can improve purity as defined by concentration of cenospheres.Type: GrantFiled: November 7, 2011Date of Patent: August 27, 2013Assignee: Wisconsin Electric Power CompanyInventors: Bruce W. Ramme, John J. Noegel, Pradeep K. Rohatgi
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Patent number: 8471351Abstract: Each of pixels 10 arranged in an array pattern includes a photoelectric conversion element 11, a transfer transistor 13 for transferring charges to a floating diffusion layer 12, and an amplifier transistor 14 for outputting the transferred charges to an output line. An insulating isolation part 22 isolates the adjacent photoelectric conversion elements 11, and isolates the photoelectric conversion element 11 and the amplifier transistor 14. The insulating isolation part 22 constitutes a first region A between the photoelectric conversion elements 11 where the amplifier transistor 14 is not arranged, and a second region B between the photoelectric conversion elements 11 where the amplifier transistor 14 is arranged. First and second isolation diffusion layers 23 and 24 are formed below the insulating isolation part 22, and the second isolation diffusion layer 24 is wider than the first isolation diffusion layer 23 in the first region A.Type: GrantFiled: August 4, 2011Date of Patent: June 25, 2013Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Toru Okino, Yusuke Otake, Hitomi Fujiwara
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Patent number: 8455291Abstract: A method of manufacturing a solid state imaging device having a photo-electric conversion portion array and a transfer electrode array, these arrays being provided in parallel to each other, upper surfaces and side wall surfaces of the transfer electrode array being covered with a light-shielding layer, and a transparent layer showing an oxidizing property at the time of film formation, the transparent layer being formed on the photo-electric conversion parts and the light-shielding layer.Type: GrantFiled: January 31, 2011Date of Patent: June 4, 2013Assignee: Sony CorporationInventors: Takeshi Takeda, Tadayuki Dofuku, Kenji Takeo
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Patent number: 8378391Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10?13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.Type: GrantFiled: November 3, 2010Date of Patent: February 19, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Shunpei Yamazaki
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Patent number: 8216905Abstract: The active pixel cell structures and methods of preparing such structures described above enable reduction of dark current and white cell counts for active pixel cells. The process of preparing active pixel cell structures introduces stress on the substrate, which could lead to increased dark current and white cell counts of active pixel cells. By depositing a stress layer as part of a pre-metal dielectric layer with a stress that counters the stress induced, both the dark current and the white cell counts can be reduced. If the transistors of the active pixel cells are NMOS, the carrier mobility can also be increased by a tensile stress layer. Raman Spectroscopy can be used to measure the stress exerted on the substrate prior to the deposition of the stress layer.Type: GrantFiled: April 27, 2010Date of Patent: July 10, 2012Inventors: Ru-Shang Hsiao, Nai-Wen Cheng, Chung-Te Lin, Chien-Hsien Tseng, Shou-Gwo Wuu
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Patent number: 8124440Abstract: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion unit being configured to convert incident light into an electrical signal; forming, on the semiconductor layer, a transistor of a pixel unit and a transistor of a peripheral circuit unit disposed in the periphery of the pixel unit, and then forming a wiring section on the semiconductor layer; bonding a second substrate on the wiring section; and removing the first substrate after the second substrate is bonded.Type: GrantFiled: August 31, 2009Date of Patent: February 28, 2012Assignee: Sony CorporationInventors: Tetsuya Ikuta, Yuki Miyanami
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Patent number: 8105864Abstract: Embodiments of the invention provide an image sensor that includes a barrier region for isolating devices. The image sensor comprises a substrate and an array of pixel cells formed on the substrate. Each pixel cell comprises a photo-conversion device. The array comprises a first pixel cell having a first configuration, a second pixel cell having a second configuration, and at least one barrier region formed between the first and second pixel cells for capturing and removing charge. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.Type: GrantFiled: November 17, 2006Date of Patent: January 31, 2012Assignee: Aptina Imaging CorporationInventors: Howard E. Rhodes, Richard A. Mauritzson, William T. Quinlin
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Patent number: 8084727Abstract: This device for detecting an electromagnetic radiation, comprises a matrix of juxtaposed elementary sensors (1), each associated with a common substrate in which a sequential addressing read circuit is prepared, specific to each of the sensors, thereby constituting as many pixels, the interaction of the radiation with the sensors generating electric charges to be converted to voltage for their subsequent processing, each of the said sensors being biased via an injection transistor (2), of which one of the terminals is connected to an integration capacitance (3), storing the electric charges generated by the sensor during an integration phase, and whereof the quantity of charges is then processed for conversion to voltage. Each of the pixels of the said matrix is associated with a current limiting device (5), for limiting the current generated by each of the elementary sensors to a maximum called reference current, regardless of the radiation flux received by the pixel concerned.Type: GrantFiled: August 19, 2008Date of Patent: December 27, 2011Assignee: Commissariat a l'Energie AtomiqueInventors: Jean-Pierre Rostaing, Fabrice Guellec, Michaël Tchagaspanian
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Patent number: 8003506Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.Type: GrantFiled: June 26, 2009Date of Patent: August 23, 2011Assignee: Round Rock Research, LLCInventor: Howard E. Rhodes
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Patent number: 7985691Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y?0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.Type: GrantFiled: April 23, 2010Date of Patent: July 26, 2011Assignee: Panasonic CorporationInventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
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Patent number: 7910394Abstract: A method for forming a photodiode cathode in an integrated circuit imager includes defining and implanting a photodiode cathode region with a photodiode cathode implant dose of a dopant species and defining and implanting an edge region of the photodiode cathode region with a photodiode cathode edge implant dose of a dopant species to form a region of higher impurity concentration than the photodiode cathode impurity concentration.Type: GrantFiled: April 1, 2008Date of Patent: March 22, 2011Assignee: Foveon, Inc.Inventor: Maxim Ershov
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Patent number: 7902624Abstract: Embodiments of the invention provide an image sensor that includes a barrier region for isolating devices. The image sensor comprises a substrate and an array of pixel cells formed on the substrate. Each pixel cell comprises a photo-conversion device. The array comprises a first pixel cell having a first configuration, a second pixel cell having a second configuration, and at least one barrier region formed between the first and second pixel cells for capturing and removing charge. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.Type: GrantFiled: July 19, 2005Date of Patent: March 8, 2011Assignee: Aptina Imaging CorporationInventors: Howard E. Rhodes, Richard A. Mauritzson, William T. Quinlin
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Patent number: 7879642Abstract: A sensor having photodiodes whose sensitivity and storage capacity can be increased is provided. The sensor is formed by arranging the photodiodes in an array with first region of second conductivity type is formed on the principal surface of a substrate of a first conductivity type. A pixel separating region of the first conductivity type is formed to penetrate through the first semiconductor region to separate the regions of the adjacent photodiodes. A second region of the second conductivity type used to drain excess charge is formed in substrate at a position away from the junction surface between substrate and the first region and below the junction surface.Type: GrantFiled: June 15, 2007Date of Patent: February 1, 2011Assignee: Texas Instruments IncorporatedInventors: Hidetoshi Shimada, Karuya Mori
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Patent number: 7871850Abstract: Disclosed are a light emitting device and a method for manufacturing the same. The light emitting device includes a substrate having a lead frame, a light emitting diode mounted on the substrate, a mold member formed on the substrate and the light emitting diode, and a reflecting member having an opening portion at one side thereof and being inclined at an outer portion of the mold member.Type: GrantFiled: February 1, 2007Date of Patent: January 18, 2011Assignee: LG Innotek Co., LtdInventor: Bo Geun Park
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Patent number: 7833819Abstract: Methods, systems and apparatuses for an imager that improve the quality of a captured image. The imager includes a pixel having a photosensor that generates charge in response to receiving electromagnetic radiation and a storage region that stores the generated charge. A protection region assists in keeping undesirable charge from reaching the storage region.Type: GrantFiled: July 23, 2008Date of Patent: November 16, 2010Assignee: Aptina Imaging CorporationInventors: Sergey Velichko, Hong-Wei Lee
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Patent number: 7776643Abstract: A solid state image pickup device is provided which includes: charge accumulation regions disposed in a semiconductor substrate in a matrix shape; a plurality of vertical transfer channels formed in the semiconductor substrate each in a close proximity to each column of the charge accumulation regions; vertical transfer electrodes formed above the vertical transfer channels; a channel protective impurity layer formed just under the vertical transfer channel and surrounding the charge accumulation region; one or more pixel separation impurity layers formed under the channel protective impurity layer and at a position facing the channel protective impurity layer; an overflow barrier region having a peak position of an impurity concentration at a position deeper than the pixel separation impurity layer, the peak position of the impurity concentration being at a depth of 3 ?m or deeper from a surface of the semiconductor substrate; and a horizontal CCD for transferring signal charges transferred from the verticalType: GrantFiled: June 9, 2008Date of Patent: August 17, 2010Assignee: Fujifilm CorporationInventors: Yuko Nomura, Shinji Uya
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Publication number: 20090298272Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.Type: ApplicationFiled: June 26, 2009Publication date: December 3, 2009Inventor: Howard E. Rhodes
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Patent number: 7595519Abstract: An image sensor includes a first type semiconductor layer, a second type semiconductor layer and a first type well. The first type semiconductor layer is formed on a semiconductor substrate and includes a plurality of pixels which receive external light and convert optical charges into an electrical signal. The second type semiconductor layer is supplied with a drain voltage to have a potential different from that of the first semiconductor layer, and the first type well controls a power source voltage (VDD) using the drain voltage.Type: GrantFiled: March 6, 2007Date of Patent: September 29, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Jin Lee, Yo-Han Sun, Tae-Seok Oh, Sung-Jae Joo, Bum-Suk Kim, Yun-Ho Jang, Sae-Young Kim, Keun-Chan Yuk
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Patent number: 7557024Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.Type: GrantFiled: December 28, 2004Date of Patent: July 7, 2009Assignee: Micron Technology, Inc.Inventor: Howard E. Rhodes
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Patent number: 7521113Abstract: The present invention provides a layered structure including a fullerene layer exhibiting Ohmic behavior. The layered device includes a layer of fullerenes and a layer of a fluoride compound of pre-selected thickness. The layered structure includes a third layer of an electrically conductive material located on the second layer to which electrical contact can be made. The thickness of the second layer is selected so that the layered structure exhibits substantially Ohmic contact across the first, second and third layers. The present invention also provides a light-emitting device which includes a substrate and a first electrically conductive layer defining an anode electrode layer on the substrate. The device includes an electron transport layer which includes fullerenes, and a second electrically conductive layer defining a cathode electrode layer on the electron transport layer. The device includes a layer of light-emissive material between the anode electrode layer and the electron transport layer.Type: GrantFiled: March 29, 2004Date of Patent: April 21, 2009Inventors: Zheng-Hong Lu, Xiaodong Feng
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Patent number: 7517717Abstract: A pixel cell has controlled photosensor anti-blooming leakage by having dual pinned voltage regions, one of which is used to set the anti-blooming characteristics of the photosensor. Additional exemplary embodiments also employ an anti-blooming transistor in conjunction with the dual pinned photosensor. Other exemplary embodiments provide a pixel with two pinned voltage regions and two anti-blooming transistors. Methods of fabricating the exemplary pixel cells are also disclosed.Type: GrantFiled: June 8, 2006Date of Patent: April 14, 2009Assignee: Aptina Imaging CorporationInventors: Sungkwon C. Hong, Alex Krymski
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Patent number: 7508432Abstract: An image sensor includes a plurality of pixels for converting incident photons into electrical charge; an overflow drain to draw off excess charge from at one or more of the pixels; a mechanism for summing charge from two or more of the pixels; a first network of resistive devices generating a first overflow drain voltage where at least one of the resistive devices has, in parallel, a fuse that can be opened in response to an external stimulus to provide the optimum overflow drain voltage for pixel anti-blooming protection and saturation signal level for when a plurality of pixels are summed together; and a second network of resistive devices connected to the first network of resistive devices generating a second overflow drain voltage where the second overflow drain voltage is a fraction of the first overflow drain voltage and the second overflow drain voltage provides the optimum overflow drain voltage for pixel anti-blooming and saturation signal level for when none or substantially none of the plurality oType: GrantFiled: July 19, 2006Date of Patent: March 24, 2009Assignee: Eastman Kodak CompanyInventors: Christopher Parks, John P. McCarten
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Patent number: 7449732Abstract: The substrate with electrodes is formed of a transparent material onto which is deposited a film (1) of a transparent conductive material of thickness e1 and of refractive index n1, said film being structured to form a set of electrodes (1a) whose contours (8) delimit insulating spaces (3), wherein the insulating spaces (3) are filled with a transparent dielectric material of thickness e2 and of refractive index n2 so that the respective thicknesses of the conductive material and the dielectric material are inversely proportional to the values of the refractive indices of said materials and said dielectric material forms neither depressions nor beads at the contour (8) of the electrodes. A hardcoating layer (7) may be disposed between the substrate (5) and the electrodes and a protective film (9) added. The substrate with electrodes is obtained by UV irradiation through a single mask.Type: GrantFiled: March 5, 2004Date of Patent: November 11, 2008Assignee: Asulab S.A.Inventors: Joachim Grupp, Gian-Carlo Poli, Pierre-Yves Baroni, Estelle Wagner, Patrik Hoffmann
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Publication number: 20080217659Abstract: An image sensor device includes a semiconductor substrate having a first type of conductivity, a first layer overlying the semiconductor substrate and having the first type of conductivity, a second layer overlying the first layer and having a second type of conductivity different than the first type of conductivity, and a plurality of pixels formed in the second layer.Type: ApplicationFiled: March 6, 2007Publication date: September 11, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jyh-Ming Hung, Dun-Nian Yaung
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Patent number: 7385272Abstract: An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.Type: GrantFiled: March 2, 2007Date of Patent: June 10, 2008Assignee: ESS Technology, Inc.Inventors: Zeynep Toros, Richard Mann, Selim Bencuya
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Patent number: 7338833Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.Type: GrantFiled: February 7, 2002Date of Patent: March 4, 2008Assignee: Xerox CorporationInventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
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Patent number: 7285438Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.Type: GrantFiled: January 31, 2006Date of Patent: October 23, 2007Assignee: Sony CorporationInventor: Takashi Kasuga
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Patent number: 7271836Abstract: A drain region is formed along a horizontal charge transfer channel constituting a horizontal charge transfer element, and a barrier region for charges is formed between the horizontal charge transfer channel and drain region. A two-electrode element is formed by using the horizontal charge transfer channel, barrier region and drain region. A solid state image pickup device can be manufactured with high productivity, which device can drain charges in the horizontal charge transfer element at high speed.Type: GrantFiled: November 28, 2005Date of Patent: September 18, 2007Assignee: Fujifilm CorporationInventors: Hideki Wako, Katsumi Ikeda, Tetsuo Yamada
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Patent number: 7198976Abstract: Channel stop sections are formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.Type: GrantFiled: November 11, 2003Date of Patent: April 3, 2007Assignee: Sony CorporationInventor: Kiyoshi Hirata
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Patent number: 7186583Abstract: A pixel of a semiconductor-based image detector includes a photodetector, at least one switching device serially connected to the photodetector and a bypass device interposed between the photodetector and a power supply voltage. Accordingly, even though excess charges may be generated in the photodetector, the excess charges flow into the power supply through the bypass device. Blooming can thereby be reduced or suppressed.Type: GrantFiled: February 7, 2006Date of Patent: March 6, 2007Assignee: Samsung Electronics Co., Ltd.Inventor: Seok-Ha Lee
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Patent number: 7075128Abstract: A charge transfer element comprising a reverse conductive type well formed on the surface of one conductive type semiconductor substrate, the one conductive type channel region extending in one direction relative to the well, a transfer electrode formed intersecting the channel region, a floating diffusion region formed continuous from the channel region, and an output transistor having a gate connected to the floating diffusion region. In a region where the output transistor is formed, the dopant density profile in the depth direction of the semiconductor substrate exhibits the maximum value relative to a middle region.Type: GrantFiled: February 5, 2004Date of Patent: July 11, 2006Assignee: Sanyo Electric Co., Ltd.Inventor: Yoshihiro Okada
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Patent number: 7074639Abstract: Provided is a method of fabrication of a blooming control structure for an imager. The structure is produced in a semiconductor substrate in which is configured an electrical charge collection region. The electrical charge collection region is configured to accumulate electrical charge that is photogenerated in the substrate, up to a characteristic charge collection capacity. A blooming drain region is configured in the substrate laterally spaced from the charge collection region. The blooming drain region includes an extended path of a conductivity type and level that are selected for conducting charge in excess of the characteristic charge collection capacity away from the charge collection region. A blooming barrier region is configured in the substrate to be adjacent to and laterally spacing the charge collection and blooming drain regions by a blooming barrier width. This barrier width corresponds to an acute blooming barrier impurity implantation angle with the substrate.Type: GrantFiled: December 17, 2001Date of Patent: July 11, 2006Assignee: Massachusetts Institute of TechnologyInventors: Barry E. Burke, Eugene D. Savoye
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Patent number: 7050101Abstract: A drain region is formed along a horizontal charge transfer channel constituting a horizontal charge transfer element, and a barrier region for charges is formed between the horizontal charge transfer channel and drain region. A two-electrode element is formed by using the horizontal charge transfer channel, barrier region and drain region. A solid state image pickup device can be manufactured with high productivity, which device can drain charges in the horizontal charge transfer element at high speed.Type: GrantFiled: October 23, 2001Date of Patent: May 23, 2006Assignee: Fuji Photo Film Co., Ltd.Inventors: Hideki Wako, Katsumi Ikeda, Tetsuo Yamada
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Patent number: 7026185Abstract: A pixel of a semiconductor-based image detector includes a photodetector, at least one switching device serially connected to the photodetector and a bypass device interposed between the photodetector and a power supply voltage. Accordingly, even though excess charges may be generated in the photodetector, the excess charges flow into the power supply through the bypass device. Blooming can thereby be reduced or suppressed.Type: GrantFiled: March 31, 2005Date of Patent: April 11, 2006Assignee: Samsung Electronics Co., Ltd.Inventor: Seok-Ha Lee
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Patent number: 7002626Abstract: An image sensor includes pixels formed on a semiconductor substrate. Each pixel includes a photoactive region in the semiconductor substrate, a sense node, and a power supply node. A first electrode is disposed near a surface of the semiconductor substrate. A bias signal on the first electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the sense node. A second electrode is disposed near the surface of the semiconductor substrate. A bias signal on the second electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the power supply node.Type: GrantFiled: October 26, 2001Date of Patent: February 21, 2006Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Chris Wrigley, Guang Yang, Orly Yadid-Pecht
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Patent number: 6927091Abstract: Disclosed is a method for fabricating a solid-state imaging device including a semiconductor substrate of a first conductivity type, a plurality of light-receiving sections provided at a distance in the surface region of the semiconductor substrate, and channel stop regions of a second conductivity type provided between the adjacent light-receiving sections in the surface region and in the internal region of the semiconductor substrate. The method includes the steps of forming a first photoresist layer having openings corresponding to positions at which the channel stop regions are formed; ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a first energy through the first photoresist layer as a mask; forming a second photoresist layer having openings; and ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a second energy through the second photoresist layer as a mask.Type: GrantFiled: August 19, 2002Date of Patent: August 9, 2005Assignee: Sony CorporationInventor: Kouichi Harada
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Patent number: 6869820Abstract: A high efficiency light emitting diode (LED) with metal reflector and the method of making the same is disclosed. The metal reflector is composed of at least two layers with one transparent conductive layer and the other highly reflective metal layer. The transparent conductive layer allows most of the light passing through without absorption and then reflected back by the highly reflective metal layer. The transparent conductive layer is selected from one of the materials that have very little reaction with highly reflective metal layer even in high temperature to avoid the reflectivity degradation during the chip processing. With this at least two layer metal reflector structure, the light emitting diode with vertical current injection can be fabricated with very high yield.Type: GrantFiled: January 30, 2002Date of Patent: March 22, 2005Assignee: United Epitaxy Co., Ltd.Inventor: Tzer-Perng Chen