Making Electromagnetic Responsive Array Patents (Class 438/73)
  • Patent number: 11990493
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a front surface, a back surface opposite to the front surface, and a light-sensing region close to the front surface. The image sensor device includes an insulating layer covering the back surface and extending into the semiconductor substrate. The protection layer has a first refractive index, and the first refractive index is less than a second refractive index of the semiconductor substrate and greater than a third refractive index of the insulating layer, and the protection layer conformally and continuously covers the back surface and extends into the semiconductor substrate. The image sensor device includes a reflective structure surrounded by insulating layer in the semiconductor substrate.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
  • Patent number: 11963426
    Abstract: A display device includes a sensor having a detection electrode. An optical pattern layer is disposed directly on the sensor and includes a plurality of transmission portions and a light blocking portion. A display panel is disposed on the optical pattern layer. A minimum distance between the detection electrode and the light blocking portion is in a range of 1 micrometer-5 micrometers.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae-Young Lee, Gee-Bum Kim, Byung Han Yoo, Sangwoo Kim, Jungha Son, Taekyung Ahn, Yunjong Yeo, Kijune Lee, Jaeik Lim, Min Oh Choi, Chaungi Choi
  • Patent number: 11956416
    Abstract: An image sensing device may include a plurality of test pixel blocks and a signal processing unit. The test pixel blocks may be simultaneously heated to different temperatures. The signal processing unit may be in communication with the test blocks and configured to obtain pixel signals for different colors, respectively, based on dark current information associated with the temperatures of the test pixel blocks.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: April 9, 2024
    Assignee: SK HYNIX INC.
    Inventor: Yun Hui Yang
  • Patent number: 11908878
    Abstract: An image sensor includes a pixel and an isolation structure. The pixel includes a photosensitive region and a circuitry region next to the photosensitive region. The isolation structure is located over the pixel, where the isolation structure includes a conductive grid and a dielectric structure covering a sidewall of the conductive grid, and the isolation structure includes an opening or recess overlapping the photosensitive region. The isolation structure surrounds a peripheral region of the photosensitive region.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wen-Chang Kuo, Sheng-Chau Chen, Feng-Chi Hung, Sheng-Chan Li
  • Patent number: 11895380
    Abstract: A device includes a substantially planar platform. The device also includes a detector connected to the platform. The device further includes multiple cold fingers including a first cold finger and a second cold finger. Each cold finger has an end portion connected to the platform. Each cold finger is configured to be fluidly coupled to a corresponding cryocooler. Each cold finger is configured to absorb thermal energy generated by the detector. The second cold finger has a flexure region at the end portion.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: February 6, 2024
    Assignee: Raytheon Company
    Inventors: Thomas P. Sprafke, Stephen Marinsek
  • Patent number: 11884044
    Abstract: The present invention relates to a lamination process for producing a multilayer laminate, preferably to a lamination process for producing a photovoltaic (PV) module, and to a PV module laminate.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: January 30, 2024
    Assignee: BOREALIS AG
    Inventors: Stefan Hellstrom, Francis Costa, Jeroen Oderkerk, Bert Broeders
  • Patent number: 11855118
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer, and a color filter layer. The semiconductor substrate has a photosensitive region and an isolation region surrounding the photosensitive region. The radiation sensing member is embedded in the photosensitive region of the semiconductor substrate. The radiation sensing member has a material different from a material of the semiconductor substrate, and an interface between the radiation sensing member and the isolation region of the semiconductor substrate includes a direct band gap material. The device layer is under the semiconductor substrate and the radiation sensing member. The color filter layer is over the radiation sensing member and the semiconductor substrate.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu Wei, Yen-Liang Lin, Kuo-Cheng Lee, Hsun-Ying Huang, Hsin-Chi Chen
  • Patent number: 11824480
    Abstract: A solar power plant is constructed using a reverse workflow whereby the grid connection that will ultimately feed electricity to the grid is constructed before the array so that one or more transformers and portable charging stations may be deployed onsite to transform grid power so that it can recharge electrically powered heavy equipment including solar pile drivers, truss drivers, and telehandlers as well as electrically powered hand tools such as cordless impact drivers while the plant is constructed. Once complete, the fixed electrical infrastructure and grid connection are used to supply power from the solar power plant to the grid.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Ojjo, Inc.
    Inventor: Jack West
  • Patent number: 11804506
    Abstract: An image sensor includes a two-dimensional array of image sensor pixels, which are formed in a semiconductor layer. Each image sensor pixel is formed in a substrate having a corresponding semiconductor region therein. Each semiconductor region contains at least first and second photoelectric conversion elements, which are disposed at side-by-side locations therein. An electrically insulating isolation region is also provided, which extends at least partially through the semiconductor region and at least partially between the first and second photoelectric conversion elements, which may be configured respectively as first and second semiconductor regions of first conductivity type (e.g., N-type). At least one optically reflective region is also provided, which extends at least partially through the semiconductor region and surrounds at least a portion of at least one of the first and second photoelectric conversion elements. A semiconductor floating diffusion (FD) region (e.g.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: October 31, 2023
    Inventors: Kyungho Lee, Hyuk An, Hyuk Soon Choi
  • Patent number: 11798969
    Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: October 24, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • Patent number: 11735609
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a photodetector region provided in a substrate. A dielectric material is disposed within a trench defined by one or more interior surfaces of the substrate. The trench has a depth that extends from an upper surface of the substrate to within the substrate. A doped silicon material is disposed within the trench and has a sidewall facing away from the doped silicon material. The sidewall contacts a sidewall of the dielectric material along an interface extending along the depth of the trench.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: August 22, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Chuan Lee, Chia-Chan Chen
  • Patent number: 11721794
    Abstract: A method for manufacturing reflective structure is provided. The method includes the operations as follows. A metallization structure is received. A plurality of conductive pads are formed over the metallization structure. A plurality of dielectric stacks are formed over the conductive pads, respectively, wherein the thicknesses of the dielectric stacks are different. The dielectric stacks are isolated by forming a plurality of trenches over a plurality of intervals between each two adjacent dielectric stacks.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Hua Lin, Yao-Wen Chang, Chii-Ming Wu, Cheng-Yuan Tsai, Eugene I-Chun Chen, Tzu-Chung Tsai
  • Patent number: 11711932
    Abstract: A method for manufacturing a photoelectric conversion element includes providing a base structure including a semiconductor substrate having a principal surface, a first electrode located on or above the principal surface, second electrodes which are located on or above the principal surface and which are one- or two-dimensionally arranged, and a photoelectric conversion film covering at least the second electrodes; forming a mask layer on the photoelectric conversion film, the mask layer being conductive and including a covering section covering a portion of the photoelectric conversion film that overlaps the second electrodes in plan view; and partially removing the photoelectric conversion film by immersing the base structure and the mask layer in an etchant.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: July 25, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaya Hirade, Manabu Nakata, Katsuya Nozawa, Yasunori Inoue
  • Patent number: 11696513
    Abstract: This magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer which is interposed between the first and second ferromagnetic layers, wherein the tunnel barrier layer has a spinel structure represented by a compositional formula X1-?Y?O?, and the tunnel barrier layer contains one or more additional elements selected from the group consisting of He, Ne, Ar, Kr, Xe, P, C, B, and Si, and in the compositional formula, X represents one or more elements selected from the group consisting of Mg, Zn, Cd, Ag, Pt, and Pb, Y represents one or more elements selected from the group consisting of Al, Ga, and In, a range of ? is 0<??1, and a range of ? is 0.35???1.7.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: July 4, 2023
    Assignee: TDK CORPORATION
    Inventors: Katsuyuki Nakada, Shinto Ichikawa
  • Patent number: 11688610
    Abstract: A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzung-Hua Lin, Yi-Ko Chen, Chia-Chu Liu, Hua-Tai Lin
  • Patent number: 11670660
    Abstract: A pixel array included in an auto-focus image sensor includes a substrate, a plurality of pixels, a deep device isolation region and a plurality of first ground regions. The substrate includes a first surface on which a gate electrode is disposed and a second surface opposite to the first surface. The plurality of pixels are disposed in the substrate, and include a plurality of first pixels configured to detect a phase difference and a plurality of second pixels configured to detect an image. The deep device isolation region is disposed in the substrate, extends substantially vertically from the second surface of the substrate to isolate the plurality of pixels from each other. The plurality of first ground regions are disposed adjacent to the first surface in the substrate and adjacent to only at least some of the plurality of first pixels.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Masato Fujita, Kyungho Lee
  • Patent number: 11665895
    Abstract: A method for manufacturing a semiconductor structure includes forming a first oxide layer on a wafer; forming a silicon nitride layer on the first oxide layer; forming a plurality of trenches; filling an oxide material in the trenches to form a plurality of shallow trench isolation regions; removing the silicon nitride layer without removing the first oxide layer; using a photomask to apply a photoresist for covering a first part of the first oxide layer on a first area and exposing a second part of the first oxide layer on a second area; and removing the second part of the first oxide layer while remaining the first part of the first oxide layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: May 30, 2023
    Assignee: eMemory Technology Inc.
    Inventors: Wein-Town Sun, Chun-Hsiao Li
  • Patent number: 11598672
    Abstract: The present invention features a novel design for a bolometric infrared detector focused on LWIR range for human body high-resolution temperature sensing. The present invention incorporates an efficient plasmonic absorber and VO2 nanobeam to facilitate improvement in both aspects—thermal resolution and spatial resolution. The present invention significantly improves the detectivity, NETD, and responsivity for a smaller form-factor detector active area.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: March 7, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Mohammad Wahiduzzaman Khan, Ozdal Boyraz, Jonathan Sullivan, Jaeho Lee, Ziqi Yu
  • Patent number: 11599229
    Abstract: Provided is a display device including a display panel having a plurality of pixel regions, a first insulating layer on the display panel, having a first refractive index, and having a plurality of first openings defined in regions which overlap the plurality of pixel regions, a second insulating layer directly on the first insulating layer and having a plurality of second openings defined in regions which correspond to the plurality of first openings, and a third insulating layer covering the display panel, the first insulating layer, and the second insulating layer and having a second refractive index higher than the first refractive index, wherein the third insulating layer may overlap the plurality of pixel regions on a plane.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: March 7, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jungha Son, Gee-Bum Kim, Sangwoo Kim, Kijune Lee, Taekyung Ahn, Byung Han Yoo, Jaeik Lim, Chaungi Choi
  • Patent number: 11587968
    Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The device includes a photoelectric conversion section; a trench between the photoelectric conversion sections in adjacent pixels; and a PN junction region on a sidewall of the trench and including a P-type region and an N-type region, the P-type region having a protruding region. The device can include an inorganic photoelectric conversion section having a pn junction and an organic photoelectric conversion section having an organic photoelectric conversion film that are stacked in a depth direction within a same pixel; and a PN junction region on a sidewall of the inorganic photoelectric conversion section. The PN junction region can further include a first P-type region and an N-type region; and a second P-type region. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: February 21, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masashi Ohura, Shin Iwabuchi, Atsushi Okuyama
  • Patent number: 11551904
    Abstract: A system and method that allows higher energy implants to be performed, wherein the peak concentration depth is shallower than would otherwise occur is disclosed. The system comprises an ion source, an accelerator, a platen and a platen orientation motor that allows large tilt angles. The system may be capable of performing implants of hydrogen ions at an implant energy of up to 5 MeV. By tilting the workpiece during an implant, the system can be used to perform implants that are typically performed at implant energies that are less than the minimum implant energy allowed by the system. Additionally, the resistivity profile of the workpiece after thermal treatment is similar to that achieved using a lower energy implant. In certain embodiments, the peak concentration depth may be reduced by 3 ?m or more using larger tilt angles.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 10, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Venkataramana R. Chavva, KyuHa Shim, Hans Gossmann, Edwin Arevalo, Scott Falk, Rajesh Prasad
  • Patent number: 11538840
    Abstract: A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: December 27, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wu-Hsi Lu, Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Ming-Cheng Lo, Wei-Lun Chung
  • Patent number: 11538709
    Abstract: A transfer printing method is described that can be used for a wide variety of materials, such as to allow for circuits formed of different materials to be integrated together on a single integrated circuit. A tether (18) is formed on dice regions (16) of a first wafer (30), followed by attachment of a second wafer (32) to the tethers. The dice regions (16) are processed so as to be separated, followed by transfer printing of the dice regions to a third wafer (34).
    Type: Grant
    Filed: February 17, 2018
    Date of Patent: December 27, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: James G. Fiorenza, Susan L. Feindt, Michael D. Delaus, Matthew Duffy, Ryan Iutzi, Kenneth Flanders, Rama Krishna Kotlanka
  • Patent number: 11461529
    Abstract: Routing a circuit path includes selecting pixels on the circuit path based at least on penalty values associated with the pixels. Pixels on a rejected circuit path are penalized by increasing their penalty values. Re-routing a rejected circuit path allows for pixels on previously rejected paths to be considered when rerouting the rejected circuit path, rather than being eliminated outright.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: October 4, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Matus Lipka, Kenneth Reneris
  • Patent number: 11424346
    Abstract: The present application discloses a semiconductor device with a programmable feature such as anti-fuse and a method for fabricating the semiconductor device. The semiconductor device includes a first insulating layer including a peak portion and an upper portion positioned on the peak portion, and first conductive blocks positioned on two sides of the peak portion. A width of the peak portion is gradually decreased toward a direction opposite to the upper portion, and the first conductive blocks are spaced apart by the peak portion.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: August 23, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Patent number: 11367616
    Abstract: A method of patterning a material layer includes the following steps. A first material layer is formed over a substrate, and the first material layer includes a first metal compound. Through a first photomask, portions of the first material layer is exposed with a gamma ray, wherein a first metal ion of the first metal compound in the portions of the first material layer is chemically reduced to a first metal grain. Other portions of the first material layer are removed to form a plurality of first hard mask patterns including the first metal grain.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: June 21, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: You-Hua Chou, Kuo-Sheng Chuang
  • Patent number: 11211423
    Abstract: A method of producing a semiconductor epitaxial wafer is provided. The method includes irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, in which the modified layer includes a constituent element of the cluster ions in solid solution. The method further includes forming an epitaxial layer on the modified layer of the semiconductor wafer. The irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer, and an average depth of an amorphous layer surface from a semiconductor wafer surface-side of the amorphous layer is at least 20 nm from the surface of the semiconductor wafer.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: December 28, 2021
    Assignee: SUMCO CORPORATION
    Inventor: Ryosuke Okuyama
  • Patent number: 11183612
    Abstract: The invention relates to a method for producing at least one optoelectronic component (100) comprising the steps A) providing an auxiliary carrier (1), B) epitaxially applying a sacrificial layer (2) on the auxiliary carrier (1), wherein the sacrificial layer (2) comprises germanium, C) epitaxially applying a semiconductor layer sequence (3) on the sacrificial layer (2), D) removing the sacrificial layer (2) by means of dry etching (9), such that the auxiliary carrier (1) is removed from the semiconductor layer sequence (3).
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: November 23, 2021
    Assignee: OSRAM OLED GMBH
    Inventors: Petrus Sundgren, Christoph Klemp
  • Patent number: 11164854
    Abstract: A pair of smart glasses including a headset, a frame, and an optical photoelectric conversion unit that can gather and utilize solar energy to supplement the electrical energy of a built-in battery. The smart glasses also include a display module comprising a plurality of display units arranged in a matrix. Each display unit comprises at least one micro LED unit and at least one first optical photoelectric conversion unit. A number of the micro LED units functions as a display, and also being controllable as an infrared light source for retinal scanning of the user.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: November 2, 2021
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventors: Chi-An Chen, Ming-Ta Hsieh
  • Patent number: 11056517
    Abstract: Methods and devices that monolithically integrate thin film elements/devices, e.g., environmental sensors, batteries and biosensors, with high performance integrated circuits, i.e., integrated circuits formed in a high quality device layer. Preferred embodiments further monolithically integrate a solar cell array. Preferred embodiments provide pin-size and integrated solar powered wearable electronic, ionic, molecular, radiation, etc. sensors and circuits.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: July 6, 2021
    Assignee: The Regents of the University of California
    Inventors: Shadi A. Dayeh, Yun Goo Ro, Namseok Park, Atsunori Tanaka, Siarhei Vishniakou, Ahmed Youssef, James Buckwalter, Cooper Levy
  • Patent number: 10854493
    Abstract: A method for manufacturing a handling device includes depositing a single layer of an adhesive on a first surface of a first wafer; depositing an antiadhesive layer on a first surface of a second wafer different from the first wafer; bringing into contact the first wafer and the second wafer, the bringing into contact taking place at the level of the single adhesive layer of the first wafer and the antiadhesive layer of the second wafer; separating the first wafer and the second wafer; the first wafer including the single adhesive layer forming a handling device. The bringing into contact of the first wafer and the second wafer is carried out at a temperature TC such that TC>Tg+100° C. where Tg is the glass transition temperature of the material composing the single adhesive layer of the first wafer.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: December 1, 2020
    Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Pierre Montmeat, Frank Fournel
  • Patent number: 10811558
    Abstract: A relevant technological challenge is the low cost and abundant materials development for silicon surface passivation for applications in optoelectronic devices, in particular in solar cells by scalable industrial methods. In the present invention, a new hybrid material comprising PEDOT:PSS and transparent conducting oxide nanostructures is developed and a method is proposed to fabricate the composite material that passivates well the silicon surface to be used by means of a thin composite film of thickness below 200 nm.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: October 20, 2020
    Assignees: INSTITUTT FOR ENERGITEKNIKK, UNIVERSIDAD COMPLUTENSE DE MADRID
    Inventors: Ana Cremades Rodriguez, Chang Chuan You, David Maestre Varea, Erik Stensrud Marstein, Geraldo Cristian Vasquez Villanueva, Halvard Haug, Javier Piqueres De Noriega, Jose Maria Gonzalez Calbet, Julio Ramirez Castellanos, Maria Taeno Gonzalez, Miguel Garcia Tecedor, Smagul Karazhanov
  • Patent number: 10796938
    Abstract: An example of a method of micro-transfer printing comprises providing a micro-transfer printable component source wafer, providing a stamp comprising a body and spaced-apart posts, and providing a light source for controllably irradiating each of the posts with light through the body. Each of the posts is contacted to a component to adhere the component thereto. The stamp with the adhered components is removed from the component source wafer. The selected posts are irradiated through the body with the light to detach selected components adhered to selected posts from the selected posts, leaving non-selected components adhered to non-selected posts. In some embodiments, using the stamp, the selected components are adhered to a provided destination substrate. In some embodiments, the selected components are discarded. An example micro-transfer printing system comprises a stamp comprising a body and spaced-apart posts and a light source for selectively irradiating each of the posts with light.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: October 6, 2020
    Assignee: X Display Company Technology Limited
    Inventors: Erich Radauscher, Ronald S. Cok, Christopher Andrew Bower, Matthew Alexander Meitl, James O. Thostenson
  • Patent number: 10770608
    Abstract: The invention relates to a photovoltaic mono cell that is semi-transparent to light, comprising a plurality of active photovoltaic zones that are separated by transparent zones, said active photovoltaic zones being formed from a stack of thin films arranged on a substrate that is transparent to light, said stack of thin films consisting at least of a transparent electrode, an absorber layer and a metal electrode, said transparent zones being apertures produced at least in the metal electrode and in the absorber layer in order to allow as much light as possible to pass, characterized in that it furthermore comprises an electrically conductive collecting gate arranged either making contact with the front electrode in order to decrease the electrical resistance of the transparent electrode, or making contact with the absorber in order to facilitate collection of the electrical current generated by said mono cell.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: September 8, 2020
    Assignee: Garmin Switzerland GmbH
    Inventors: Philippe Gilbert Frederic Cardi, Sylvain De Vecchi
  • Patent number: 10741603
    Abstract: A method for manufacturing an image sensor comprises: forming a trench around a photodiode, wherein the photodiode comprises a first doped region with a first conductivity type dopant formed in a semiconductor substrate with a second conductivity type dopant; forming a covering portion in the trench, the covering portion with the second conductivity type dopant covering at least a portion of a sidewall or a bottom wall of the trench, wherein a doping concentration of the covering portion is higher than a doping concentration of the semiconductor substrate; and diffusing the second conductivity type dopant in the covering portion into the semiconductor substrate so as to form a second doped region with the second conductivity type dopant surrounding the at least a portion of the sidewall or the bottom wall of the trench.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: August 11, 2020
    Assignee: HUAIAN IMAGING DEVICE MANUFACTURER CORPORATION
    Inventors: Xiaolu Huang, Xiangnan Lv, Yosuke Kitamura
  • Patent number: 10714516
    Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes doping a substrate to form a first well region having a first doping type, and selectively etching an upper surface of the substrate to define a trench extending into the first well region. The trench is filled with one or more dielectric materials. The substrate is implanted to form a first photodiode region within the substrate. The first photodiode region is separated from the trench by the first well region. A first part of the one or more dielectric materials is removed from within the trench to expose a sidewall of the substrate that defines the trench and that is proximate to the first photodiode region. A doped epitaxial material having the first doping type is formed along the sidewall of the substrate.
    Type: Grant
    Filed: September 22, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yueh-Chuan Lee, Chia-Chan Chen
  • Patent number: 10696032
    Abstract: A bonding method utilizing carbon nanotubes provides first and second objects to be bonded and a carbon nanotube structure. The carbon nanotube structure comprises a super-aligned carbon nanotube film comprising carbon nanotubes, the carbon nanotubes extending substantially along a same direction. The carbon nanotube structure is laid on surface of first object and surface of second object is pressed onto the carbon nanotube structure. Pressure being applied to the first object and the second object bonds the two together.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 30, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Xiang Jin, Zi-Peng Wu, Wen-Tao Miao, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 10689573
    Abstract: The present invention relates to a wet etching composition for a substrate having a SiN layer and a Si layer, comprising 0.1-50 mass % fluorine compound (A), 0.04-10 mass % oxidant (B) and water (D) and having pH in a range of 2.0-5.0. The present invention also relates to a wet etching process for a semiconductor substrate having a SiN layer and a Si layer, the process using the wet etching composition. The composition of the present invention can be used for a substrate having a SiN layer and a Si layer to enhance removal selectivity of Si over SiN while reducing corrosion of the device and the exhaust line and air pollution caused by a volatile component generated upon use and further a burden on the environment caused by the nitrogen content contained in the composition.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: June 23, 2020
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Akinobu Horita, Kenji Shimada, Kenichi Takahashi, Toshiyuki Oie, Aya Ito
  • Patent number: 10672810
    Abstract: In some embodiments, the present disclosure relates to an integrated chip having a photodetector arranged within a semiconductor substrate having a first doping type. One or more dielectric materials are disposed within a trench defined by interior surfaces of the semiconductor substrate. A doped epitaxial material arranged within the trench at a location laterally between the one or more dielectric materials and the photodetector. The doped epitaxial material has a second doping type that is different than the first doping type.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yueh-Chuan Lee, Chia-Chan Chen
  • Patent number: 10600658
    Abstract: A method includes placing a substrate on a first curved surface of a first bending tool, using a second bending tool with a second surface to apply pressure to the substrate, thereby pressing the substrate onto the first curved surface and bending the substrate, and removing the bended substrate from the first bending tool.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: March 24, 2020
    Assignee: Infineon Technologies AG
    Inventors: Andre Wedi, Guido Boenig, Niels Oeschler, Christian Stahlhut
  • Patent number: 10546889
    Abstract: Implementations of the disclosure provide a method of fabricating an image sensor device. The method includes forming first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate, directing ions into the exposed first substrate through the first trenches to form first isolation regions in the substrate, removing the first photoresist layer, forming second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch, directing ions into the exposed second surface through the second trenches to form second isolation regions in the substrate, the first and second isolation regions being alternatingly disposed in the substrate, and the first and second isolation regions defining pixel regions therebetween, and removing the second photoresist layer.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: January 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Chao Chiu, Chih-Chien Wang, Feng-Jia Shiu, Ching-Sen Kuo, Chun-Wei Chang, Kai Tzeng
  • Patent number: 10186543
    Abstract: An image sensor may include a main photodiode formed in a substrate, a first inter-layer dielectric layer formed over a lower surface of the substrate, and phase difference detectors formed over the first inter-layer dielectric layer. The phase difference detectors include a left phase difference detector that is vertically overlapping and aligned with a left side region of the main photodiode, and a right phase difference detector that is vertically overlapping and aligned with a right side region of the main photodiode.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: January 22, 2019
    Assignee: SK Hynix Inc.
    Inventor: Yun-Hui Yang
  • Patent number: 10162085
    Abstract: The present invention relates to a large area organic light emitting panel and, more particularly, to a large area organic light emitting panel which prevents an observer in front of the panel from recognizing a seam connecting organic light emitting panels, i.e. which can implement a seamless effect. To this end, the present invention provides a large area organic light emitting panel comprising: a plurality of organic light emitting panels arranged vertically and horizontally; and a seam part, formed between the plurality of organic light emitting panels, for connecting the plurality of organic light emitting panels and refracting, to the front, light laterally emitted from the organic light emitting panels by a wave guiding effect.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: December 25, 2018
    Assignee: Corning Precision Materials Co., Ltd.
    Inventors: Joo Young Lee, Kyoung Wook Park
  • Patent number: 10008465
    Abstract: An active substrate includes a plurality of active components distributed over a surface of a destination substrate, each active component including a component substrate different from the destination substrate, and each active component having a circuit and connection posts on a process side of the component substrate. The connection posts may have a height that is greater than a base width thereof, and may be in electrical contact with the circuit and destination substrate contacts. The connection posts may extend through the surface of the destination substrate contacts into the destination substrate connection pads to electrically connect the connection posts to the destination substrate contacts.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: June 26, 2018
    Assignee: X-Celeprint Limited
    Inventor: Christopher Bower
  • Patent number: 9973678
    Abstract: In various embodiments, methods, techniques, and related apparatuses for phase-detect autofocus devices are disclosed. In one embodiment, a phase-detect system includes a first color filter formed over a first pixel and a second pixel formed adjacent to the first pixel with a second color filter being formed over the second pixel. The second color filter has a color different from a color of the first color filter. A micro-lens spans the first pixel and the second pixel, configured to capture a phase difference in spatial frequency information present in an imaged scene. The first pixel and the second pixel are placed adjacent to each other in at least one of a horizontal direction, a vertical direction, and/or a diagonal direction, with an arrangement of the two pixels being replicated at either regular and/or irregular intervals across the sensor. Other methods and apparatuses are disclosed.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: May 15, 2018
    Assignee: INVISAGE TECHNOLOGIES, INC.
    Inventors: Emanuele Mandelli, Gregory Chow, Naveen Kolli
  • Patent number: 9748412
    Abstract: A photodiode includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. An intrinsic layer is formed over the substrate and including a III-V material. A transparent II-VI n-type layer is formed on the intrinsic layer and functions as an emitter and an n-type ohmic contact.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: August 29, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana, Brent A. Wacaser
  • Patent number: 9716126
    Abstract: A method of manufacturing a solid-state image sensor includes forming a first element isolation and a first active region of a pixel area, and a second isolation and a second active region of a peripheral circuit area, forming a gate electrode film covering the first element isolation, the first active region, the second element isolation and the second active region, implanting an n-type impurity selectively into at least a part of the gate electrode film corresponding to the pixel area, and forming, after the implanting of the n-type impurity, a first gate electrode of the pixel area and a second gate electrode of the peripheral circuit area by patterning the gate electrode film. The part of the gate electrode film includes a portion located above a boundary between the first element isolation and the first active region.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: July 25, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masatsugu Itahashi, Nobuaki Kakinuma, Mineo Shimotsusa, Masato Fujita, Yusuke Onuki, Takumi Ogino, Keita Torii
  • Patent number: 9685481
    Abstract: A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Devendra K. Sadana, Robert L. Wisnieff
  • Patent number: 9543352
    Abstract: A backside illuminated CMOS image sensor and a manufacturing method thereof are provided. Embedded micro-lenses disposed respectively on concave surfaces of a buffer oxide layer, wherein the concave surfaces are positioned to respectively align with photodiodes of pixel array of the CMOS image sensor. The embedded micro-lenses can confine incident light to the photodiodes to reduce optical crosstalk between adjacent pixels.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: January 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume Chien, Zen-Fong Huang, Chia-Yu Wei, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: RE48755
    Abstract: An image sensor is provided. The image sensor includes a substrate, a first interlayer insulating layer, a first metal line, and a shielding structure. The substrate includes a pixel array, a peripheral circuit area, and an interface area disposed between the pixel array and the peripheral circuit area. The first interlayer insulating layer is formed on a first surface of the substrate. The first metal line is disposed on the first interlayer insulating layer of the pixel array. The second interlayer insulating layer is disposed on the first interlayer insulating layer wherein the second interlayer insulating layer covers the first metal line. The shielding structure passes through the substrate in the interface area wherein the shielding structure electrically insulates the pixel array of the substrate and the peripheral circuit area.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun-Ki Lee, Chang-Rok Moon, Min-Wook Jung