Abstract: A method for forming a silicone polymer insulation film having a low dielectric constant, high thermal stability, high humidity-resistance, and high O2 plasma resistance on a semiconductor substrate is applied to a plasma CVD apparatus. The first step is introducing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&agr;−1(R)2&agr;−&bgr;+2(OCnH2n+1)&bgr; (&agr;, &bgr;, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The residence time of the material gas is lengthened by, for example, reducing the total flow of the reaction gas, in such a way as to form a silicone polymer film having a micropore porous structure with a low dielectric constant.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.

Abstract: A process for depositing porous silicon oxide-based films using a sol-gel approach utilizing a precursor solution formulation which includes a purified nonionic surfactant and an additive among other components, where the additive is either an ionic additive or an amine additive which forms an ionic ammonium type salt in the acidic precursor solution. Using this precursor solution formulation enables formation of a film having a dielectric constant less than 2.5, appropriate mechanical properties, and minimal levels of alkali metal impurities. In one embodiment, this is achieved by purifying the surfactant and adding ionic or amine additives such as tetraalkylammonium salts and amines to the stock precursor solution.

Abstract: A low temperature process is described for forming a low dielectric constant (k) fluorine and carbon-containing silicon oxide dielectric material for integrated circuit structures. A reactor has a semiconductor substrate mounted on a substrate support which is maintained at a low temperature not exceeding about 25° C., preferably not exceeding about 10° C., and most preferably not exceeding about 0° C. A low k fluorine and carbon-containing silicon oxide dielectric material is formed on the surface of the substrate by reacting together a vaporous source of a mild oxidizing agent, such as a vaporized hydrogen peroxide, and a vaporous substituted silane having the formula (CFmHn)—Si—(R)xHy wherein m is 1-3; n is 3-m; R is an alkyl selected from the group consisting of ethyl (—C2H5), methyl (—CH3), and mixtures thereof; x is 1-3; and y is 3-x.

Abstract: Multilayer thin films consisting of alternating layers of oxide and organic polymer dielectric materials are manufactured by chemical vapor deposition using a CVD apparatus comprising separate precursor volatilization/dissociation areas. Methods are described for the manufacture of multilayered films. The electrical properties of the multilayered films make the films of embodiments of this invention suitable for use as dielectric materials for semiconductor manufacture. The multilayered films of embodiments this invention reduce RC delay and cross-talk, thereby permitting increased density, higher frequency performance and greater reliability of semiconductor devices for use in the electronics industry.

Abstract: A novel dielectric composition is provided that is useful in the manufacture of electronic devices such as integrated circuit devices and integrated circuit packaging devices. The dielectric composition is prepared by crosslinking a thermally decomposable porogen to a host polymer via a coupling agent, followed by heating to a temperature suitable to decompose the porogen. The porous materials that result have dielectric constants less than about 3.0, with some materials having dielectric constants less than about 2.5. Integrated circuit devices, integrated circuit packaging devices, and methods of manufacture are provided as well.

Abstract: A method is for low-dielectric-constant film deposition on a surface of a semiconductor substrate. The deposition may be by chemical vapor deposition (CVD) techniques and may include a wide class of precursor monomeric compounds, namely organosilanes.

Abstract: The present invention relates to low dielectric materials essential for a semiconductor having high density and high performance of the next generation, particularly to a process for preparing a porous interlayer insulating film having low dielectric constant containing pores with a size of a few nanometers or less.

Abstract: An interlayer insulating film of a semiconductor device is made of a material in which silicon atoms are main elements, and each of the silicon atoms has an oxygen bond and a carbon bond, and further at least some of the silicon atoms have a hydrogen bond. The interlayer insulating film is formed by chemical vapor deposition employing a mixed gas of hydrogen peroxide and a reactive gas having a gas molecular structure in which silicon atoms have a hydrogen bond and a carbon bond.

Abstract: An organic precursor compound is gasified and fed into the reaction chamber of a high density plasma chemical vapor deposition (HDP-CVD) reactor. The organic precursor comprises silicon, oxygen and carbon atoms. No reactive oxygen gas or other oxidizer is used in the reaction chamber. A thin film of carbon-containing low dielectric constant silicon oxide material is deposited and simultaneously etched in the reaction chamber to fill a gap having a high aspect ratio with low dielectric constant insulator material.

Abstract: The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and gap-filling characteristics of the organic material of low dielectric constant, and for that purpose there is provided a wiring structure with the copper film embedded in the insulation film of the wiring layer, wherein the insulation film of the wiring layer is of a multi-layered structure with the laminated methyl silsesquioxane (MSQ) film, methylated hydrogen silisesquioxane (MHSQ) film and silicon oxide film.

Abstract: In forming various types of insulating films in manufacture of a semiconductor device, carbon is gasified into CHx, COH etc. during film formation by adding active hydrogen and nitrogen oxide to reduce the carbon content during the film formation, and the effect of blocking impurities such as alkali metals is improved.

Abstract: An organic acid containing solution obtained by adding an organic acid having an alkyl group to a solution including silanol condensate particles is applied on a substrate so as to form a coating film. The coating film is heat treated so as to form a porous film.

Abstract: This invention discloses methods for the deposition of SiO2 and other oxide dielectric materials using a near room temperature thermal chemical vapor deposition process. The films have chemical, physical, optical, and electrical properties similar to or better than those of oxide films deposited using conventional, high temperature thermal CVD methods. The films of the invention are useful in the manufacture of semiconductor devices of sub-micron feature size and for food packaging.

Abstract: Certain embodiments of the present invention relate to a semiconductor device that has a pad section having an excellent coherency with an interlayer dielectric layer, and a method for manufacturing the same. A semiconductor device 1000 has a pad layer 30A formed over an interlayer dielectric layer 20. The interlayer dielectric layer 20 includes at least a first silicon oxide layer 20b that is formed by a polycondensation reaction of a silicon compound and hydrogen peroxide, and a second silicon oxide layer 20c formed over the first silicon oxide layer and containing an impurity. The pad section 30A includes a wetting layer 32, an alloy layer 34 and a metal wiring layer 37.

Abstract: When aging processing is performed, a ratio of water vapor contained in a processing gas is made comparatively large for a certain period of time from start of the processing, whereby it is accelerated for collides of TEOS to be gelled and chained in a network form, so that heating is further uniformly performed for the wafer W. Thereafter, the ratio of water vapor in the processing gas is decreased, so that a water content which is contained in the insulating film material after the aging processing can be reduced in amount.

Abstract: Disclosed is a method of fabricating a semiconductor device, in which an interlayer insulating film having a low dielectric constant is formed by coating a wiring, and either a via hole or a contact hole is formed in the interlayer insulating film. The method of fabricating a semiconductor device having the interlayer insulating film 25 formed on the film-formed substrate 21 with the exposed wiring 23, comprises the step of converting a silicon compound containing only the Si, O, C and H into a plasma gas as a film-forming gas to react the plasma gas, thus forming the block insulating film 24 containing silicon (Si), oxygen (O), carbon (C) and hydrogen (H) between the wiring 23 and the interlayer insulating film 25.

Abstract: An oxynitride film on the surface of a silicon or silicon germanium substrate is described where film is substantially an oxide film at the film oxide interface, and the nitrogen content of the film increases with the distance away from the substrate. The film is made by a process of rapidly processing a clean silicon wafer in an atmosphere of a nitrogen containing gas containing a very small percentage of oxygen containing gas.

Abstract: A method of deposits polymeric layers of silicon oxynitride onto a surface of a semiconductor material substrate by a Chemical Vapor Deposition technique using at least one organosilane chemical precursor. In some embodiments, the organosilane comprises a combination of silicon, nitrogen, carbon and hydrogen, a specific example of which can be hexamethyldisiloxane. This technique can be used for all standard types of deposition, LPCVD, APCVD, SACVD and PECVD. Using HMDSN provides more uniform layers to be formed on the substrate, with increased quality. Specifically, step-coverage is better than in prior techniques, there is more uniformity of the layers, parameters of the deposition are easier to control, there is improved stoichiometry in the formed layers, and the production process uses materials that are more environmentally healthy than those used previously.

Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 is disclosed. The entire method, which can be performed in a single cluster tool and even in a single chamber, begins by placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber. A “clean” silicate glass base layer that is substantially free of carbon particle impurities on an upper surface is then formed on the wafer surface in one of two ways. The first employs plasma-enhanced chemical vapor deposition using TEOS and diatomic oxygen gases as precursors to first deposit a “dirty” silicate glass base layer having carbon particle impurities imbedded on an upper surface thereof.

Abstract: A method of forming an insulating layer pattern in a liquid crystal display which enables the formation of an insulating layer pattern on a substrate under a low temperature without the need of expensive equipment and complicated processes, wherein the formation speed of the insulating layer is accelerated. The method includes the steps of forming an organic thin layer containing silicon on an insulated substrate, exposing the thin layer to a gaseous ambience including, oxygen, generating a plurality of oxygen radicals and silicon radicals by applying ultraviolet rays to the thin layer using a mask having a predetermined pattern, forming an insulating layer by reacting the silicon radicals with the oxygen radicals, and defining an insulating layer pattern by removing a portion of the thin layer free of the ultraviolet rays.

Abstract: A method for manufacturing an interlayer dielectric layer begins with a preparation of an active matrix provided with a substrate and interconnections formed on the substrate and then the prepared active matrix is set on a chamber. Thereafter, a silicon source material, e.g., a tetra-ethyl-ortho-silicate (TEOS) or modified TEOS and a hydrogen peroxide (H2O2) in a gaseous state are sprayed on the active matrix. And finally, the interlayer dielectric layer is formed on the active matrix by a condensation reaction of the silicon source material and the H2O2.

Abstract: A semiconductor wafer is treated in a chamber by introducing into the chamber a silicon-containing gas or vapor and hydrogen peroxide in vapor form. The silicon-containing gas or vapor is reacted with the hydrogen peroxide to form a short chain, inorganic fluid polymer on the wafer, which thus forms a generally planar layer.

Abstract: A phase separation during solvent evaporation of a solution containing polymer precursors leaves low pressure solvent without polymer precursor in minimal gaps. After polymerization, drive off the low pressure solvent to yield air gaps in the minimal gaps under the polymer.

Abstract: A method for manufacturing a high dielectric constant insulating film made of a metal oxide on a silicon substrate is provided using a material gas mixture containing an oxidizing agent without forming a silicon oxide layer on a silicon substrate. The manufacturing method comprises the steps of placing the semiconductor substrate into a reaction chamber; introducing an organic metal material, oxidizing agent, and a material having a reducing action; and forming a high dielectric constant gate insulating film on said semiconductor substrate by a chemical reaction in the reaction chamber.

Abstract: This invention includes a novel synthesis of a three-step process of growing, depositing and growing SiO2 under low pressure, e.g., 0.2-10 Torr, to generate high quality, robust and reliable gate oxides for sub 0.5 micron technologies. The first layer, 1.0-3.0 nm is thermally grown for passivation of the Si-semiconductor surface. The second deposited layer, which contains a substantial concentration of a hydrogen isotope, such as deuterium, forms an interface with the first grown layer. During the third step of the synthesis densification of the deposited oxide layers occurs with a simultaneous removal of the interface traps at the interface and growth of a stress-modulated SiO2 occurs at the Si/first grown layer interface in the presence of a stress-accommodating interface layer resulting in a planar and stress-reduced Si/SiO2 interface. The entire synthesis is done under low-pressure (e.g., 0.

Abstract: A method of forming an interlayer dielectric layer of a semiconductor device and an interlayer dielectric layer using the same. By the method, a semiconductor substrate formed metal interconnect lines thereon is provided, a first insulating layer of a low dielectric material is formed on the semiconductor substrate, by a spin coating, and a second insulating layer of a low dielectric material is formed on the first insulating layer, by the high density plasma chemical vapor deposition (CVD). The second insulating layer is planarized through a chemical mechanical polishing (CMP) process.

Abstract: The invention provides semiconductor processing methods of depositing SiO2 on a substrate. In a preferred aspect, the invention provides methods of reducing the formation of undesired reaction intermediates in a chemical vapor deposition (CVD) decomposition reaction. In one implementation, the method is performed by feeding at least one of H2O and H2O2 into a reactor with an organic silicon precursor. For example, in one exemplary implementation, such components are, in gaseous form, fed separately into the reactor. In another exemplary implementation, such components are combined in liquid form prior to introduction into the reactor, and thereafter rendered into a gaseous form for provision into the reactor. The invention can be practiced with or in both hot wall and cold wall CVD systems.

Abstract: A method for making a multi-layered integrated circuit structure, includes depositing a methyl doped silicon oxide layer over a substrate. SiO2 skin is deposited on the methyl doped silicon oxide layer by decreasing the flow of CH3SiH3, increasing the flow of SiH4 and keeping the flow of H2O2 constant for a period of time. Finally, a cap layer is deposited which adheres to the SiO2 skin.

Abstract: A low dielectric constant material and a process for controllably reducing the dielectric constant of a layer of such material is provided and comprises the step of exposing the layer of dielectric material to a concentration of an oxygen plasma at a temperature and a pressure sufficient for the oxygen plasma to etch the layer of dielectric material to form voids in the layer of dielectric material. The process may also include the step of controlling the reduction of the dielectric constant by controlling the size and density of the voids. The size and density of the voids can be controlled by varying the pressure under which the reaction takes place, by varying the temperature at which the reaction takes place, by varying the concentration of the oxygen plasma used in the reaction or by varying a combination of these parameters. The process of the present invention is particularly useful in the fabrication of semiconductor devices.

Abstract: Fluorinated chemical precursors, methods of manufacture, polymer thin filmswith low dielectric constants, and integrated circuits comprising primarily of sp2C—F and some hyperconjugated sp3C—F bonds are disclosed in this invention. Precursors are disclosed for creating fluorinated silanes and siloxanes, and fluorinated hydrocarbon polymers. Thermal transport polymerization (TP), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), high density PECVD (HDPCVD), photon assisted CVD (PACVD), and plasma-photon assisted (PPE) CVD and PPETP of these chemicals provides thin films with low dielectric constants and high thermal stabilities for use in the manufacture of integrated circuits.

Abstract: Disclosed is a method for modifying a film-forming surface of a substrate, which is capable removing a base surface dependency in forming a film on the film-forming surface of the substrate prior to formation of a film by a thermal CVD method using a reactant gas containing an ozone-containing gas containing ozone (O3) in oxygen (O2) and Tetra-Ethyl-Ortho-Silicate. The method comprises the step of modifying the film-forming surface 12a of the substrate 102 by allowing any one of ammonia, hydrazine, an amine, gases thereof and aqueous solutions thereof to contact with the surface of the substrate before forming an insulating film 13 on the surface 12a of the substrate 102.

Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 is disclosed. The entire method, which can be performed in a single cluster tool and even in a single chamber, begins by placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber. A “clean” silicate glass base layer that is substantially free of carbon particle impurities on an upper surface is then formed on the wafer surface in one of two ways. The first employs plasma-enhanced chemical vapor deposition using TEOS and diatomic oxygen gases as precursors to first deposit a “dirty” silicate glass base layer having carbon particle impurities imbedded on an upper surface thereof.

Abstract: A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to water or a hydrophobic-imparting surfactant such as hexamethyldisilazane, and curing the silicon oxide based film at an elevated temperature. Dissociation of the oxidizing gas can be increased in a separate microwave chamber to assist in controlling the carbon content of the deposited film. The moisture resistance of the silicon oxide based films is enhanced.

Abstract: A method for insulating metal conductors by spin-on-glass in inter-metal dielectric layers and devices formed by such method are disclosed. In the method, an additional step of scrubber clean is incorporated after an etch-back process on the spin-on-glass layer is conducted. Contaminating metal ions such as those of calcium is thus removed to eliminate formation of voids by such particles. The method can be easily implemented by including the additional scrubber clean step into a total wafer fabrication recipe.

Abstract: A liquid short-chain polymer of the general formula RaSi(OH)b or (R)aSiHb(OH)c is deposited on a substrate, where a+b=4 or a+b+c=4, respectively, a, b and c are integers, R is a carbon-containing group and a silicon to carbon bond is indicated by Fourier Transfer Infrared analysis. The short-chain polymer is then subjected to further polymerization to form an amorphous structure of the general formula (RxSiOy)n, where x and y are integers, x+y=4, x≠0, n equals 1 to ∞, R is a carbon-containing group and a silicon to carbon bond is indicated by Fourier Transfer Infrared analysis.

Abstract: An interconnection structure includes an interlevel insulating film, made of organic-containing silicon dioxide, between lower- and upper-level metal interconnects. A phenyl group, bonded to a silicon atom, is introduced into silicon dioxide in the organic-containing silicon dioxide.

Abstract: A method is for forming an intermediate dielectric layer to optimize the planarity of electronic devices integrated on a semiconductor which incorporate non-volatile memories. The insulating dielectric is deposited from a liquid state source comprising silicon oxides and organics of the resist type. The liquid dielectric layer is evenly spread by a spinning technique providing good levels of planarity. Solidification, referred to as polymerization, is achieved through a low-temperature thermal cycle. Since this dielectric layer cannot be used as such to isolate the semiconductor substrate from the overlying metallization plane on account of the presence of organics forming a source of impurities, it is arranged for the layer to be encapsulated between two dielectric layers of silicon oxide as deposited from a plasma.

Abstract: A process for producing low-density, porous silica films in a vacuum environment is provided. The films are advantageous for use as low dielectric constant insulating materials in semiconductor devices. In a first step, an organic-group-containing silica precursor is deposited on a semiconductor substrate in a chemical vapor deposition reactor. In a second step, the organic groups are removed by heating in a furnace in an oxidizing environment or by exposure to an oxidizing plasma, thereby creating a low density silica film.

Abstract: A semiconductor device includes an interlayer insulating film disposed between upper and lower wiring layers, the interlayer insulating film having a two-layered structure including an upper insulating film and a lower insulating film, the upper insulating film is formed in an ozone (O3) concentration higher than that of the lower insulating film. The interlayer insulating film may be composed, for example, of O3 tetra etyl ortho silicate (TEOS) boron phospho silicate glass (BPSG). The semiconductor device makes it possible to have the interlayer insulating film sufficiently planarized by a reflow process, and to prevent precipitation of impurities at a surface of the interlayer insulating film. Alternatively, the interlayer insulating film may have a multi-layered structure including a three or more of insulating films, in which a top insulating film is formed in a higher ozone concentration than that of the other insulating films.

Abstract: Polyorganosilicon dielectric coatings are prepared by subjecting specified polycarbosilanes to thermal or high energy treatments to generate cross-linked polyorganosilicon coatings having low k dielectric properties. The thermal process includes multi-step sequentially increasing temperature heating steps. The instantly prepared polyorganosilicon polymers can be employed as dielectric interconnect materials and film coatings for conductor wiring in semiconductor devices. These polyorganosilicon film coatings have the additional characteristics of relative thermal stability and excellent adhesion to substrate surfaces.

Abstract: A method and apparatus for forming a titanium doped tantalum pentaoxide dielectric using a CVD process. According to the present invention a substrate is placed in the deposition chamber. A source of tantalum, a source of titanium, and an oxygen containing gas are then fed into the chamber. Thermal energy is used to decompose the source of tantalum to form tantalum atoms, and decompose the source of titanium to form titanium atoms in the deposition chamber. The titanium atoms, tantalum atoms and the oxygen containing gas then react to form a tantalum pentaoxide dielectric film doped with titanium.

Abstract: A method of forming a metal oxide dielectric film. According to the present invention an amorphous metal oxide dielectric film is deposited over a substrate utilizing a metal organic precursor. The substrate is then heated in an inert ambient to convert the amorphous metal oxide dielectric to a polycrystalline metal oxide dielectric. The polycrystalline metal dielectric is then heated in a oxygen containing ambients.

Abstract: A method for fabricating a silicon oxide and silicon glass layers at low temperature using soft power-optimized Plasma-Activated CVD with a TEOS-ozone-oxygen reaction gas mixture (TEOS O3/O2 PACVD) is described. It combines advantages of both low temperature Plasma-Enhanced Chemical Vapor Deposition (PECVD) and TEOS-ozone Sub-Atmospheric Chemical Vapor Deposition (SACVD) and yields a coating of silicon oxide with stable and high deposition rate, no surface sensitivity, good film properties, conformal step coverage and good gap-fill. Key features of the invention's O3/O2 PACVD process are: a plasma is maintain throughout the entire deposition step in a parallel plate type reactor chamber, the precise RF plasma density, ozone concentration in oxygen and the deposition temperature. These features provide the reaction conditions for the proper O3/O2 reaction mechanism that deposits a conformal silicon oxide layer.

Abstract: A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then formed upon the substrate and within the trench a gap filling silicon oxide trench fill layer employing an ozone assisted thermal chemical vapor deposition (SACVD) method. There is then carried out a densification of the gap filling silicon oxide trench fill layer by annealing in an oxidizing atmosphere at an elevated temperature. Finally, the gap filling silicon oxide trench fill layer is planarized by chemical mechanical polish (CMP) planarization to form the silicon oxide trench filling layer with attenuated surface sensitivity and with an enhanced bulk quality and reduced trench recess at corners.

Abstract: A dielectric interlayer is formed over a semiconductor substrate comprising at least one active region. The exposed upper surface of the dielectric interlayer is treated with nitrogen to form a nitrided barrier layer thereon. At least one hydrogen-containing dielectric layer is formed over the dielectric interlayer having the nitrided barrier layer thereon. The nitrided barrier layer serves as a barrier to diffusion of hydrogen from the at least one hydrogen-containing dielectric layer into the dielectric interlayer, thereby preventing a decrease in hot carrier injection reliability.

Abstract: A method for forming an insulating layer to solve a problem of non-uniform thickness of the insulating layer is provided. The method includes forming a first insulating layer over a substrate preferably by chemical vapor deposition (CVD) at an operation temperature of about 200° C.-350° C. The thickness of the first insulating layer is about 500 Å-5000 Å. A second insulating layer is formed over the first insulating layer preferably by CVD at a temperature of about 350° C.-500° C. The thickness of the second insulating layer is about 1000 Å-10000 Å. The first and the second insulating layers form together as an insulating layer to insulate transistors and isolation structures from the interconnect metal layer.

Abstract: A method and apparatus for depositing nano-porous low dielectric constant films by reaction of a silicon hydride containing compound or mixture optionally having thermally labile organic groups with a peroxide compound on the surface of a substrate. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a foam structure. The nano-porous silicon oxide based films are useful for filling gaps between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures. Preferred nano-porous silicon oxide based films are produced by reaction of 1,3,5-trisilanacyclohexane, bis(formyloxysilano)methane, or bis(glyoxylylsilano)methane and hydrogen peroxide followed by a cure/anneal that includes a gradual increase in temperature.

Abstract: Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.

Abstract: An electrode passivation layer of a semiconductor device and a method for forming the same having improved corrosion-resistance and oxidation-resistance are disclosed, the electrode passivation film including a semiconductor substrate; a conductive layer pattern formed on the semiconductor substrate; and an amorphous passivation film formed on the conductive layer pattern.