By Differential Heating Patents (Class 438/799)
  • Patent number: 11699755
    Abstract: Examples of the present technology include processing methods to incorporate stress in a channel region of a semiconductor transistor. The methods may include depositing a stressed material on an adjacent layer, where the adjacent layer is disposed between the stressed material and semiconductor material having an incorporated dopant. The adjacent layer may be characterized by an increased stress level after the deposition of the stressed material. The method may further include heating the stressed material and the adjacent layer, and removing the stressed material from the adjacent layer. The adjacent layer retains at least a portion of the increased stress after the removal of the stressed material. Examples of the present technology also include semiconductor structures having a conductive layer with first stress, and an intermediate layer with second stress in contact with the conductive layer. The second tensile stress may be at least ten times the first tensile stress.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: July 11, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Ashish Pal, Mehdi Saremi, El Mehdi Bazizi, Benjamin Colombeau
  • Patent number: 11695048
    Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: July 4, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Kazuhisa Torigoe, Toshiaki Ono, Shunya Kawaguchi
  • Patent number: 11040415
    Abstract: The present invention generally describes apparatuses and methods used to perform an annealing process on desired regions of a substrate. In one embodiment, pulses of electromagnetic energy are delivered to a substrate using a flash lamp or laser apparatus. The pulses may be from about 1 nsec to about 10 msec long, and each pulse has less energy than that required to melt the substrate material. The interval between pulses is generally long enough to allow the energy imparted by each pulse to dissipate completely. Thus, each pulse completes a micro-anneal cycle. The pulses may be delivered to the entire substrate at once, or to portions of the substrate at a time. Further embodiments provide an apparatus for powering a radiation assembly, and apparatuses for detecting the effect of pulses on a substrate.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: June 22, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Stephen Moffatt, Joseph M. Ranish
  • Patent number: 11022428
    Abstract: A growth rate detection apparatus has a reflectometer to measure reflectivity of a thin film by receiving reflected light of light irradiated with the thin film, a growth rate candidate calculator to calculate a first growth rate and a second growth rate which are candidates for a growth rate of the thin film based on a temporal variation period of the reflectivity and a refractive index of the thin film in a case where the reflectometer irradiates the thin film with light of a first wavelength and to calculate a third growth rate and a fourth growth rate which are candidates for the growth rate of the thin film based on the temporal variation period and the refractive index in a case where the reflectometer irradiates the thin film with light of a second wavelength, and a growth rate selector to select a common growth rate.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: June 1, 2021
    Assignee: NuFlare Technology, Inc.
    Inventor: Yasushi Iyechika
  • Patent number: 11009440
    Abstract: A temperature-controllable microfluidic device includes: a microfluidic channel generally extending in a first direction for passing a specimen fluid; a microheater disposed along the microfluidic channel, the microheater being made of a resistive wire having a pair of serpentine-shaped portions generally extending in the first direction along respective sides of the microfluidic channel; and a temperature sensor disposed along the microfluidic channel, the temperature sensor being made of a resistive wire having a pair of serpentine-shaped portions generally extending in the first direction along the respective sides of the microfluidic channel.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: May 18, 2021
    Assignee: OKINAWA INSTITUTE OF SCIENCE AND TECHNOLOGY SCHOOL CORPORATION
    Inventors: Doojin Lee, Amy Shen Fried
  • Patent number: 10914894
    Abstract: In one embodiment, a photonic waveguide comprises a layer of core material and a waveguide core extending through the core material. The core material surrounding the waveguide core is modified to simulate clad material. A method for forming the photonic waveguide is also disclosed herein.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 9, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventor: D. Brice Achkir
  • Patent number: 10840100
    Abstract: The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: November 17, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Paul Carey, Aaron Muir Hunter, Dean Jennings, Abhilash J. Mayur, Stephen Moffatt, William Schaffer, Timothy N. Thomas, Mark Yam
  • Patent number: 10699906
    Abstract: A germanium semiconductor layer doped with a dopant such as boron becomes a p-type semiconductor. The semiconductor layer is preheated at a preheating temperature ranging from 200° C. to 300° C., and then heated at a treatment temperature ranging from 500° C. to 900° C., by extremely short-time irradiation of flash light. While oxygen is unavoidably mixed in germanium and becomes a thermal donor at 300° C. to 500° C., the semiconductor layer stays in a temperature range of 300° C. to 500° C. for a negligibly short period of time due to an extremely short irradiation time of 0.1 milliseconds to 100 milliseconds by the flash light. Therefore, the thermal donor can be prevented from being generated in the germanium semiconductor layer.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: June 30, 2020
    Assignee: SCREEN HOLDINGS CO., LTD.
    Inventor: Hideaki Tanimura
  • Patent number: 10679864
    Abstract: Preheat processes for a millisecond anneal system are provided. In one example implementation, a heat treatment process can include receiving a substrate on a wafer support in a processing chamber of a millisecond anneal system; heating the substrate to an intermediate temperature; and heating the substrate using a millisecond heating flash. Prior to heating the substrate to the intermediate temperature, the process can include heating the substrate to a pre-bake temperature for a soak period.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: June 9, 2020
    Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.
    Inventor: Paul Timans
  • Patent number: 10345528
    Abstract: In one embodiment, an apparatus comprises a photonic waveguide formed in an element of core material and comprising a waveguide core extending within the core material and surrounded by core material with a modified index of refraction, and a fiber positioned in a slot formed in the element of core material with a core of the fiber aligned with the waveguide core. A method for forming the photonic waveguide and fiber coupling is also disclosed herein.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: July 9, 2019
    Assignee: CISCO TECHNOLOGY, INC.
    Inventor: D. Brice Achkir
  • Patent number: 10141191
    Abstract: The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: November 27, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Paul Carey, Aaron Muir Hunter, Dean Jennings, Abhilash J. Mayur, Stephen Moffatt, William Schaffer, Timothy N. Thomas, Mark Yam
  • Patent number: 9781773
    Abstract: A method of heating/cooling one or more substrates includes placing the one or more substrates on a rotatable hot-cold plate, wherein each substrate of the one or more substrates is placed on a corresponding sub-plate of a plurality of sub-plates of the rotatable hot-cold plate. The method further includes rotating the one or more substrates, wherein rotating the one or more substrates comprises rotating each substrate of the one or more substrates independently. The method further includes heating or cooling the one or more substrates using a heating-cooling element, wherein rotating the one or more substrates comprises rotating the one or more substrates relative to the heating-cooling element.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui-Chun Peng, Jacky Chung, Heng-Hsin Liu, Chun-Hung Lin
  • Patent number: 9498845
    Abstract: The present invention generally describes apparatuses and methods used to perform an annealing process on desired regions of a substrate. In one embodiment, pulses of electromagnetic energy are delivered to a substrate using a flash lamp or laser apparatus. The pulses may be from about 1 nsec to about 10 msec long, and each pulse has less energy than that required to melt the substrate material. The interval between pulses is generally long enough to allow the energy imparted by each pulse to dissipate completely. Thus, each pulse completes a micro-anneal cycle. The pulses may be delivered to the entire substrate at once, or to portions of the substrate at a time. Further embodiments provide an apparatus for powering a radiation assembly, and apparatuses for detecting the effect of pulses on a substrate.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: November 22, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Stephen Moffatt, Joseph M. Ranish
  • Patent number: 9196490
    Abstract: The invention relates to a method and to a device for at least locally heating a plate including at least one layer (2) to be at least locally heated by at least one main, light flow pulse, and including at least one priming region (4) located deeply relative to the front surface of said layer to be heated, wherein the main flow (7) is capable of heating said layer to be heated (2) while the temperature of the latter is within a high temperature range (PHT), and a priming a secondary heating means (9) capable of heating said priming region from a temperature within a low temperature range (PBT) up to a temperature within said high temperature range (PHT).
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: November 24, 2015
    Assignee: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventor: Michel Bruel
  • Patent number: 9184289
    Abstract: A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: November 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Mao-Lin Huang, Chien-Hsun Wang, Chun-Hsiung Lin, Meng-Ku Chen, Li-Ting Wang, Hung-Ta Lin
  • Patent number: 9029809
    Abstract: A movable microchamber system with a gas curtain is disclosed. The microchamber system has a top member with a light-access feature and a stage assembly that supports a substrate to be processed. The stage assembly is disposed relative to the top member to define a microchamber and a peripheral microchamber gap. An inert gas is flowed into the peripheral microchamber gap to form the gas curtain just outside of the microchamber. The gas curtain substantially prevents reactive gas in the ambient environment from entering the microchamber when the stage assembly moves relative to the top member.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 12, 2015
    Assignee: Ultratech, Inc.
    Inventors: Digby Pun, Ali Shajii, Andrew B. Cowe, Raymond Ellis, James T. McWhirter
  • Publication number: 20150111341
    Abstract: Laser annealing methods for integrated circuits (IC) are disclosed. In particular, an upper surface of an integrated circuit is annealed with a laser using a brief burst of light from the laser. In an exemplary embodiment, the brief burst of light from the laser lasts approximately fifty (50) to five hundred (500) microseconds. This brief burst will raise the temperature of the surface to approximately 1200° C.
    Type: Application
    Filed: January 8, 2014
    Publication date: April 23, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Yong Ju Lee, Yang Du
  • Patent number: 9012337
    Abstract: A system and method for maintain a desired degree of platen flatness is disclosed. A laser system is used to measure the flatness of a platen. The temperature of the platen is then varied to achieve the desired level of flatness. In some embodiments, this laser system is only used during a set up period and the resulting desired temperature is then used during normal operation. In other embodiments, a laser system is used to measure the flatness of the platen, even while the workpiece is being processed.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: April 21, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Shengwu Chang, Joseph C. Olson, Frank Sinclair, Matthew P. McClellan, Antonella Cucchetti
  • Patent number: 8987148
    Abstract: With a stage kept in an as-heated state, a semiconductor wafer is placed over the stage. Then, with the elapse of a first time, a controller causes a pressure inside a vacuum chamber to rise to a second pressure higher than a first pressure (step S40). After the semiconductor wafer is placed over the stage, a pressure difference between a pressure inside the vacuum chamber and a pressure inside an adsorption port is set to a minimum value at which the semiconductor wafer is not allowed to slide over protrusions. Further, in step S40 as well, the pressure difference is kept at the minimum value at which the semiconductor wafer is not allowed to slide over the protrusions.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: March 24, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Misato Sakamoto, Yoshitake Katou, Youichi Yamamoto, Takashi Kyouno, Chikara Yamamoto, Terukazu Motosawa, Mitsuo Maeda, Hiroshi Itou
  • Publication number: 20150056823
    Abstract: A display device is manufactured by forming a semiconductor film over a substrate and irradiating the film with laser light. The laser light is generated from an oscillator, passes through an attenuator that includes a filter, and passes through an optical system after passing through the attenuator. A first region of the semiconductor film is irradiated with the laser light passed through the optical system such that one point of the first region of the semiconductor film is irradiated with at least two shots. A second region of the semiconductor film is also irradiated with the laser light passed through the optical system such that one point of the second region of the semiconductor film is irradiated with at least two shots. The first region and the second region have a portion at which they overlap, and the semiconductor film is etched into semiconductor layers for transistors in areas outside the portion.
    Type: Application
    Filed: September 2, 2014
    Publication date: February 26, 2015
    Inventors: Shunpei Yamazaki, Koichiro Tanaka
  • Publication number: 20150037984
    Abstract: A laser annealing apparatus includes: a laser beam generator for providing a stable single-pulse laser; a cyclic delay unit (300) for splitting the single-pulse laser into several pulsed lasers; an optical module for converging one or more of the pulsed lasers on a substrate (204); and a movable stage (500) for providing the substrate (204) with movement in at least one degree of freedom. A laser annealing method includes: providing a stable single-pulse laser; splitting the single-pulse laser into several pulsed lasers according to a delay requirement and an energy ratio; and irradiating a substrate (204) successively with one or more of the pulsed lasers to keep a surface temperature of the wafer around the melting point or around a needed annealing temperature for a sufficiently long time during the annealing process, thus resulting in an improvement in both the laser energy utilization efficiency and effect of the annealing process.
    Type: Application
    Filed: July 19, 2013
    Publication date: February 5, 2015
    Inventors: Jun Zhang, Zhidan Li, Zhe Li
  • Patent number: 8937024
    Abstract: A process for producing at least one photonic component (32, 33, 35, 39, 41), includes inserting the photonic component (32, 33, 35, 39, 41) into a surface layer (12) of a semiconductor wafer and/or within a semiconductor wafer, especially of a semiconductor chip (11, 31, 34, 38, 40) for the simpler and more cost-effective production with the most desired possible three-dimensional structures. At least one laser beam (22) is coupled into the material of the surface layer (12) and/or of the semiconductor wafer, in which the laser beam (22) is focused at a predetermined depth in the material. At least one property of the material and/or the material structure is changed in the area of focus (23, 36).
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: January 20, 2015
    Assignee: BIAS Bremer Institut für angewandte Strahltechnik GmbH
    Inventors: Ralf Bergmann, Mike Bülters, Vijay Vittal Parsi Sreenivas
  • Patent number: 8932954
    Abstract: According to one embodiment, an impurity analysis method comprises performing vapor-phase decomposition on a silicon-containing film formed on a substrate, heating the substrate at a first temperature after vapor phase decomposition, heating the substrate at a second temperature higher than the first temperature after heating at the first temperature, to remove a silicon compound deposited on the surface of the silicon-containing film, dropping a recovery solution onto the substrate surface after heating at the second temperature and moving the substrate surface, to recover metal into the recovery solution, and drying the recovery solution, to perform X-ray fluorescence spectrometry on a dried mark.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: January 13, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuji Yamada, Makiko Katano, Chikashi Takeuchi, Tomoyo Naito
  • Publication number: 20150004808
    Abstract: The present disclosure is directed to methods and systems for processing a thin film samples. In an exemplary method, semiconductor thin films are loaded onto two different loading fixtures, laser beam pulses generated by a laser source system are split into first laser beam pulses and second laser beam pulses, the thin film loaded on one loading fixture is irradiated with the first laser beam pulses to induce crystallization while the thin film loaded on the other loading fixture is irradiated with the second laser beam pulses. In a preferred embodiment, at least a portion of the thin film that is loaded on the first loading fixture is irradiated while at least a portion of the thin film that is loaded on the second loading fixture is also being irradiated. In an exemplary embodiment, the laser source system includes first and second laser sources and an integrator that combines the laser beam pulses generated by the first and second laser sources to form combined laser beam pulses.
    Type: Application
    Filed: May 7, 2014
    Publication date: January 1, 2015
    Applicant: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventor: James S. IM
  • Patent number: 8912104
    Abstract: An integrated circuit may include a substrate in which transistors are formed. The transistors may be associated with blocks of circuitry. Some of the blocks of circuitry may be configured to reduce leakage current. A selected subset of the blocks of circuitry may be selectively heated to reduce the channel length of their transistors through dopant diffusion and thereby strengthen those blocks of circuitry relative to the other blocks of circuitry. Selective heating may be implemented by coating the blocks of circuitry on the integrated circuit with a patterned layer of material such as a patterned anti-reflection coating formed of amorphous carbon or a reflective coating. During application of infrared light, the coated and uncoated areas will rise to different temperatures, selectively strengthening desired blocks of circuitry on the integrated circuit.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: December 16, 2014
    Assignee: Altera Corporation
    Inventors: Deepa Ratakonda, Christopher J. Pass, Che Ta Hsu, Fangyun Richter, Wilson Wong
  • Patent number: 8906725
    Abstract: A method and apparatus for forming a crystalline semiconductor layer on a substrate are provided. A semiconductor layer is formed by vapor deposition. A pulsed laser melt/recrystallization process is performed to convert the semiconductor layer to a crystalline layer. Laser, or other electromagnetic radiation, pulses are formed into a pulse train and uniformly distributed over a treatment zone, and successive neighboring treatment zones are exposed to the pulse train to progressively convert the deposited material to crystalline material.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: December 9, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Stephen Moffatt
  • Publication number: 20140357093
    Abstract: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.
    Type: Application
    Filed: December 13, 2012
    Publication date: December 4, 2014
    Inventors: Didier Landru, Carole David, Ionut Radu, Lucianna Capello, Yann Sinquin
  • Patent number: 8889569
    Abstract: The disclosed systems and method for non-periodic pulse sequential lateral solidification relate to processing a thin film. The method for processing a thin film, while advancing a thin film in a selected direction, includes irradiating a first region of the thin film with a first laser pulse and a second laser pulse and irradiating a second region of the thin film with a third laser pulse and a fourth laser pulse, wherein the time interval between the first laser pulse and the second laser pulse is less than half the time interval between the first laser pulse and the third laser pulse. In some embodiments, each pulse provides a shaped beam and has a fluence that is sufficient to melt the thin film throughout its thickness to form molten zones that laterally crystallize upon cooling. In some embodiments, the first and second regions are adjacent to each other. In some embodiments, the first and second regions are spaced a distance apart.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: November 18, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: James S. Im, Ui-Jin Chung, Alexander B. Limanov, Paul C. Van Der Wilt
  • Patent number: 8883656
    Abstract: High throughput systems and processes for recrystallizing thin film semiconductors that have been deposited at low temperatures on a substrate are provided. A thin film semiconductor workpiece is irradiated with a laser beam to melt and recrystallize target areas of the surface exposed to the laser beam. The laser beam is shaped into one or more beamlets using patterning masks. The mask patterns have suitable dimensions and orientations to pattern the laser beam radiation so that the areas targeted by the beamlets have dimensions and orientations that are conducive to semiconductor recrystallization. The workpiece is mechanically translated along linear paths relative to the laser beam to process the entire surface of the work piece at high speeds. Position sensitive triggering of a laser can be used to generate laser beam pulses to melt and recrystallize semiconductor material at precise locations on the surface of the workpiece while it is translated on a motorized stage.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: November 11, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: James S. Im
  • Patent number: 8874254
    Abstract: An object of the present invention is to perform temperature setting of a heating plate so that a wafer is uniformly heated in an actual heat processing time. The temperature of a wafer is measured during a heat processing period from immediately after a temperature measuring wafer is mounted on the heating plate to the time when the actual heat processing time elapses. Whether the uniformity in temperature within the wafer is allowable or not is determined from the temperature of the wafer in the heat processing period, and if the determination result is negative, a correction value for a temperature setting parameter of the heating plate is calculated using a correction value calculation model from the measurement result, and the temperature setting parameter is changed.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: October 28, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Shuji Iwanaga, Nobuyuki Sata
  • Patent number: 8859443
    Abstract: The first flash irradiation is performed on a semiconductor wafer preheated to 500° C. to heat a front surface of the semiconductor wafer. Thereafter, the second flash irradiation is performed to reheat the front surface of the semiconductor wafer before the temperature of the front surface of the semiconductor wafer becomes equal to the temperature of a back surface of the semiconductor wafer. Thus, the second flash irradiation is performed before the temperature of the front surface of the semiconductor wafer falls. Even if less energy is consumable by the second flash irradiation, the efficiency of heating of the front surface of the semiconductor wafer resulting from each iteration of the flash irradiation is improved.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: October 14, 2014
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Kenichi Yokouchi
  • Patent number: 8822255
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 2, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
  • Patent number: 8809165
    Abstract: A method for fusing a laser fuse in accordance with various embodiments may include: providing a semiconductor workpiece having a substrate region and at least one laser fuse; fusing the at least one laser fuse from a back side of the substrate region by means of an infrared laser beam.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: August 19, 2014
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Gerhard Leschik
  • Publication number: 20140227890
    Abstract: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of the substrate. The image may be scanned across the surface to heat at least a portion of the substrate surface to achieve a desired temperature within a predetermined dwell time. Such processing may achieve a high efficiency due to the large proportion of energy contained in the uniform portion of the beam.
    Type: Application
    Filed: April 15, 2014
    Publication date: August 14, 2014
    Applicant: ULTRATECH, INC.
    Inventors: Andrew M. Hawryluk, Boris Grek, David A. Markle
  • Patent number: 8802550
    Abstract: First flash irradiation from flash lamps is performed on an upper surface of a semiconductor wafer supported on a temperature equalizing ring of a holder to cause the semiconductor wafer to jump up from the temperature equalizing ring into midair. While the semiconductor wafer is in midair above the temperature equalizing ring, second flash irradiation from the flash lamps is performed on the upper surface of the semiconductor wafer to increase the temperature of the upper surface of the semiconductor wafer to a treatment temperature. Cracking in the semiconductor wafer is prevented because the second flash irradiation is performed while the semiconductor wafer is in midair and subject to no restraints.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: August 12, 2014
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Kenichi Yokouchi
  • Patent number: 8796069
    Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Tatsuya Honda, Norihito Sone
  • Patent number: 8790942
    Abstract: One object is to provide a method for manufacturing a display device in which shift of the threshold voltage of a thin film transistor including an oxide semiconductor layer can be suppressed even when ultraviolet light irradiation is performed in the process for manufacturing the display device. In the method for manufacturing a display device, ultraviolet light irradiation is performed at least once, a thin film transistor including an oxide semiconductor layer is used for a switching element, and heat treatment for repairing damage to the oxide semiconductor layer caused by the ultraviolet light irradiation is performed after all the steps of ultraviolet light irradiation are completed.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: July 29, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Tsuji, Koji Moriya
  • Publication number: 20140206108
    Abstract: A flash heating part in a heat treatment apparatus includes 30 built-in flash lamps, and irradiates a semiconductor wafer held by a holder in a chamber with a flash of light. Thirty switching elements are provided in a one-to-one correspondence with the 30 flash lamps. Each of the switching elements defines the waveform of current flowing through a corresponding one of the flash lamps by intermittently supplying electrical charge thereto. Radiation thermometers measure an in-plane temperature distribution of the semiconductor wafer during flash irradiation. Based on the results of measurement with the radiation thermometers, a controller individually controls the operations of the 30 switching elements to individually define the light emission patterns of the 30 flash lamps.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 24, 2014
    Applicant: DAINIPPON SCREEN MFG. CO., LTD.
    Inventor: Hiroki KIYAMA
  • Patent number: 8772160
    Abstract: An object of the present invention is to provide an apparatus for successive deposition used for manufacturing a semiconductor element including an oxide semiconductor in which impurities are not included. By using the deposition apparatus capable of successive deposition of the present invention that keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Natsuko Takase
  • Patent number: 8759198
    Abstract: A method for fabricating an integrated circuit (IC) includes initial oxidizing of a semiconductor surface of a substrate. The substrate is heated after the initial oxidizing using a plurality of furnace processing steps which each include a peak processing temperature between 800° C. and 1300° C. The furnace processing steps include at least one accelerated processing step having an accelerated ramp portion in a temperature range between 800° C. and 1250° C. providing an accelerated ramp-up rate and/or an |accelerated ramp-down rate| of at least (?) 5.5° C./min.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: June 24, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Bradley David Sucher, Rick L. Wise
  • Publication number: 20140162467
    Abstract: Flash lamps connected to short-pulse circuits and flash lamps connected to long-pulse circuits are alternately arranged in a line. The duration of light emission from the flash lamps connected to the long-pulse circuits is longer than the duration of light emission from the flash lamps connected to the short-pulse circuits. A superimposing of a flash of light with a high peak intensity from the flash lamps that emit light for a short time and a flash of light with a gentle peak from the flash lamps that emit light for a long time can increase the temperature of even a deep portion of a substrate to an activation temperature or more without heating a shallow portion near the substrate surface more than necessary. This achieves the activation of deep junctions without causing substrate warpage or cracking.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 12, 2014
    Inventor: Kenichi Yokouchi
  • Patent number: 8736026
    Abstract: The present invention relates to a method of generating a hole or recess or well in an electrically insulating or semiconducting substrate, and to a hole or recess or well in a substrate generated by this method. The invention also relates to an array of holes or recesses or wells in a substrate generated by the method. The invention also relates to a device for performing the method according to the present invention.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: May 27, 2014
    Assignee: picoDrill SA
    Inventors: Christian Schmidt, Leander Dittmann
  • Patent number: 8735244
    Abstract: A method of forming a dielectric stack devoid of an interfacial layer includes subjecting an exposed interfacial layer provided on a semiconductor material to a low pressure thermal anneal process for a predetermined time period at a temperature of about 900° C. to about 1000° C. with an inert gas purge. A semiconductor structure is also disclosed, with a dielectric stack devoid of an interfacial layer.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Chudzik, Min Dai
  • Patent number: 8728831
    Abstract: A system and method for reducing warpage of a semiconductor wafer. The system includes a device for securing the semiconductor wafer in a heating area. The device includes a holding mechanism for securing an edge of the semiconductor wafer. The device further includes a pressure reducing device that reduces the pressure underneath the semiconductor device, which further secures the semiconductor device in the heating area. The heating area includes a plurality of heating and cooling zones in which the semiconductor wafer is subjected to various temperatures.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: May 20, 2014
    Assignee: STMicroelectronics Pte. Ltd.
    Inventors: Kah Wee Gan, Yonggang Jin
  • Publication number: 20140117489
    Abstract: Techniques are disclosed for sub-second annealing a lithographic feature to, for example, tailor or otherwise selectively alter its profile in one, two, or three dimensions. Alternatively, or in addition to, the techniques can be used, for example, to smooth or otherwise reduce photoresist line width/edge roughness and/or to reduce defect density. In some cases, the sub-second annealing process has a time-temperature profile that can effectively change the magnitude of resist shrinkage in one or more dimensions or otherwise modify the resist in a desired way (e.g., smooth the resist). The techniques may be implemented, for example, with any type of photoresist (e.g., organic, inorganic, hybrid, molecular photoresist materials) and can be used in forming, for instance, processor microarchitectures, memory circuitry, logic arrays, and numerous other digital/analog/hybrid integrated semiconductor devices.
    Type: Application
    Filed: December 29, 2011
    Publication date: May 1, 2014
    Inventors: Aravind S. Killampalli, Charles H. Wallace, Bernhard Sell
  • Patent number: 8703626
    Abstract: A method of manufacturing a semiconductor device, includes increasing adherence between a susceptor as a heating element, and a semiconductor substrate disposed on the susceptor, by using an adherence increasing mechanism, or increasing heat transmitted to a semiconductor substrate, which is disposed on a susceptor as a heating element, by using a transmitted-heat increasing mechanism; and heating the semiconductor substrate to have a predetermined temperature by heating the susceptor. The adherence increasing mechanism may include the susceptor and one of a heavy-weight stone disposed on the semiconductor substrate, a cap disposed on the semiconductor substrate and engaged with the susceptor, and an adhesive layer provided between the susceptor and the semiconductor substrate. The transmitted-heat increasing mechanism may include the susceptor and small pieces which are disposed on the semiconductor substrate and have radiated-light absorption ability.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: April 22, 2014
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Koichi Nishikawa, Masaaki Shimizu, Kenichi Nonaka, Seiichi Yokoyama, Hideki Hashimoto
  • Patent number: 8691605
    Abstract: A method and apparatus for forming a crystalline semiconductor layer on a substrate are provided. A semiconductor layer is formed by vapor deposition. A pulsed laser melt/recrystallization process is performed to convert the semiconductor layer to a crystalline layer. Laser, or other electromagnetic radiation, pulses are formed into a pulse train and uniformly distributed over a treatment zone, and successive neighboring treatment zones are exposed to the pulse train to progressively convert the deposited material to crystalline material.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 8, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Stephen Moffatt
  • Patent number: 8691623
    Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: April 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Tatsuya Honda, Norihito Sone
  • Patent number: 8664116
    Abstract: Ions of silicon are implanted into source/drain regions in a semiconductor wafer to amorphize an ion implantation region in the semiconductor wafer. A nickel film is deposited on the amorphized ion implantation region. First irradiation from a flash lamp is performed on the semiconductor wafer with the nickel film deposited thereon to increase the temperature of a front surface of the semiconductor wafer from a preheating temperature to a target temperature for a time period in the range of 1 to 20 milliseconds. Subsequently, second irradiation from the flash lamp is performed to maintain the temperature of the front surface of the semiconductor wafer within a ±25° C. range around the target temperature for a time period in the range of 1 to 100 milliseconds. This causes nickel silicide to grow preferentially in a direction perpendicular to the semiconductor wafer.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: March 4, 2014
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Kazuhiko Fuse, Shinichi Kato
  • Patent number: 8657961
    Abstract: Embodiments of the invention generally provide methods for cleaning a UV processing chamber. In one embodiment, the method includes flowing an oxygen-containing gas through a plurality of passages formed in a UV transparent gas distribution showerhead and into a processing region located between the UV transparent gas distribution showerhead and a substrate support disposed within the thermal processing chamber, exposing the oxygen-containing gas to UV radiation under a pressure scheme comprising a low pressure stage and a high pressure stage to generate reactive oxygen radicals, and removing unwanted residues or deposition build-up from exposed surfaces of chamber components presented in the thermal processing chamber using the reactive oxygen radicals.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: February 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Alexandros T. Demos, Scott A. Hendrickson, Sanjeev Baluja, Juan Carlos Rocha-Alvarez