By Differential Heating Patents (Class 438/799)
-
Publication number: 20010012702Abstract: A method of crystallizing a silicon film by which it is possible to obtain a polycrystalline silicon thin film having a uniform crystal structure and a good quality, and a method of manufacturing a thin film transistor-liquid crystal display (TFT-LCD) using the same. In the method of crystallizing the silicon film, an amorphous silicon film is formed on a substrate and a reflective film pattern is formed on the amorphous silicon film. The silicon film is crystallized by irradiating a laser onto the amorphous silicon film. The reflective film pattern is formed to expose the channel of the thin film transistor in the amorphous silicon film.Type: ApplicationFiled: October 14, 1998Publication date: August 9, 2001Inventor: HEON-JE KIM
-
Patent number: 6211089Abstract: Disclosed is a method for fabricating a smoothly surfaced GaN substrate. A GaN substrate is polished with diamond slurries and then, with boron carbide plates. The irreversible damaged layer which is caused by the mechanical polishing is removed by reactive ion etching, after which the GaN substrate is thermally treated to revive the recoverable damaged layer which is owed to the reactive ion etching. The resulting GaN substrate has a sufficiently smooth surface to allow subsequent thin films of high quality to grow thereon. Based on the GaN substrate of the present invention, blue light elements with excellent properties can be fabricated.Type: GrantFiled: September 21, 1999Date of Patent: April 3, 2001Assignee: LG Electronics Inc.Inventors: Chin Kyo Kim, Jae Hyung Yi
-
Patent number: 6207591Abstract: A silicon wafer is heated from an initial pre-heating temperature (T0) up to a first annealing temperature (T1) by a rapid heating up step using an IR lamp. A first annealing is executed at the first annealing temperature (T1). Successively, while the silicon wafer is maintained at a second annealing temperature (T2) lower than the first annealing temperature (T1), a second annealing step is executed by a resistive heating furnace. A thermal oxidation can be executed as the second annealing step. To do so, an equipment for manufacturing a semiconductor device in the present invention is provided with: a heating device having an IR lamp and a resistive heater; an annealing tube having on a surface thereof a plurality of concave portions in such a way that each bottom approaches a central line; a resistive heater wrapped around this annealing tube; and an IR lamp movably inserted into and pulled out from the concave portion from the external.Type: GrantFiled: November 13, 1998Date of Patent: March 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Nobutoshi Aoki, Ichiro Mizushima
-
Patent number: 6200913Abstract: This invention comprises improvements in the ways in which spin-on dielectric layers are cured. A semiconductor wafer is coated with a precursor for a spin-on dielectric material, and after the solution is thinned and evened, the wafer is placed in a curing oven, optionally containing an inert gas, and pre-heated to a temperature below which excessive thermomechanical stresses and/or oxidation are not created in the semiconductor wafer. The temperature within the curing oven is then raised to a curing temperature, and thereafter the temperature is slowly lowered to prevent the formation of stress cracks and the loss of dielectric function of the thin film. The curing method of this invention is useful for the manufacture of semiconductor devices employing a variety of spin-on materials.Type: GrantFiled: November 12, 1998Date of Patent: March 13, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Lu You, Simon S. Chan, John Iacoponi, Richard J. Huang, Robin Cheung
-
Patent number: 6194023Abstract: A method of manufacturing a poly-crystalline silicon (p-Si) film includes the steps in which an excimer laser anneals an amorphous silicon (a-Si) film deposited on a glass substrate and makes the same into the poly-crystalline silicon while the glass substrate is moved in a moving direction relative to the laser. Prior to carrying out the annealing step, a couple of the laser pulses are applied to different places of the a-Si film, provided that each of the laser pulses has different energy fluence and one pulse at a time is applied to the a-Si film. The pulse applied area is divided into two sections by a reference line perpendicular to the moving direction of the glass substrate. Average grain sizes of the p-Si film in the two sections are compared to each other to determine the moving direction.Type: GrantFiled: September 25, 1998Date of Patent: February 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Mitsuhashi, Yuki Matsuura, Takashi Fujimura, Nobuo Imai, Yasumasa Goto
-
Patent number: 6187665Abstract: A process sequence for forming a semiconductor device utilizes a passivation annealing process using deuterium which enhances immunity to hot carrier effects and extends device lifetime. The process sequence is carried out prior to the introduction of metal conductive films to the device. The process sequence includes a three-step passivation, de-passivation, re-passivation sequence and utilizes a barrier film to encapsulate deuterium molecules in the vicinity of a gate oxide, during the de-passivation operation.Type: GrantFiled: August 23, 1999Date of Patent: February 13, 2001Assignee: Lucent Technologies, Inc.Inventors: Sundar S. Chetlur, Pradip K. Roy, Anthony S. Oates, Sidhartha Sen, Jonathan Z-N. Zhou
-
Patent number: 6187616Abstract: In order to provide a method for fabricating semiconductor devices and a heat treatment apparatus in which stable annealing can be performed without causing harmful effects such as thermal stresses on an insulating substrate and the surface of a semiconductor thin film formed on the insulating substrate, in a heat treatment method for a substrate provided with an amorphous silicon film in the heating step, the substrate is preheated by irradiating the substrate from the side of one surface of the substrate with intermediate infrared rays having a wavelength band of 2.5 to 5 &mgr;m, and then, in the heat-treating step, the amorphous silicon film is annealed for crystallization at temperatures between 800 to 1,000° C. by irradiating the substrate from the side of the other surface of the substrate with near infrared rays having a wavelength band of 2.5 &mgr;m or less.Type: GrantFiled: October 13, 1999Date of Patent: February 13, 2001Assignee: Seiko Epson CorporationInventor: Kozo Gyoda
-
Patent number: 6174790Abstract: A method of dehydrogenating from and crystallizing a hydrogenated amorphous silicon layer by applying a laser beam having an improved profile which can process simultaneously dehydrogenation and crystallization on the amorphous silicon layer. The present invention including the step of scanning a laser beam with a predetermined overlap ratio onto amorphous silicon further includes the steps of carrying out dehydrogenation and crystallization simultaneously by means of controlling a scan length and a profile of the laser beam without damage on the amorphous silicon caused by hydrogen, wherein a variation rate of energy density of the laser beam in an energy density increasing region.Type: GrantFiled: December 15, 1998Date of Patent: January 16, 2001Assignee: LG. Philips LCD Co., Ltd.Inventor: Myoung-Su Yang
-
Patent number: 6159873Abstract: In a RTP (rapid Thermal Processing) of a large-diameter semiconductor wafer using a hot-wall type heating furnace, the temperature distribution of the wafer surface is made uniform by means of preliminarily heating a thermal storage plate(s) to a heat-treating temperature, and, then positioning the wafer between a pair of the thermal storage plates or in the direct proximity of a thermal storage plate. The wafer may be brought into contact with the thermal storage plate. The wafer is thus heated rapidly heated to the heat treating temperature.Type: GrantFiled: March 29, 1996Date of Patent: December 12, 2000Assignee: F.T.L. Co., Ltd.Inventor: Mikio Takagi
-
Patent number: 6103638Abstract: A method and apparatus for forming a planar layer on a surface of a microelectronic substrate. The method comprises controlling a temperature of a liquid support material to be at least an annealing temperature of material comprising the planar layer. In one embodiment, the planar layer material has a lower density than the liquid support material and the method further comprises floating the planar layer material upon the liquid support material so that the planar layer material attains a temperature of at least its annealing temperature. The planar layer material forms a planar surface at an interface with the support material and is adhered at an opposite surface to the substrate to form a planar layer thereon. In another embodiment, the planar layer material is adhered to a surface of the substrate.Type: GrantFiled: November 7, 1997Date of Patent: August 15, 2000Assignee: Micron Technology, Inc.Inventor: Karl M. Robinson
-
Patent number: 6083801Abstract: The nickel element is provided selectively, i.e., adjacent to part of the surface of an amorphous silicon film in a long and narrow opening. The amorphous silicon film is irradiated with linear infrared light beams emitted from respective linear infrared lamps while scanned with the linear beams perpendicularly to the longitudinal direction of the opening. The longitudinal direction of the linear beams are set coincident with that of the opening. The infrared light beams are absorbed by the silicon film mainly as thermal energy, whereby a negative temperature gradient is formed in the silicon film. The temperature gradient moves as the lamps are moved for the scanning. The direction of the negative temperature gradient is set coincident with the lamp movement direction and an intended crystal growth direction, which enables crystal growth to proceed parallel with a substrate uniformly over a long distance.Type: GrantFiled: February 10, 1998Date of Patent: July 4, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hisashi Ohtani
-
Patent number: 6066579Abstract: A heat treatment is performed in a hydrogen-gas containing atmosphere. A high-purity inert gas having a water content of not more than 2.57 ppm is used as a substitution gas for replacing a wafer-input air atmosphere and for replacing the hydrogen-gas containing atmosphere after the heat treatment.Type: GrantFiled: January 9, 1997Date of Patent: May 23, 2000Assignee: Toshiba Ceramics Co., Ltd.Inventors: Junichi Matsushita, Jun Yoshikawa, Masayuki Sanada, Tatsuya Shimizu
-
Patent number: 6063651Abstract: A method and apparatus for activating fusible links on a circuit substrate. The circuit substrate is supported in a fixture which is cooled to a below ambient temperature. Cooling of the circuit substrate decreases the absorption of energy by the substrate, permitting a smaller spot size laser beam having a lower wavelength to be employed for interrupting the fusible links. The substrate is cooled by a refrigeration coil in heat transfer with the fixture holding the substrate. Moisture formation is avoided by placing the substrate and laser source in a controlled atmosphere.Type: GrantFiled: February 3, 1998Date of Patent: May 16, 2000Assignee: International Business Machines CorporationInventors: Daniel Charles Edelstein, Chandrasekhar Narayan
-
Patent number: 6051512Abstract: A plurality of substrates is closely stacked together in a Rapid Thermal Processing (RTP) chamber, and the stack is processed simultaneously.Type: GrantFiled: April 11, 1997Date of Patent: April 18, 2000Assignee: Steag RTP SystemsInventors: Helmut Sommer, Manuela Zwissler, Herbert Kegel
-
Patent number: 6051483Abstract: The present invention is a method of utilizing microwave energy for annealing of ion implanted wafers. By controlling the time, power density and temperature regime, it is possible to substantially fully anneal the wafer while limiting (and substantially preventing) the diffusion of dopant into the silicon, thereby producing higher performance scaled semiconductor devices. It is also possible, using different conditions, to allow and control the dopant profile (diffusion) into the silicon. Another aspect of the present invention is a method of forming a PN junction in a semiconductor wafer having a profile depth less than about 50 nm and a profile wherein the net doping concentration at said PN junction changes by greater than about one order of magnitude over 6 nm wherein the surface concentration of said dopant is greater than about 1.times.10.sup.20 /cm.sup.3.Type: GrantFiled: June 4, 1997Date of Patent: April 18, 2000Assignee: International Business Machines CorporationInventors: Kam Leung Lee, David Andrew Lewis, Raman Gobichettipalayam Viswanathan
-
Patent number: 6048793Abstract: In a method and an appratus for a thin film growth on a semiconductor crystal substrate, impurities and contaminants absorbed on the inside wall of the reaction vessel are very harmful because these impurities and contaminants will deteriorate the quality of the thin film. A method and an apparatus by which the quantity of these impurities and contaminants absorbed on the inside wall of the reaction vessel can be restrained and removed easily are disclosed in this invention, wherein a semiconductor crystal substrate is mounted in the reaction vessel, and the wall of the reation vessel is cooled forcibly by a coolant while the substrate is under heating procedure to grow a thin film on the substrate by supplying the raw material gas into the reaction vessel. And the temperature of the wall of the reaction vessel during the procedure except the thin film growth is kept higher temperature than the temprature of the wall of the reaction vessel during the thin film growth procedure.Type: GrantFiled: October 23, 1995Date of Patent: April 11, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
-
Patent number: 6040211Abstract: A method for processing a semiconductor substrate to form a denuded zone therein. The method includes providing a semiconductor substrate having an oxygen concentration in a region of the substrate adjacent to a surface of such substrate. A trench is formed in the surface of the substrate. Subsequent to the formation of the trench, reducing the oxygen concentration within the region.Type: GrantFiled: June 9, 1998Date of Patent: March 21, 2000Assignee: Siemens AktiengesellschaftInventor: Martin Schrems
-
Patent number: 5960323Abstract: Laser anneal processing of a semiconductor layer is repeated in a number of steps. Grain size is increased using high energy ELA for a first step, and grain sizes are uniformed using ELA with low energy for a later step. As a defective crystallization region occurs in an excessive energy region during the ELA for the first step, in the ELA for the second time, excessive energy is removed and the defective crystallization region is eliminated by reducing the energy to an optimal value, thereby improving the crystallinity of a p-Si layer.Type: GrantFiled: June 17, 1997Date of Patent: September 28, 1999Assignee: Sanyo Electric Co., Ltd.Inventors: Ken Wakita, Hidenori Ogata
-
Patent number: 5930587Abstract: A method for accurately and objectively evaluating stress migration effects on long term reliability of integrated circuits. A sample containing a conductive runner is fabricated according to a given fabrication process. The fabricated sample undergoes a heating step at a first temperature for a first time period to induce material interactions at an accelerated rate, followed by cooling the sample to a second temperature and maintaining the second temperature for a time of sufficient duration such that relaxation occurs. Then the sample undergoes a heating process at a third temperature for a time sufficient to nucleate a predetermined number of voids, followed by heating the sample runner at a fourth temperature, less than than the third temperature, to propagate the voids such that a maximum void size is determined. Void distribution is preferably monitored by optical and scanning electron microscopy.Type: GrantFiled: August 27, 1997Date of Patent: July 27, 1999Assignee: Lucent TechnologiesInventor: Vivian W. Ryan
-
Patent number: 5895594Abstract: A method and device for heating silicon carrier bodies in a deposition reactor are by means of radiated heat. In this method, the carrier bodies are irradiated by means of a heat radiation device which emits radiation having a color temperature of at least 2000.degree. C.Type: GrantFiled: February 21, 1997Date of Patent: April 20, 1999Assignee: Wacker Chemie GmbHInventor: Paul Fuchs
-
Patent number: 5893760Abstract: A susceptor in a semiconductor wafer heat treatment apparatus holds a wafer such that the wafer is made flat at a heat treatment temperature. In particular, the susceptor is constituted by an elastic platy member which is convex upward with respect to the direction of the gravity. Therefore, when the wafer is subjected to a high-temperature heat treatment, a crystal defect in the wafer can be suppressed.Type: GrantFiled: March 26, 1997Date of Patent: April 13, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Yuichi Mikata, Akihito Yamamoto
-
Patent number: 5885905Abstract: A method of processing a semiconductor substrate includes the step of subjecting a semiconductor substrate to a heat treatment under a gaseous atmosphere. The method comprises the step of subjecting a semiconductor substrate to a heat treatment at temperatures not lower than 1100.degree. C. under a non-oxidizing atmosphere, wherein heat treatments before said heat treatment applied to the semiconductor substrate are applied under heat treating temperatures and heat treating time which fall within a region defined by a line connecting four points of (900.degree. C., 4 minutes), (800.degree. C., 40 minutes), (700.degree. C., 11 hours) and (600.degree.0 C., 320 hours) in a graph, in which the heat treating temperature is plotted on the abscissa and the heat treating time is plotted on the ordinate of the graph.Type: GrantFiled: January 4, 1996Date of Patent: March 23, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Souichi Nadahara, Kikuo Yamabe, Hideyuki Kobayashi, Kunihiro Terasaka, Akihito Yamamoto, Naohiko Yasuhisa
-
Patent number: 5859408Abstract: Support 7 is uniformly heated from underneath by an annular heater 8 having a vertically adjustable cooling disc 20 in the middle. This arrangement gives a very uniform temperature profile diametrically across the top of the support 7, useful in the production of semiconductor components 10 which are consistently heat treated wherever they are placed on the support 7.Support 7 is rotated and may be subjected to microwave irradiation from an overhead generator 3.Type: GrantFiled: December 27, 1996Date of Patent: January 12, 1999Assignee: BTG International LimitedInventor: Alan Richard Baxendine
-
Patent number: 5821157Abstract: A polycrystalline silicon (polysilicon) layer is fabricated by forming a polysilicon layer on a substrate, implanting argon into the polysilicon layer to selectively amorphize the polysilicon layer and recrystallizing the selectively amorphized polysilicon layer. The argon dosage and energy may be controlled so that the argon passes through the polysilicon layer into the substrate so that argon ions do not disturb recrystallization. By using argon amorphizing, excessive heating of the substrate during implantation is prevented and ion implanter contamination from conventional silicon implantation is prevented.Type: GrantFiled: April 16, 1996Date of Patent: October 13, 1998Assignee: Samsung Electronics Co., Ltd.Inventors: Joo-hyung Lee, Jae-jong Han
-
Patent number: 5811762Abstract: A heat pedestal is described for use in a physical vapor deposition/chemical vapor deposition system in which cooling gas, cooling water and heated gas are used to bring a semiconductor wafer to the desired low or high temperature. Use of the apparatus and method described leads to a very rapid transition from one temperature to another. Also achieved is a precise temperature control over a wide range yielding increased flexibility of process control.Type: GrantFiled: September 25, 1996Date of Patent: September 22, 1998Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jeng-Ding Tseng
-
Patent number: 5808272Abstract: A laser system (50) and processing method exploit a wavelength range (40) in which devices, including any semiconductor material-based devices (10) affected by conventional laser wavelengths and devices having light-sensitive or photo-electronic portions integrated into their circuits, can be effectively functionally trimmed without inducing performance drift or malfunctions in the processed devices. True measurement values of operational parameters of the devices can, therefore, be obtained without delay for device recovery, i.e., can be obtained substantially instantaneously with laser impingement. Accordingly, the present invention allows faster functional laser processing, eases geometric restrictions on circuit design, and facilitates production of denser and smaller devices.Type: GrantFiled: October 28, 1997Date of Patent: September 15, 1998Assignee: Electro Scientific Industries, Inc.Inventors: Yunlong Sun, Edward J. Swenson
-
Patent number: 5782942Abstract: An improved filter system, particularly for the furnaces of a semiconductor manufacturing plant, has a standby filter and a piping system for connecting it momentarily in parallel with a normally used filter of one of the furnaces. A system of valves permits the normal filter to be isolated from its furnace so that it can be allowed to cool and then removed and replaced. The filter system avoids the problem that a standby filter is otherwise required for each furnace or that the replacement can not be made at a convenient time.Type: GrantFiled: January 11, 1996Date of Patent: July 21, 1998Assignee: Vanguard International Semiconductor CorporationInventor: Wen-Kai Wu
-
Patent number: 5635414Abstract: Significant reduction in the cost of fabrication of shallow junction, Schottky or similar semiconductor devices without sacrifice of functional characteristics, while at the same time achieving the advantages is achieved, after the non-polishing cleaning step is essentially performed, by subjecting the substrate to conditions which move disadvantageous factors within said substrate into a space substantially at said surface, followed by substantially removing said factor-containing space from said substrate chemical removal step, followed etching and vapor deposition steps. Although these new steps add time, and therefore cost, to the overall process, the devices under discussion when produced by known industry processes require yet more time, and involve yet more expense, so that the total process represents a substantial reduction in the cost of their manufacture while producing devices which are the equivalent or superior in electrical performance to such devices which are made by known industry processes.Type: GrantFiled: March 28, 1995Date of Patent: June 3, 1997Inventors: Gregory Zakaluk, Dennis Garbis, Willem Einthoven, Joseph Chan, Jack Eng, Jun Wu, John Amato
-
Patent number: RE36371Abstract: In a method of forming a polycrystalline silicon film in a process of manufacturing an LCD, a hydrogenated amorphous silicon film is formed on a glass substrate by plasam CVD throughout areas serving as the pixel portion and driver unit of the LCD. A laser beam is radiated on a selected region of the film on the area serving as the driver unit. The energy of the laser beam is set such that hydrogen in the film is discharged without crystallizing the film and damaging the film. The energy of the laser beam is gradually increased to gradually discharge hydrogen from the film. The energy of the laser beam is finally set such that the film is transformed into a polycrystalline silicon film. The amorphous silicon film can be poly-crystallized without damaging the film by the discharge of hydrogen.Type: GrantFiled: December 13, 1996Date of Patent: November 2, 1999Assignee: Tokyo Electron LimitedInventors: Issei Imahashi, Kiichi Hama, Jiro Hata