Abstract: This invention relates to a thermal processing method including: a placing step of placing an object to be processed onto a stage arranged in a processing container that can be vacuumed; and a heating step of heating the object to be processed to a predetermined temperature. The object to be processed is heated under a state in which a temperature distribution is maintained in such a manner that a temperature at a central portion of the object to be processed is high while a temperature at a peripheral portion of the object to be processed is low, during at least a part of the heating step.

Abstract: A low resistance path extends from a first region of a semiconductor substrate to a second region thereof. The low resistance path is produced by depositing a metal such as aluminum on the surface of the substrate and then directing a laser beam onto the metal causing the metal and a portion of the substrate beneath the metal to melt forming an alloy of the metal and the substrate material.

Abstract: A purpose of the invention is to provide a method for leveling a semiconductor layer without increasing the number and the complication of manufacturing processes as well as without deteriorating a crystal characteristic, and a method for leveling a surface of a semiconductor layer to stabilize an interface between the surface of the semiconductor layer and a gate insulating film, in order to achieve a TFT having a good characteristic. In an atmosphere of one kind or a plural kinds of gas selected from hydrogen or inert gas (nitrogen, argon, helium, neon, krypton and xenon), radiation with a laser beam in the first, second and third conditions is carried out in order, wherein the first condition laser beam is radiated for crystallizing a semiconductor film or improving a crystal characteristic; the second condition laser beam is radiated for eliminating an oxide film; and the third condition laser beam is radiated for leveling a surface of the crystallized semiconductor film.

Abstract: A method and apparatus for controlling the temperature of at least one gas flowing into a processing chamber is provided. In one embodiment, a gas temperature control apparatus for semiconductor processing includes a gas delivery line coupled between a processing chamber and a gas source. An enclosure substantially encloses the gas delivery line and is adapted to flow a heat transfer fluid away from the processing chamber.

Abstract: A reflow process is provided for multiple units which improves productivity. A reflow furnace is moved along a transport direction of a tape substrate and is fixed at a position matching the product pitch of a circuit substrate. Any of a plurality of heating blocks and cooling blocks are matched to the product pitches of the circuit substrate. By doing so, it is possible to continuously carry out the reflow process for a tape substrate on which circuit substrates having different product pitches are arranged.

Abstract: The invention provides a method for activating impurity element added to a semiconductor and performing gettering process in shirt time, and a thermal treatment equipment enabling to perform such the heat-treating.

Abstract: Provided is a manufacturing process for an annealed wafer capable of elucidating a relationship between a tilt angle from a (100) plane of a wafer to be annealed and haze to set optimal tilt angles for suppression of haze and to improve a characteristic of a device from the annealed wafer as a result of the suppression of haze. A silicon mirror wafer having a surface orientation with a tilt angle in the range of 0.1 degree<&thgr;<0.2 degree from a (100) plane or a plane equivalent thereto is heat treated in an atmosphere of hydrogen gas, an inert gas, nitrogen gas or a mixed gas thereof.

Abstract: A laser annealing method for obtaining a crystalline semiconductor film having a large grain size is provided. Laser light is irradiated to the top surface and the bottom surface of an amorphous semiconductor film when crystallizing the amorphous semiconductor film by laser light irradiation. Furthermore, a relationship of 0<(I0′/I0)<1, or 1<(I0′/I0) is achieved for the ratio (I0/I0′) between the effective energy strength of the laser light when irradiated to the top surface (I0) and the effective energy strength of the laser light when irradiated to the bottom surface (I0′).

Abstract: A method of standardizing a fabrication process for an integrated circuit. The fabrication process includes a preceding thermal energy sensitive process and at least one set of selectable succeeding thermal energy delivery processes. An integrated circuit structure is formed using the preceding thermal energy sensitive process. The preceding thermal energy sensitive process is characterized based at least in part upon the greatest amount of thermal energy delivered to the integrated circuit by one of the set of selectable succeeding thermal energy delivery processes. Then as subsequent processes are selected and accomplished, if they do not deliver the greatest amount of thermal energy as anticipated by the preceding thermal energy sensitive process, an additional amount of thermal energy is added, so as to preferably equal the anticipated greatest amount of thermal energy. In this manner, the characterization of the preceding thermal energy sensitive process attains its desired parameters.

Abstract: A microelectronic assembly is made by bonding the tip ends of leads on a first element to bonding contacts on a second element. The tip ends of the leads are releasably connected to the first element, so that the leads are held in place during the bonding process. After bonding, the first and second elements are heated or cooled to cause differential thermal expansion, which breaks at least some of the releasable attachments of the tip ends, leaving the leads free to flex.

Abstract: The invention enables a layer of metal to be formed on a substrate with few or no voids formed in the layer, with increased throughput and without raising the temperature of the substrate to a level that may damage the substrate. A layer of metal can be formed on a substrate using a cold deposition step followed by a hot deposition step. The cold deposition step need only be performed for a time sufficient to deposit metal over the entire surface on which the metal layer is to be formed. In the hot deposition step, further metal is deposited while the substrate is rapidly heated to a target temperature. The rapid heating quickly mobilizes the atoms of the deposited metal, making the deposited metal far less susceptible to cusping and voiding than has been the case with previous methods for depositing a metal layer on a substrate that include a cold deposition step followed by a hot deposition step.

Abstract: A heat treatment apparatus for performing a heat treatment on one or more substrates includes a substrate support device holding the substrates, the substrate support device having a main body and a contact portion being in contact with a substrate. A surface of the main body is made of a material different from that of the contact portion, and at least a surface of the contact portion is made of either glassy carbon or graphite.

Abstract: A method and apparatus are provided for eliminating contaminants including metallic and/or hydrocarbon-containing contaminants on a surface of a semiconductor substrate by heating a semiconductor substrate which may have contaminates on the surface thereof to an elevated temperature within an integrated closed system while simultaneously purging the integrated closed system with a chlorine-containing gas. At the elevated temperatures the chlorine dissociates from the chlorine-containing gas and reacts with the contaminates on the substrate surface to form volatile chloride byproducts with such contaminants which are removed from the integrated closed system while the substrate is continuously heated and purged with the chlorine-containing gas. Subsequently, the substrate is moved to a cooling chamber within the integrated closed system and cooled to provide a semiconductor substrate having a clean surface.

Abstract: A laser processing process which comprises laser annealing a silicon film 2 &mgr;m or less in thickness by irradiating a laser beam 400 nm or less in wavelength and being operated in pulsed mode with a pulse width of 50 nsec or more, and preferably, 100 nsec or more.

Abstract: The present invention provides a method of selectively inhibiting the deposition of a conductive material within desired regions of a semiconductor device. A seed layer is rendered ineffective to the electroplating in select regions of the substrate, by either the removal or the poisoning of the seed layer in select regions.

Abstract: The invention is a method of determining a set temperature profile for a method of controlling respective substrate temperatures of a plurality of groups in accordance with respective corresponding set temperature profiles, in a method of heat processing a plurality of substrates that are classified into the plurality of groups.

Abstract: A method including introducing over a wafer a material having a crystalline form, identifying a crystal in the material of a desired lattice orientation, and configuring the material to the lattice orientation of the crystal. A system for growing a film on a substrate including a chamber, a laser light source coupled to the chamber and configured to direct a laser light into the chamber, and a processor coupled to the chamber comprising a machine readable medium including executable program instructions that when executed cause the processor to perform a method including identifying a crystal of a desired lattice orientation in a crystalline material introduced over a wafer, and configuring, the material to a lattice orientation of the identified crystal.

Abstract: A system, method and apparatus are described for improving critical dimension uniformity in baked substrates. The system, method and apparatus provide for varying the distance between a substrate to be baked and the surface of a hot plate such that an approximately uniform temperature is obtained in the substrate during baking. In one embodiment, the substrate is positioned on a hot plate having a recess generally centered on its top side. The differences in distance between the edges of the substrates contacting the hot plate and the distance between the center region of the substrate and the bottom of the recess enable a generally uniform temperature to be obtained in the substrate.

Abstract: A method of crystallizing an amorphous silicon thin film is disclosed including the steps of preparing a substrate having a conductive layer, depositing an amorphous silicon thin film on the substrate, forming a metal thin film selectively overlying the amorphous silicon thin film, and performing a heat treatment and application of electric field to the metal thin film; and a method of fabricating a thin film transistor including the steps of preparing a substrate having a conductive layer, forming an active layer of amorphous silicon on the substrate, forming a gate insulating layer and a gate electrode on the active layer, doping the active layer with a first conductivity type impurity using the gate electrode as a mask, forming a metal thin film on the entire surface of the substrate including the active layer doped with the impurity, and performing a heat treatment and applying electric field to the substrate including the metal thin film.

Abstract: To enable uniform heating of the wafer and to carry out heating of the guard ring with high efficiency using lamps of a light source part formed of wafer heating lamps and guard ring heating lamps, the distance between the guard ring heating lamps and the guard ring is made larger than the distance between the wafer heating lamps and the wafer. A side wall is formed with a mirror surface is located between the lamps for wafer heating and the lamps for heating the guard ring by which the light which was emitted from the guard ring heating lamps in the direction toward the wafer are reflected toward the guard ring. Furthermore, at the outer periphery of the guard ring heating lamps, a second side wall is formed which is used as a reflection surface. In addition, at the outer periphery of the guard ring, there is a second mirror by which the light emitted outward of the guard ring is focused back onto the guard ring.

Abstract: A method and apparatus for heat-treating a semiconductor substrate to heat different areas of the substrate at different temperatures. The method includes using an apparatus having a chamber of a refractory material; a support plate located at a lower side in the chamber for supporting the semiconductor substrate; a heating device disposed at an upper side in the chamber; and, a heat resistance mask provided between the support plate and fabricated to have different heat transmission rates therein.

Abstract: A method of fabricating a semiconductor device capable of fabricating a semiconductor device including a polycrystalline semiconductor film having excellent characteristics with a high yield is provided. A first amorphous semiconductor film is formed on a substrate. A conductive film is formed on the first amorphous semiconductor film. The conductive film is irradiated with an electromagnetic wave such as a high-frequency wave or a YAG laser beam thereby making the conductive film generate heat and converting the first amorphous semiconductor film to a first polycrystalline semiconductor film through the heat. Thus, polycrystallization is homogeneously performed without dispersion through the heat from the conductive film irradiated with the electromagnetic wave. Consequently, an excellent first polycrystalline silicon film can be formed with an excellent yield.

Abstract: A linear pulse laser beam to be applied to an illumination surface is so formed as to have, at the focus, an energy profile in the width direction which satisfies inequalities 0.5L1≦L2≦L1 and 0.5L1≦L3≦L1 where assuming that a maximum energy is 1, L1 is a beam width of two points having an energy of 0.95 and L1+L2+L3 is a beam width of two points having an energy of 0.70, L2 and L3 occupying two peripheral portions of the beam width. According to another aspect of the invention, a compound-eye-like fly-eye lens for expanding a pulse laser beam in a sectional manner is provided upstream of a cylindrical lens for converging the laser beam into a linear beam.

Abstract: A system and method for selectively increasing the thermal effect of a radiant energy source to the surface of an object relative to the substrate is described in the context of rapid thermal processing of semiconductor wafers, and apparatus produced therefrom. A radiation-absorptive atmosphere is introduced between the radiant energy source and the object to increase conductive heat transfer to the surface of the object and reduce the available radiant heat transfer to the substrate, thereby increasing the thermal effect to the surface relative to the substrate.

Abstract: A heating chamber assembly for heating or maintaining the temperature of at least one wafer, employs thick film heater plates stacked at an appropriate distance to form a slot between each pair of adjacent heater plate surfaces. The heating chamber assembly may be employed adjacent one or more processing chambers to form a preheat station separate from the processing chambers, or may be incorporated in the load lock of one or more such processing chambers. The thick film heater plates are more efficient and have a better response time than conventional heat plates. A chamber surrounding the stack of heater plates is pressure sealable and nay include a purge gas inlet for supply purge gas thereto under pressure. A door to the chamber opens to allow wafers to be inserted or removed and forms a pressure seal upon closing. The slots in the stack are alignable with the door for loading and unloading of wafers.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: A semiconductor producing apparatus is capable of quickly and accurately changing a controlled variable to a target value to thereby make the controlled variable quickly follow the target value. Moreover, the controlled variable and target value can be adjusted automatically, thus improving the productivity of a process. The semiconductor producing apparatus includes a PID adjustment section to which a target value and a detected control value are inputted through an adder, a pattern generation section having an approximate function for calculating a pattern output and making it possible to change the pattern output in accordance wit parameter values of the approximate function, and a switcher for switching between an output including at least an output of the pattern generation section and an output of the PID adjustment section to thereby generate an output.

Abstract: To provide a lamp annealing apparatus, which prevents clouding of a reflector, achieves stability of temperature for heat-treatment and prevents oxidization of a front surface of a semiconductor wafer. The lamp annealing apparatus includes a lamp unit 1 for heating at an upper portion of a chamber 10 and a reflector 7a for stabilizing temperature at a lower portion of the chamber 10. Process gas is supplied to a side of a front surface 21 of a semiconductor wafer 2 located and rotated on a rotating cylinder 4 in the chamber 10, and rear face gas for preventing clouding of the reflector 7a is supplied to a side of a rear surface 22 of the semiconductor wafer 2. There are further included mass flow controllers 15a to 15d for mixing gases to obtain a desire rear face gas. The rear face gas is flowed around the periphery of the reflector 7a to be exhausted.

Abstract: A heat treatment for diffusing impurity ions implanted into a silicon layer is performed at a heat treatment temperature which is less than an aggregation temperature of the silicon layer. A thermal aggregation of the silicon layer can be inhibited, thereby reducing a silicon deficiency of the silicon layer.

Abstract: It is possible to prevent lowering in productivity of thin-film transistors with no decrease in performance of the transistors. Provided are depositing an amorphous semiconductor film on a substrate, a first irradiating the amorphous semiconductor film with an energy-rich beam in an atmosphere of a gas containing an inert gas as a major component with a specific amount of oxygen, to change the amorphous semiconductor film into a polycrystalline semiconductor film, and a second irradiating the polycrystalline semiconductor film with an energy-rich beam in an atmosphere of a gas containing an inert gas as major component with oxygen of an amount less than the specific amount.

Abstract: A semiconductor device having a retrograde channel profile is achieved by forming a retrograde impurity region in the surface portion of a semiconductor substrate, and subsequently forming a semiconductor layer on the retrograde impurity region at a predetermined thickness. The thickness of the semiconductor layer is controlled to localize the retrograde impurity region and its impurity concentration peak at a predetermined depth, thereby reducing the device's susceptibility to “reverse short channel effects.

Abstract: In a method for fabricating a semiconductor device, a semiconductor wafer is thermally treated with a wafer treatment device. The semiconductor wafer is delivered with a conveyer to the wafer treatment device. The temperature of the conveyer is controlled to have an optimum temperature.

Abstract: A process for the formation of a cap layer for semiconductors with a low degree of contamination wherein the cap layer is easily formed on the surface of a semiconductor, and binding force thereof with the surface of the semiconductor is strong and stabilized, besides only the cap layer is selectively removed easily, comprises the steps of introducing nitrogen atom into a surface of a semiconductor; combining a component element of the semiconductor in the vicinity of the surface of the semiconductor into which the nitrogen atom has been introduced with the nitrogen atom to form a nitride compound being a compound of the component element of the semiconductor and the nitrogen atom; and utilizing the nitride compound as a cap layer for the surface of the semiconductor.

Abstract: A method is given to form a thin film on a surface of a semiconductor wafer. The surface has at least a first region, containing an inner portion of the wafer, and a second region, containing an outer portion of the wafer, and slopes outward from the first region to the second region. The method starts with performing an in-situ inert gas plasma treatment on the surface of the semiconductor wafer to generate different temperatures from the first region to the second region. Different deposition rates of a precursor A from the first region to the second region are thus generated so as to form a flat surface. Then a precursor A-chemical vapor deposition (CVD) process is performed to form the thin film with the flat surface immediately after performing the inert gas plasma treatment.

Abstract: The present invention includes a method for bonding one semiconductor surface to a second semiconductor surface. The method includes providing a first article that has a semiconductor surface and a second article that has a semiconductor surface. The semiconductor surfaces are annealed with an energy source wherein energy is confined to the semiconductor surfaces. The annealed surfaces are bonded to each other.

Abstract: In a method for fabricating a semiconductor device, a semiconductor wafer is thermally treated with a wafer treatment device, such as in a diffustion process. The semiconductor wafer is deliverd to the treatment device using a conveyor system. The conveyor system is operated in an arrangement consisting of at least two connected armatures and is operated with both heating and cooling elements. The heating and cooling element are implemented for optimal temperture control of the connected conveyor arms with respect to increase throughout while avoiding thermal shock.

Abstract: A strip-like first insulating layer is formed on a glass substrate, and a second insulating layer is formed on the first insulating layer. Furthermore, an island-like semiconductor layer is formed on the second insulating layer. The island-like semiconductor layer is crystallized by irradiation with laser light through both surfaces of the glass substrate.

Abstract: A method of removing an amorphous oxide from a surface of a monocrystalline substrate is provided. The method includes depositing a passivation material overlying the amorphous oxide. The monocrystalline substrate is then heated so that the amorphous oxide layer decomposes into at least one volatile species that is liberated from the surface.

Abstract: There is disclosed a heat treatment method for a silicon wafer in which the silicon wafer is heat treated in a reducing atmosphere through use of a rapid heating/rapid cooling apparatus. The silicon wafer is heat treated for a period of 1 to 60 seconds at a temperature in the range of 1200° C. to the melting temperature of silicon. The heat treatment method can reduce the density of COPs and micro-defects which serve as nuclei of oxidation induced stacking faults at the surface of the silicon wafer.

Abstract: A process for manufacturing polished-like first-grade semiconductor wafers is disclosed. The process greatly simplifies the amount of polishing required while producing high quality semiconductor wafers. After a semiconductor wafer is sliced from a single crystal ingot, lapped and ground, the wafer is subjected to a double side fine grinding operation, a micro-etching operation, and an annealing operation to significantly improve the quality of the front surface. To complete to process the semiconductor wafer is flash polished to impart a specular finish on the front surface. In accordance with the present invention the semiconductor wafers may also be produced having a denuded zone capable of internal gettering.

Abstract: The invention provides a method of fabricating a wafer including growing a single crystal layer comprising a III-V compound in a first chamber at a temperature above 350° C. A temperature of a surface of the single crystal layer is reduced to below about 350° C. in the first chamber. An indium arsenide layer is deposited on the single crystal layer, to form an intermediate structure, in the first chamber at a temperature below 350° C. and above 100° C. The intermediate structure is transferred to a second chamber. A surface of the intermediate structure is heated to a temperature above about 600° C. to remove substantially all of the indium arsenide layer and impurities collected in the indium arsenide layer during the transfer to the second chamber. Another material is deposited on the single crystal layer in the second chamber.

Abstract: The object of the present invention is to develop a manufacturing process for fabricating thin film transistors by using a crystalline semiconductor film appropriately for the purpose, in which the crystalline semiconductor film is formed by using a catalyst which enables crystallization at a low temperature and is easily gettered. Low temperature crystallization is realized by introducing Cu, a catalyst, on the amorphous semiconductor film and performing a heat treatment. Cu is gettered by immersing the polycrystalline semiconductor film which slightly includes Cu into a chemical fluid selected from a group consisting of a chemical including oxygen namely sulfuric acid.

Abstract: In a deposited film forming process or apparatus, a deposited film is formed on a film-forming substrate by reduced-pressure vapor phase growth. The film-forming substrate is set on an auxiliary substrate and an auxiliary-substrate cap member is set at the upper part thereof. A maximum temperature difference between temperature at the upper end of the film-forming substrate and the temperature at the lower end of the auxiliary-substrate cap member provided on the film-forming substrate at its upper part is so controlled as to be not greater than a prescribed value so that a film deposited on the auxiliary-substrate cap member is improved in adhesion. Any deposits of films on the part other than the film-forming substrate can be prevented from coming off and scattering on the film-forming substrate so that deposited films having uniform film thickness and film quality can steadily be formed and also faulty images can occur less frequently.

Abstract: Floating wafer provided with heating elements which, by means of a controller, keep the walls of the floating wafer reactor at the desired temperature. By means of the sensors arranged in the walls, this temperate is kept substantially constant. To compensate for the temperature drop occurring during the entering of a wafer, which is caused by the absorption of warmth by the comparatively cold wafer, and to limit temperature variation in the processing area as much as possible, it is proposed to immediately supply an amount of energy to the heating elements, independently of the reaction of the sensors, during entering of the wafer.

Abstract: A process for forming a junction termination extension (JTE) oxide having reduced total oxide charge and SiO2—Si interface trap density parameters uses precursor densified thin oxide layers, to improve the quality of subsequently formed thicker oxide layers, and multiple anneals to remove implant damage and set geometry parameters. After formation of a first dual oxide layer, and a post-oxidation anneal, the oxide is patterned and JTE regions are implanted. Implant-based near surface crystalline damage is annealed out in a non-oxidizing ambient, and JTE dopants are partially driven into adjoining material of the substrate. A thin dense bulk precursor oxide layer is grown on the exposed JTE dopant-implanted surface portions of the substrate, followed by forming the bulk of the JTE oxide in a steam or wet oxygen atmosphere. The substrate is then annealed in a non-oxidizing ambient, to cause a further drive-in of the JTE dopants. The associated reduction in Qox and Dit improves high voltage edge stability.

Abstract: The invention enables a layer of metal to be formed on a substrate with few or no voids formed in the layer, with increased throughput and without raising the temperature of the substrate to a level that may damage the substrate. A layer of metal can be formed on a substrate using a cold deposition step followed by a hot deposition step. The cold deposition step need only be performed for a time sufficient to deposit metal over the entire surface on which the metal layer is to be formed. In the hot deposition step, further metal is deposited while the substrate is rapidly heated to a target temperature. The rapid heating quickly mobilizes the atoms of the deposited metal, making the deposited metal far less susceptible to cusping and voiding than has been the case with previous methods for depositing a metal layer on a substrate that include a cold deposition step followed by a hot deposition step.

Abstract: A process for forming a junction termination extension (JTE) oxide having reduced total oxide charge and SiO2—Si interface trap density parameters uses precursor densified thin oxide layers to improve the quality of subsequently formed thicker oxide layers, and multiple anneals to remove implant damage and set geometry parameters. After formation of a first dual oxide layer, and a post-oxidation anneal, the oxide is patterned and JTE regions are implanted. Implant-based near surface crystalline damage is annealed out in a non-oxidizing ambient, and JTE dopants are partially driven into adjoining material of the substrate. A thin dense bulk precursor oxide layer is grown on the exposed JTE dopant-implanted surface portions of the substrate, followed by forming the bulk of the JTE oxide in a steam or wet oxygen atmosphere. The substrate is then annealed in a non-oxidizing ambient, to cause a further drive-in of the JTE dopants. The associated reduction in Qox and Dit improves high voltage edge stability.

Abstract: The invention relates to a process and a device for the production of electrically conductive passages in semiconductor components preferably positioned on a semiconductor, by means of thermo-migration through the production of a temperature gradient between two opposing outer surfaces of the semiconductor components and application of a conductive doping substance to a cooler outer surface. One outer surface of the semiconductor is positioned on a cooled sample take-up and the opposing outer surface is exposed to heat radiation, which can be controlled both with regard to its total efficiency and its efficiency distribution over the surface of the semiconductor. The total efficiency and/or the efficiency distribution of the heat radiation is adjusted depending upon the temperature measured on at least one temperature measurement point on the semiconductor and/or a semiconductor component.

Abstract: A Pb3GeO5 phase PGO thin film is provided. This film has ferroelastic properties that make it ideal for many microelectromechanical applications or as decoupling capacitors in high speed multichip modules. This PGO film is uniquely formed in a MOCVD process that permits a thin film, less than 1 mm, of material to be deposited. The process mixes Pd and germanium in a solvent. The solution is heated to form a precursor vapor which is decomposed. The method provides deposition temperatures and pressures. The as-deposited film is also annealed to enhanced the film's ferroelastic characteristics. A ferroelastic capacitor made from the present invention PGO film is also provided.

Abstract: A method of manufacturing a TFT (10) is disclosed comprising source (8) and drain (8″) electrodes joined by a semiconductor channel (6) formed from a semiconductor layer (4), a gate insulating layer (7) and a gate electrode (8′). The method comprising the steps of applying a foil (2) comprising a crystallisation enhancing material (CEM) and depositing the semiconductor layer (4) over a supporting substrate (1); and heating the semiconductor layer (4) so as to crystallise the semiconductor layer (4) from regions exposed to the CEM of the foil (2). The method may further comprise the step of providing a patterned barrier layer (3) between the foil (2) and the semiconductor layer (4) wherein the semiconductor layer (4) is crystallised from regions exposed through vias in the barrier layer (3) to the CEM of the foil (2).