Lateral Series Connected Array Patents (Class 438/80)
  • Patent number: 6150683
    Abstract: The blue signal of a CMOS-based color pixel is increased with respect to the red and green signals by lowering the doping concentration of the surface regions of the pn-junction photodiodes that are used in the blue imaging cells with respect to the surface regions of the pn-junction photodiodes that are used in the red and green imaging cells.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: November 21, 2000
    Assignee: Foveon, Inc.
    Inventors: Richard Billings Merrill, Kevin Brehmer
  • Patent number: 6150284
    Abstract: A method of forming an organic polymer insulator in a semiconductor device comprises the step of causing a thermal polymerization of at least one kind of monomers and oligomers supplied in vapor phase.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventor: Jun Kawahara
  • Patent number: 6093884
    Abstract: For facilitating work and improving durability of a grounding conductor without a need for preparation of a separate grounding conductor for grounding a solar cell array, a solar cell array is provided comprising a plurality of solar cell modules each comprising a solar cell element and an electroconductive outer portion, the plurality of solar cell modules being electrically connected by an electric wire, wherein the electric wire has a plurality of cores, at least one of the cores being connected to an electric connection portion for leading a power of the solar cell elements out and at least one of the cores being connected to a grounding portion.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: July 25, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Fumitaka Toyomura, Tatsuo Fujisaki, Yoshitaka Nagao, Shigenori Itoyama
  • Patent number: 6080928
    Abstract: An insulating film is formed on a conductive substrate, a conductor film is deposited on the insulating film, and a plurality of first electrodes are formed by forming at least one groove in the conductor film. A transparent layer is so formed as to cover the first electrodes and bury the groove formed in the conductor film. A photovoltaic layer is formed on the transparent layer, and an ITO film is deposited on the photovoltaic layer. A plurality of second electrodes are formed by forming at least one groove in the ITO film in parallel with the groove formed in the conductor film. A groove or a hole extending through at least the photovoltaic layer is formed between the two parallel grooves, and a conductive material is filled in this groove or hole, thereby electrically connecting the first and second electrodes adjacent to each other. Since the groove for separating the adjacent first electrodes is buried with the transparent layer, no defects occur due to the step in the groove.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: June 27, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katsumi Nakagawa
  • Patent number: 6069313
    Abstract: A plurality of series-connected elements are arranged, as parallel elongated stripes, on a common electrically insulating transparent substrate (1). Each element comprises a photoanode (4), a porous counterelectrode or cathode (6) and an intermediate electrically insulating porous layer (5) separating the photoanode (4) from the cathode (6). The pores of the intermediate layer (5), the photoanode (4) and the cathode (6) are at least partially filled with an electron transferring electrolyte. An intermediate layer (2) of a transparent electrically conducting material is interposed between the substrate (1) and each photoanode (4). The cathode (6) of the first photovoltaic element of the series is electrically connected with a first terminal (9) of the battery. The cathode (6) of each following element is connected with the intermediate conducting layer (2) of the preceding element, over a gap (3) separating the respective intermediate layers (2) of these two elements.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: May 30, 2000
    Assignee: Ecole Polytechnique Federale de Lausanne
    Inventor: Andreas Kay
  • Patent number: 5972732
    Abstract: Methods for "monolithic module assembly" which translate many of the advantages of monolithic module construction of thin-film PV modules to wafered c-Si PV modules. Methods employ using back-contact solar cells positioned atop electrically conductive circuit elements affixed to a planar support so that a circuit capable of generating electric power is created. The modules are encapsulated using encapsulant materials such as EVA which are commonly used in photovoltaic module manufacture. The methods of the invention allow multiple cells to be electrically connected in a single encapsulation step rather than by sequential soldering which characterizes the currently used commercial practices.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: October 26, 1999
    Assignee: Sandia Corporation
    Inventors: James M. Gee, Stephen E. Garrett, William P. Morgan, Walter Worobey
  • Patent number: 5798284
    Abstract: Disclosed is a process for fabricating an array of photovoltaic elements connected in series, which can be used as a high-efficiency solar battery, at low cost and with high reliability. The process for fabricating the array of photovoltaic elements connected in series is characterized in that a step (.alpha.) for forming insulating strips of second electrode material is carried out by immersing in a solution a substrate having a first electrode thereon, and on which the second electrode is deposited, and an opposed electrode of a concentrated electric field type positioned opposite the surface of the second electrode in the vicinity thereof and applying a voltage between the first electrode and the opposed electrode. Further, it is characterized in that a step (.beta.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: August 25, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katsumi Nakagawa
  • Patent number: 5654202
    Abstract: A solid state image sensor is described which includes a planarizing layer incorporated into a means of color separation. The planarizing layer has been found to provide a smooth, uniform surface for coating and adhesion of a color separator within the active device area. The planarizing layer remains on the completed device and is patterned to permit access to bonding pads. Negative photoresist materials, photoinitiated polymerization imaging systems and positive imaging systems may be selected for use as the planarizing layer.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: August 5, 1997
    Assignee: Eastman Kodak Company
    Inventors: Robert Curtis Daly, Jeffrey Carlyle Blood
  • Patent number: 5626686
    Abstract: A thin-film solar cell includes an insulating flexible substrate, a plurality of photoelectric conversion regions each having a rear electrode layer, an amorphous semiconductor layer and a transparent electrode layer, formed in this order on a first surface of the substrate, and a connecting electrode layer formed on a second surface of the substrate, so as to extend over two adjacent photoelectric conversion regions. The rear electrode layer is connected with the connecting electrode layer, through extended parts thereof deposited on an inner wall of a first hole formed through the rear electrode layer, substrate and the connecting electrode layer. The amorphous semiconductor layer includes an extended portion covering a surface of a portion of the connecting electrode layer located on a periphery of the first hole.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: May 6, 1997
    Assignee: Fuji Electric Co. Ltd.
    Inventor: Takashi Yoshida