Lateral Series Connected Array Patents (Class 438/80)
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Publication number: 20030121542Abstract: Known methods of producing large-surface integrated thin-film solar modules with an amorphous, poly- or microcrystalline absorber layer always comprise division and conversion structuring processes which can cause instabilities in the structuring and which are relatively expensive. According to the inventive method which can be used to fabricate substrate solar cells (116) and superstrate solar cells, the mask (100) which is used provides for structuring itself during the deposition of layers for the rear electrode (106) and the absorber layer (11) through its geometrical form. The use of a mask (110) which can be reused as an independent element after use in this method allows for a relatively free range of possible geometric forms. This also makes possible applications inside and outside of buildings, including in the area of a window, from an esthetic and informal point of view.Type: ApplicationFiled: October 28, 2002Publication date: July 3, 2003Inventors: Wolfgang Harneit, Arnulf Jaeger-Waldau, Martha Christina Lux-Steiner
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Patent number: 6586271Abstract: A method of manufacturing a solar cell module includes the use of low cost polymeric materials with improved mechanical properties. A transparent encapsulant layer is placed adjacent a rear surface of a front support layer. Interconnected solar cells are positioned adjacent a rear surface of the transparent encapsulant layer to form a solar cell assembly. A backskin layer is placed adjacent a rear surface of the solar cell assembly. At least one of the transparent encapsulant layer and the backskin layer are predisposed to electron beam radiation.Type: GrantFiled: February 9, 2001Date of Patent: July 1, 2003Assignee: Evergreen Solar, Inc.Inventor: Jack I. Hanoka
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Publication number: 20030106579Abstract: A solar cell array is provided having a lattice or matrix structure such that no two solar cell devices are connected purely in series or purely in parallel. Accordingly, if a single solar cell device fails, there is an alternate path by which the output power of all other solar cell devices may contribute to the total output power of the solar cell array. Also, the power output of the entire array is much less sensitive to a low voltage or current for a single solar cell device than in a conventional array where devices are connected in series and in parallel. Beneficially, current setting devices, such as resistors, are provided for better matching the voltages and currents within the array, although in some applications, the resistors can be eliminated, or set to zero. The lattice or matrix structures may be extended in one, two, and three-dimensional patterns.Type: ApplicationFiled: December 6, 2001Publication date: June 12, 2003Applicant: Koninklijke Philips Electronics N.V.Inventor: Chin Chang
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Patent number: 6573157Abstract: A manufacturing method of semiconductor devices, micromachines such as semiconductor device, narrow pitch connectors, electrostatic actuators or piezoelectric actuators, and ink jet heads, ink jet printers, liquid crystal panels, and electronic appliances, including them characterized in that short circuit due to dusts floating in the air will not take place. In a method where a silicon wafer (30) undergoes dicing to manufacture semiconductor devices (20), a groove (30a) covered by an insulating layer and spanning a dicing line is formed in the above described silicon wafer, and the silicon wafer undergoes dicing along the dicing line.Type: GrantFiled: December 13, 2000Date of Patent: June 3, 2003Assignee: Seiko Epson CorporationInventor: Eiichi Sato
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Publication number: 20030096445Abstract: A TFT array is formed on a glass substrate (step P1). A surface protection layer is formed on the glass substrate so as to cover the TFT array (step P2). The glass substrate is divided to form active matrix substrates with the surface protection layer being provided (step P3). The divided active matrix substrate is chamfered along its edges (step P4). The surface protection layer is removed from the active matrix substrate (step P5). An X-ray conductive layer is formed on the TFT array where the surface protection layer has been removed (step P6). By these steps, pollutants produced during the division and chamfering of the glass substrate are prevented from polluting the TFT array and the X-ray conductive layer, and the active element array and the semiconductor layer is prevented from deteriorating in terms of performance in manufacturing process for a two-dimensional image detector.Type: ApplicationFiled: December 27, 2002Publication date: May 22, 2003Applicant: Sharp Kabushiki KaishaInventors: Yoshihiro Izumi, Osamu Teranuma, Toshinori Yoshimuta, Shinya Hirasawa
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Publication number: 20030082844Abstract: The present invention provides a polishing endpoint detection system, for use with a polishing apparatus, a method of determining a polishing endpoint of a surface located on a semiconductor wafer, and a method of manufacturing an integrated circuit on a semiconductor wafer. In one embodiment, the polishing endpoint detection system includes a carrier head having a polishing platen associated therewith. Also, the detection system includes a signal emitter located adjacent one of the carrier head or polishing platen. The signal emitter is configured to generate an emitted signal capable of traveling through an object to be polished. In addition, the detection system includes a signal receiver located adjacent another of the carrier head or polishing platen. The signal receiver is configured to receive the emitted signal from which a change in a signal intensity of the emitted signal can be determined.Type: ApplicationFiled: October 25, 2001Publication date: May 1, 2003Applicant: Agere Systems Inc.Inventors: Annette M. Crevasse, William G. Easter, Frank Miceli, Yifeng Winston Yang
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Patent number: 6555739Abstract: A photovoltaic array includes a plurality of solar cells electrically coupled in series with one another via a plurality of electrically conductive interconnect members and end members. The solar cells and interconnect members are bonded to the array surface of a substrate with double-sided pressure sensitive adhesive, and the interconnect members and end members are electrically coupled to the solar cells via a dry electrical contact. The method of manufacturing the array reduces complexity, time, and costs.Type: GrantFiled: September 10, 2001Date of Patent: April 29, 2003Assignee: Ekla-Tek, LLCInventor: Elias Kawam
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Publication number: 20030047206Abstract: A photovoltaic array includes a plurality of solar cells electrically coupled in series with one another via a plurality of electrically conductive interconnect members and end members. The solar cells and interconnect members are bonded to the array surface of a substrate with double-sided pressure sensitive adhesive, and the interconnect members and end members are electrically coupled to the solar cells via a dry electrical contact. The method of manufacturing the array reduces complexity, time, and costs.Type: ApplicationFiled: September 10, 2001Publication date: March 13, 2003Inventor: Elias Kawam
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Patent number: 6531653Abstract: A high solar flux photovoltaic concentrator receiver is disclosed for the generation of high electrical power at high efficiency for public and private use. The invention uses a wraparound interconnect to allow direct bonding of concentrator solar cells to a heat sink with solder or conductive epoxy. This approach allows series or parallel interconnection between multiple cells and provides for high thermal conductance to improve cooling the solar cells. Cooling the solar cells under high concentration of solar energy increases their electrical efficiency. A highly conductive di-electric is utilized to insulate the cell backs from the metal heat sink. The invention minimizes obscuration losses, improves thermal conduction, reduces coefficient of thermal expansion stresses, and can be produced at reduced manufacturing costs.Type: GrantFiled: September 11, 2001Date of Patent: March 11, 2003Assignee: The Boeing CompanyInventors: Gregory S. Glenn, Raed Sherif
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Publication number: 20030041893Abstract: A method and an apparatus for manufacturing a highly-versatile solar cell with excellent yields and productivity are provided. The method includes forming a belt-like first electrode layer on a substrate, forming a belt-like semiconductor layer on the first electrode layer, and forming a belt-like second electrode layer on the semiconductor layer. At least one electrode layer selected from the first electrode layer and the second electrode layer is divided by (a) applying a liquid resist so as to form a striped resist pattern, (b) forming the at least one electrode layer so as to cover the resist pattern, and (c) removing both the resist pattern and the at least one electrode layer formed on the resist pattern.Type: ApplicationFiled: August 28, 2002Publication date: March 6, 2003Applicant: Matsushita Electric Industrial Co. Ltd.Inventors: Shinichi Shimakawa, Masahiro Muro, Takuya Satoh, Takayuki Negami
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Publication number: 20030034062Abstract: Provided are methods of manufacturing an electrostatically clean solar array panel and the products resulting from the practice of these methods. The preferred method uses an array of solar cells, each with a coverglass where the method includes machining apertures into a flat, electrically conductive sheet so that each aperture is aligned with and undersized with respect to its matched coverglass sheet and thereby fashion a front side shield with apertures (FSA). The undersized portion about each aperture of the bottom side of the FSA shield is bonded to the topside portions nearest the edges of each aperture's matched coverglass. Edge clips are attached to the front side aperture shield edges with the edge clips electrically and mechanically connecting the tops of the coverglasses to the solar panel substrate. The FSA shield, edge clips and substrate edges are bonded so as to produce a conductively grounded electrostatically clean solar array panel.Type: ApplicationFiled: August 14, 2002Publication date: February 20, 2003Inventors: Theodore Garry Stern, Duane Eric Krumweide
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Patent number: 6521823Abstract: In a solar cell, there is provided a method of improving external appearance quality by lowering surface reflection and by making a change of a color tone at openings and portions between electrode patterns, resulting from integrating working, inconspicuous. In the solar cell, at the openings and the portions between the electrode patterns resulting from the integrating working, when seen from a light incident side, since the number of laminated films or the materials are different, colors in appearance become different among the respective regions. In the present invention, an insulating resin layer, a rear electrode layer, a sealing resin layer, and the like are colored by containing pigments or the like so that the colors thereof become similar to the color of a region of a structural portion occupying the great part of the solar cell.Type: GrantFiled: December 21, 2000Date of Patent: February 18, 2003Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuichi Kubota, Kazuo Nishi
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Patent number: 6515216Abstract: The present invention provides a photovoltaic device assembly comprising a plurality of photovoltaic devices connected with one another, wherein no rectangular corner part is formed in the peripheral parts of the photovoltaic device assembly itself and the shape of the peripheral parts of the photovoltaic devices is composed of straight lines and curved lines connecting the straight lines to one another, thereby preventing penetration owing to the effects of manufacture, installation, transportation, handling, and the state after installation of the solar cell module.Type: GrantFiled: July 3, 2001Date of Patent: February 4, 2003Assignee: Canon Kabushiki KaishaInventors: Hideaki Zenko, Ichiro Kataoka, Satoru Yamada, Hidenori Shiotsuka
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Publication number: 20030022414Abstract: A opto-electronic semiconductor structure having an electrochromic switch includes a monocrystalline silicon substrate and an amorphous oxide material overlying the monocrystalline silicon substrate. A monocrystalline perovskite oxide material overlies the amorphous oxide material and a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material. An optical source component that is adapted to transmit radiant energy may be formed within the monocrystalline compound semiconductor material. An electrochromic switch may be optically coupled to the optical source component. An optical detector component that is adapted to receive radiant energy may be formed within the monocrystalline compound semiconductor material. An electrochromic switch may be optically coupled to the optical detector component.Type: ApplicationFiled: July 25, 2001Publication date: January 30, 2003Applicant: MOTOROLA, INC.Inventors: Keryn Lian, Marc Chason, Daniel Gamota, Barbara Foley Barenburg
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Publication number: 20030005954Abstract: A semiconductor crystal substrate is fixed in a bent state to a support body. Preferably, the semiconductor crystal substrate is bonded to a transparent resin member provided between a surface cover member and a back cover member.Type: ApplicationFiled: July 2, 2002Publication date: January 9, 2003Inventors: Makiko Emoto, Akio Shibata
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Patent number: 6486521Abstract: A photodiode with an optimized floating P+ region for a CMOS image sensor. The photodiode is constructed with a P+/Nwell/Psub structure. The Nwell/Psub junction of the photodiode acts as a deep junction photodiode which offers high sensitivity. The P+ floating region passivates the silicon surface to reduce dark currents. Unlike a traditional pinned photodiode structure, the P+ region in the present invention is not connected to the Pwell or Psub regions, thus making the P+ region floating. This avoids the addition of extra capacitance to the cell. The photodiode may be included as part of an active pixel sensor cell, the layout of which is fully compatible with the standard CMOS fabrication process. This type of active pixel sensor cell includes the photodiode, and may be configured with a three transistor configuration for reading out the photodiode signals.Type: GrantFiled: October 2, 2001Date of Patent: November 26, 2002Assignee: OmniVision Technologies, Inc.Inventors: Tiemin Zhao, Xinping He, Datong Chen
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Publication number: 20020166580Abstract: The present invention provides a solar tile and method for fabricating the same. The solar tile includes a flexible circuit having at least one electrically conductive path laminated between two insulating sheets. The flexible circuit includes a plurality of openings that are completely through the flexible circuit and define contact locations with the electrically conductive path. The solar tile also includes a plurality of coplanar photovoltaic solar cells that are secured to the flexible circuit so that the contacts are aligned with the openings in the flexible circuit. Further, the solar tile includes a plurality of electrically conductive solder connections located within the openings in the flexible circuit to electrically connect the solar cell contacts and the electrically conductive path. Additionally, in a preferred embodiment, the solar tile includes a single coverslide situated adjacent and covering the plurality of solar cells opposite the flexible circuit.Type: ApplicationFiled: June 26, 2002Publication date: November 14, 2002Applicant: The Boeing CompanyInventors: John Scott Bauman, Craig S. Flora
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Publication number: 20020153037Abstract: An electric power generating film and a method of fabrication so that a variety of different geometrical configurations and arrangements can still be realized after having applied the active power generating layer over the whole area of the device.Type: ApplicationFiled: April 22, 2002Publication date: October 24, 2002Inventor: Diego Fischer
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Patent number: 6468828Abstract: A photovoltaic device includes a transparent, electrically conductive top electrode which functions as an anti-reflective layer. The thickness of this layer is selected to establish a three-quarter &lgr; anti-reflective condition. Use of this layer allows for the manufacture of a gridless photovoltaic device having an enhanced overall efficiency.Type: GrantFiled: June 9, 2000Date of Patent: October 22, 2002Assignee: Sky Solar L.L.C.Inventors: Troy Glatfelter, Subhendu Guha
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Patent number: 6469243Abstract: A dye-sensitizing solar cell comprising: a first substrate whose surface is at least conductive; a second substrate on which a conductive layer is formed, the second substrate being transparent, the first and second substrates being spaced by a distance with the conductive surfaces of the first and second substrates opposite to each other; a semiconductor layer having a dye adsorbed thereon, the semiconductor layer being formed on one of the conductive surfaces; a glass frit for sealing peripheral edges of the first and second substrates; and a redox electrolyte which is filled between the first and second substrates.Type: GrantFiled: December 27, 2000Date of Patent: October 22, 2002Assignee: Sharp Kabushiki KaishaInventors: Ryosuke Yamanaka, Liyuan Han
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Patent number: 6469242Abstract: In a substrate-integration-type thin-film solar cell module wherein an element is directly formed on a transparent insulating substrate, wiring between a bus region and a terminal box is formed of a solder-plated copper foil. To ensure insulation between a device surface and the solder-plated copper foil, an insulating sheet buried in a filler is inserted in a gap therebetween. A glass nonwoven fabric sheet or a 160° C.-heat-resistant synthetic fiber fabric sheet can be used for the insulating sheet. Contact between an edge of an opening in a back protection cover and the wiring is prevented by positioning output wiring by means of an insulating sheet portion. An insulating sheet for preventing entrance of water from the opening is disposed at the opening.Type: GrantFiled: March 2, 2000Date of Patent: October 22, 2002Assignee: Kaneka CorporationInventor: Masataka Kondo
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Publication number: 20020142511Abstract: A method of fabricating a semiconductor device capable of remarkably reducing the quantity of misalignment after an etching step is obtained. This method of fabricating a semiconductor device comprises a first lithography step of transferring a mask pattern onto a first semiconductor substrate as a first resist pattern with positional reference to a first alignment mark, a first etching step of performing etching through the first resist pattern serving as a mask, a step of measuring the quantity of misalignment after the first etching step and a second lithography step of thereafter transferring the mask pattern onto a second semiconductor substrate as a second resist pattern while correcting the positional reference based on the first alignment mark on the basis of the quantity of misalignment after the first etching step.Type: ApplicationFiled: March 25, 2002Publication date: October 3, 2002Applicant: Sanyo Electric Co., Ltd.Inventors: Yoshio Okayama, Keiichi Ueda, Satoru Shimada
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Patent number: 6455347Abstract: This invention provides a method of fabricating a thin-film photovoltaic module having a structure in which a plurality of thin films are stacked. This method includes postulating a substrate temperature during laser scribing for each thin film, determining a scanning pattern by taking account of the size of the substrate at the postulated temperature, and dividing each thin film in accordance with the scanning pattern while keeping the substrate temperature at the postulated temperature or a temperature in its neighborhood.Type: GrantFiled: March 15, 2000Date of Patent: September 24, 2002Assignee: Kaneka CorporationInventors: Masafumi Hiraishi, Katsuhiko Hayashi, Hideo Yamagishi
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Patent number: 6452087Abstract: Disclosed is a photovoltaic device comprising on a substrate (1) a plurality of photovoltaic elements (10) each composed of a lamination body of a first electrode (2), a photovoltaic conversion layer (3), and a second electrode (4), the thickness of a side end (B) in the first electrode (2) in the vicinity of a separating trench (S) existing between the first electrode (2) and the adjacent first electrode (2) being larger than the thickness of an element region (A) in the first electrode (2).Type: GrantFiled: February 26, 2001Date of Patent: September 17, 2002Assignee: Sanyo Electric Co., Ltd.Inventors: Manabu Sasaki, Katsunobu Sayama, Kunimoto Ninomiya, Shigeo Yata, Hiroshi Ishimaru
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Patent number: 6444899Abstract: It is achieved to provide a solar cell in which stability at a connection portion between a circuit substrate of an electric instrument and a rear electrode, and reliability against electrostatic damage are improved, and also to provide a method of fabricating the same. A rear electrode is formed of a material containing carbon as a main ingredient. In formation of the rear electrode, a thermosetting conductive carbon paste is used and the formation is made by a printing method. Further, when the resistance values of the transparent electrode layer and the rear electrode layer are made the same level and are balanced, the resistance against electrostatic damage can be remarkably improved.Type: GrantFiled: December 21, 2000Date of Patent: September 3, 2002Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuichi Kubota, Kazuo Nishi
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Patent number: 6441297Abstract: The invention relates to a solar cell arrangement consisting of series-connected solar subcells. Said solar subcells consist of a semiconductor wafer which forms a common base material for all of the solar subcells and wherein a number of recesses are provided for delimiting the individual, series-connected solar subcells. The invention is characterised in that at least some of the recesses extend from the top surface of the semiconductor wafer, through the wafer itself to the bottom surface and in that at most some bridge segments are left in continuation of the recesses as far as the wafer edge, to mechanically interconnect the solar subcells.Type: GrantFiled: October 23, 2000Date of Patent: August 27, 2002Inventors: Steffen Keller, Peter Fath, Gerhard Willeke
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Patent number: 6437231Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: GrantFiled: May 24, 2001Date of Patent: August 20, 2002Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Publication number: 20020092558Abstract: An integrated thin film battery and fabrication method thereof is provided, in which a plurality of thin film batteries and thin film solar cells are formed in grooves formed on a substrate, to thereby secure stabilities of the thin film batteries and the thin film solar cells and provide a desired charging capacity and output voltage. The integrated thin film battery includes a substrate made of an electrical insulation material and whose one surface is etched to form a groove thereon; and a thin film battery including an anode, an electrolyte, a cathode, and anode and cathode current collectors respectively contacting the anode and cathode, for collecting current, which is formed on a groove formed on the substrate, for charging and discharging electrical energy.Type: ApplicationFiled: July 24, 2001Publication date: July 18, 2002Inventors: Seong Bae Kim, Kwang Il Chung, Shin Kook Kim, Woo Seong Kim, Yung Eun Sung
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Patent number: 6410362Abstract: A clear thermal emissive coating, such as clear polyimide, is deposited directly upon a thin film solar cell forming a flexible thin film solar cell. The thin film solar cell can be deposited on another thermal emissive coating used as a substrate during thin film solar cell semiconductor processing so that resulting flexible thin film solar cell can be illuminated on the top side and eject heat from both sides suitable for forming a solar cell array over a curved surface such as a power sphere nanosatellite with thermal regulation.Type: GrantFiled: August 28, 2000Date of Patent: June 25, 2002Assignee: The Aerospace CorporationInventors: Edward J. Simburger, Michael J. Meshishnek, David G. Gilmore, Dennis A. Smith, Margaret H. Abraham, Frank R. Jeffrey, Paul A. Gierow
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Patent number: 6395972Abstract: A method of solar cell external interconnection and a solar cell panel (1) made thereby are disclosed. An assembly (2) including a solar cell module (4), a flexible lead frame (5) to which the solar cell module is to be interconnected and a solder located between the solar cell module and the flexible lead frame, is provided. The solder is heated by directing a hot gas (42) into the area of the solder to melt the solder and form a soldered connection (6) between the solar cell module and the lead frame. The soldered assembly is attached to a module carrier panel (3) by embedding a portion of the assembly in a first, flexible adhesive (32) and another portion of the assembly in a second, thermally curable adhesive (33) which is then cured to anchor the assembly on the module carrier panel.Type: GrantFiled: November 9, 2000Date of Patent: May 28, 2002Assignee: TRW Inc.Inventors: Dean Tran, George J. Vendura, Jr., Mark A. Kruer, Alan M. Hirschberg
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Publication number: 20020059952Abstract: A solar battery module includes a plurality of solar cells connected to one another and a plurality of spaces each provided between adjacent solar cells, the plurality of spaces including at least one repair space which is larger than other spaces. A replacement solar cell includes an electrode and an interconnector electrically connected to the electrode, the interconnector including a connecting portion, which is positioned with respect to a connecting portion of an interconnector electrically connected to an electrode of an existing solar cell adjacent to the repair space so that the connection by the interconnectors is performed in the repair space. A method of replacing a solar cell includes the steps of simultaneously removing a plurality of existing solar cells arranged between at least two repair spaces, and simultaneously mounting a plurality of replacement solar cells to the region from which the plurality of existing solar cells are removed.Type: ApplicationFiled: November 19, 2001Publication date: May 23, 2002Inventor: Keiji Shimada
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Publication number: 20020056473Abstract: A method for fabricating multi-cell solar devices using thermal spray deposition techniques to spray metal powder directly on solar cells and on the backing upon which solar cells are assembled, to form collection grid lines, bus bars, electrodes and interconnections between solar cells.Type: ApplicationFiled: November 16, 2001Publication date: May 16, 2002Inventors: Mohan Chandra, Yuepeng Wan, Alleppey V. Hariharan, Jonathan A. Talbott
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Patent number: 6384317Abstract: The solar cell in the semiconductor substrate includes at least a radiation receiving front surface and a second surface. The substrate includes a first region of one type of conductivity and a second region of the opposite conductivity type with at least a first part located adjacent to the front surface and a second part located adjacent to the second surface. The front surface includes conductive contacts to the second region and the second surface has separated contacts to the first region and to the second region. The contacts to the second region at the second surface are connected to the contacts at the front surface through a limited number of vias.Type: GrantFiled: April 3, 2000Date of Patent: May 7, 2002Assignee: IMEC vzwInventors: Emmanuel Van Kerschaver, Jozef Szlufcik, Roland Einhaus, Johan Nijs
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Publication number: 20020038663Abstract: The present invention provides a photovoltaic device assembly comprising a plurality of photovoltaic devices connected with one another, wherein no rectangular corner part is formed in the peripheral parts of the photovoltaic device assembly itself and the shape of the peripheral parts of the photovoltaic devices is composed of straight lines and curved lines connecting the straight lines to one another, thereby preventing penetration owing to the effects of manufacture, installation, transportation, handling, and the state after installation of the solar cell module.Type: ApplicationFiled: July 3, 2001Publication date: April 4, 2002Inventors: Hideaki Zenko, Ichiro Kataoka, Satoru Yamada, Hidenori Shiotsuka
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Patent number: 6352875Abstract: In a photoelectric conversion apparatus obtained by arranging and fixing a plurality of semiconductor element substrates onto a base with an adhesive, the levels of the upper surfaces of the substrates are adjusted with a desired thickness of the adhesive so as to set the upper surfaces within the same plane while the distance from the upper surface of the base to the semiconductor element surface of each substrate is kept to a design value, thereby realizing a photoelectric conversion apparatus constituted by a plurality of substrates arranged two-dimensionally, which eliminates level gaps between the substrates, and hence is free from problems such as a decrease in resolution, a deterioration in sensitivity, and peeling of a phosphor and the like.Type: GrantFiled: October 21, 1998Date of Patent: March 5, 2002Assignee: Canon Kabushiki KaishaInventors: Shinichi Hayashi, Akira Funakoshi, Akira Tago, Satoshi Okada, Shinichi Takeda, Eiichi Takami, Masakazu Morishita, Chiori Mochizuki, Tadao Endo, Toshikazu Tamura
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Publication number: 20020009824Abstract: In a semiconductor device having a solid state image sensing device of the present invention, a p-type well region 2a in which a plurality of unit cells, each having a photodiode PD, are formed and a p-type well region 2b in which a peripheral circuit element is formed are installed in a separated manner. Thus, it is possible to prevent a hot carrier, transition metals, etc. within the peripheral circuit region from invading the pixel region more effectively. Consequently, it becomes possible to provide a semiconductor device having a solid state image sensing device and a manufacturing method thereof, which can improve the pixel characteristic.Type: ApplicationFiled: January 25, 2001Publication date: January 24, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Atsushi Maeda
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Patent number: 6331671Abstract: An installation structure of a solar cell module array in which a plurality of solar cell module strings are arranged on a desired installation face is provided. The plurality of solar cell module strings have a plurality of solar cell modules. There is an inter solar cell module connection cable to electrically connect the plurality of solar cell modules, as well as a positive string cable and a negative string cable. A non-contacting means is provided such that no contact occurs between the positive string cable and the negative string cable or between the inter solar cell module connection cable and the positive string cable or/and the negative string cable. This solar cell module array installation structure excels in safety. That is, in the array installation structure, the positive and negative string cables are wired in a desirable state so that no electric short occurs between these two cables, even when a fire occurs in the vicinity of the installation face.Type: GrantFiled: February 24, 2000Date of Patent: December 18, 2001Assignee: Canon Kabushiki KaishaInventors: Hidehisa Makita, Toshihiko Mimura, Masahiro Mori, Yuji Inoue, Satoru Shiomi, Ayako Komori, Yoshitaka Nagao, Makoto Sasaoka, Shigenori Itoyama
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Patent number: 6323056Abstract: A high-quality solar cell is manufactured that prevents contamination of solar cell boundaries. A transparent conductive film, an amorphous silicon film, and a metallic electrode are continuously laminated onto a substrate, and etching is done of the transparent conductive film, the amorphous silicon film, and the metallic electrode, using a photoresist film having stepped thickness to achieve the desired shape. Insulation between solar cell elements is provided via a prescribed protective film, after which an electrically conducive paste is formed so as to make a series connection between solar cell elements.Type: GrantFiled: October 5, 1999Date of Patent: November 27, 2001Assignee: Citizen Watch Co., Ltd.Inventor: Kozo Miyoshi
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Publication number: 20010035205Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: ApplicationFiled: May 24, 2001Publication date: November 1, 2001Applicant: KANEGAFUCHI KAGAKU KOGYO KABUSHIKI KAISHAInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Publication number: 20010027803Abstract: Disclosed is a photovoltaic device comprising on a substrate (1) a plurality of photovoltaic elements (10) each composed of a lamination body of a first electrode (2), a photovoltaic conversion layer (3), and a second electrode (4), the thickness of a side end (B) in the first electrode (2) in the vicinity of a separating trench (S) existing between the first electrode (2) and the adjacent first electrode (2) being larger than the thickness of an element region (A) in the first electrode (2).Type: ApplicationFiled: February 26, 2001Publication date: October 11, 2001Applicant: SANYO ELECTRIC CO., LTD.Inventors: Manabu Sasaki, Katsunobu Sayama, Kunimoto Ninomiya, Shigeo Yata, Hiroshi Ishimaru
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Patent number: 6294725Abstract: A simplified method and system for interconnecting solar cell arrays which does not utilize cause damage to the solar cells while at the same time minimizing process steps. In particular, in accordance with the present invention, interconnection between solar cell are made by way of a conductive epoxy, patterned on a substrate. The use of the epoxy eliminates the need for wire bonding as well as eliminates additional processing steps to interconnect the solar cell arrays.Type: GrantFiled: March 31, 2000Date of Patent: September 25, 2001Assignee: TRW Inc.Inventors: Alan M. Hirschberg, Dean Tran, David M. Carberry
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Patent number: 6288323Abstract: The present invention provides a thin film photoelectric conversion module, including a substrate and a plurality of thin film photoelectric conversion cells formed on the substrate and connected to each other in series to form a series-connected array.Type: GrantFiled: March 2, 2000Date of Patent: September 11, 2001Assignee: Kaneka CorporationInventors: Katsuhiko Hayashi, Hideo Yamagishi
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Patent number: 6288326Abstract: A photovoltaic module comprises a substrate, a semiconductor layer arranged on one of the principal surfaces of the substrate, divided into a plurality of sections and sealed by a encapsulation material, in that the encapsulation material is arranged on the principal surface of the substrate without its end face projecting outwardly beyond the end face of the substrate.Type: GrantFiled: March 20, 2000Date of Patent: September 11, 2001Assignee: Kaneka CorporationInventors: Akimine Hayashi, Naoaki Nakanishi, Seishiro Mizukami, Takeharu Yamawaki
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Patent number: 6271462Abstract: By inspecting an electrical wiring route of a solar cell module while applying a load to the solar cell module, it is possible to more accurately judge the presence or absence of a defect in the electrical wiring route of the solar cell module.Type: GrantFiled: December 22, 1999Date of Patent: August 7, 2001Assignee: Canon Kabushiki KaishaInventors: Koji Tsuzuki, Tsutomu Murakami, Takehito Yoshino, Yoshifumi Takeyama, Koichi Shimizu
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Patent number: 6265652Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: GrantFiled: March 3, 1998Date of Patent: July 24, 2001Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kabushiki KaishaInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Patent number: 6265242Abstract: A process for producing a solar cell module comprising at least a photovoltaic element module is provided. The photovoltaic element module is formed by electrically connecting a plurality of photovoltaic elements with each other, after the individual photovoltaic elements are identified or classified into a plurality of groups which are different from each other in property and attribute. The photovoltaic element module is formed such that at least two kinds of photovoltaic elements having different property and attribute co-exist therein. A solar cell module having at least a photovoltaic element module comprising a plurality of photovoltaic elements electrically connected with each other is also provided; the plurality of photovoltaic elements comprises photovoltaic elements identified or classified into at least two kinds which are different in terms of property and attribute.Type: GrantFiled: February 23, 1999Date of Patent: July 24, 2001Assignee: Canon Kabushiki KaishaInventors: Ayako Komori, Tsutomu Murakami, Akiharu Takabayashi, Takehito Yoshino, Masahiro Mori, Koji Tsuzuki, Takeshi Takada, Yoshifumi Takeyama, Koichi Shimizu, Masaaki Matsushita
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Patent number: 6248949Abstract: An improved method of manufacturing a solar cell receiver plate of a concentrator photovoltaic array. A plurality of strips each having its own linear electrical circuit are connected to the top surface of a primary aluminum substrate. The strips are aligned parallel to each other and laterally spaced from each other a predetermined distance. Each strip has a plurality of solar cells mounted thereon. The electrical circuits are connected together in series. Cooling fins are secured to the bottom surface of the primary aluminum substrate. The strips have been formed from a secondary aluminum substrate that had its dielectric layer adhered to its top surface by a layer of adhesive. A second layer of adhesive covers the top surface of the dielectric layer which in turn is covered by a sheet of copper to form a laminated first assembly.Type: GrantFiled: October 28, 1999Date of Patent: June 19, 2001Inventor: Gerald A. Turner
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Patent number: 6239354Abstract: A monolithically interconnected photovoltaic module having cells which are electrically connected which comprises a substrate, a plurality of cells formed over the substrate, each cell including a primary absorber layer having a light receiving surface and a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, and a cell isolation diode layer having a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, the diode layer intervening the substrate and the absorber layer wherein the absorber and diode interfacial regions of a same conductivity type orientation, the diode layer having a reverse-breakdown voltage sufficient to prevent inter-cell shunting, and each cell electrically isolated from adjacent cells with a vertical trench trough the pn-junction of the diode layer, interconnects disposed in the trenches contacting the absorber regions of adjaType: GrantFiled: October 8, 1999Date of Patent: May 29, 2001Assignee: Midwest Research InstituteInventor: Mark W. Wanlass
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Patent number: 6239352Abstract: This invention comprises deposition of thin film photovoltaic junctions on metal substrates which can be heat treated following deposition in a continuous fashion without deterioration of the metal support structure. In a separate operation, an interconnection substrate structure is produced in a continuous roll-to-roll fashion. In this way the interconnection substrate structure can be uniquely formulated from polymer-based materials since it does not have to endure high temperature exposure. Cells comprising the metal foil supported photovoltaic junctions are then laminated to the interconnection substrate structure. Conductive interconnections are deposited to complete the array. The conductive interconnections can be accomplished with a separately prepared interconnection component.Type: GrantFiled: March 30, 1999Date of Patent: May 29, 2001Inventor: Daniel Luch
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Patent number: 6235982Abstract: A photoelectric conversion apparatus is provided which includes a substrate at least a surface of which has an insulating property, a plurality of unit photoelectric conversion elements each comprising at least a lower electrode, a photoelectric conversion layer, and an upper electrode that are formed in this order on the front surface of the substrate, and a plurality of rear electrodes formed on the rear surface of the substrate. In this apparatus, the lower electrode and upper electrode of each unit photoelectric conversion element are connected to a corresponding one of the rear electrodes through an aperture formed through the substrate, such that the unit photoelectric conversion elements are connected in series. Each of the rear electrodes comprises a first connecting electrode and a second connecting electrode.Type: GrantFiled: August 27, 1999Date of Patent: May 22, 2001Assignee: Fuji Electric Co., Ltd.Inventor: Sugao Saitou