Abstract: A solar cell having improved carrier collection efficiency is provided. A solar cell (1) is provided with a semiconductor substrate (10) having one type of conductivity, a first semiconductor layer (12n), a second semiconductor layer (13p), a first electrode (14), and a second electrode (15). The first semiconductor layer (12n) is arranged on one main surface (10b) of the semiconductor substrate (10). The first semiconductor layer (12n) has the one type of conductivity. The second semiconductor layer (13p) is arranged on the one main surface (10b) of the semiconductor substrate (10). The second semiconductor layer (13p) has the other type of conductivity. The first electrode (14) is connected electrically to the first semiconductor layer (12n). The second electrode (15) is connected electrically to the second semiconductor layer (13p). The thickness of the second semiconductor layer (13p) is thinner than the thickness of the first semiconductor layer (12n).

Abstract: A system and method utilizing thyristor-based Photo-Conductive Semiconductor Switches (PCSS) for short pulse switching in high power microwave and/or broadband electromagnetic pulse generation is disclosed. The PCSS consists of thyristor-type NPNP structure having multiple emitter regions enclosed by the base region and multiple emitter shorts to divert leakage currents for voltage holding. The PCSS also includes an optical aperture comprised of patterned metallic grids for light illumination and current collection. The device structure is so constructed that there is only one single bevel around the peripheral. The thyristor-based PCSS have dual polarities of voltage blocking and have better efficiency for light requirement to operate at longer pulse duration compared to diode-based and bulk-semiconductor-based PCSS.

Abstract: A photoelectric device is disclosed. The photoelectric device includes a semiconductor substrate, first and second semiconductor stacks having opposite conductive types and alternately arranged on a first surface of the semiconductor substrate, and a gap insulation layer formed between the first and second semiconductor stacks. An undercut may be formed in the gap insulation layer. A method of manufacturing a photoelectric device is also disclosed.

Abstract: Provided is, for example, a photodiode in which extension of the sensitivity range to a longer wavelength in the near-infrared region can be achieved without increasing the dark current. A photodiode according to the present invention includes an absorption layer 3 that is positioned on an InP substrate 1 and has a type-II multiple-quantum well structure in which an InGaAs layer 3a and a GaAsSb layer 3b are alternately layered, wherein the InGaAs layer or the GaAsSb layer has a composition gradient in the thickness direction in which the bandgap energy of the InGaAs or the GaAsSb decreases toward the top surface or the bottom surface of the layer.

Abstract: An InxGa1-xAs interlayer is provided between a III-V base and an intrinsic amorphous semiconductor layer of a heterojunction III-V solar cell structure. Improved surface passivation and open circuit voltage may be obtained through the incorporation of the interlayer within the structure.

Abstract: A method for forming a photovoltaic device includes depositing one or more layers of a photovoltaic stack on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Annealing is performed on the photovoltaic cell at a temperature and duration configured to improve overall performance.

Abstract: A method of fabricating solar cell uses simplified processes to form a lightly-doped region having a textured surface and a heavily-doped region having a flat surface. A flat interface is formed between the heavily-doped region and an electrode, which has a relative lower contact resistance.

Abstract: A PIN structure semiconductor optical receiver includes first and second electrical contact layers and an intrinsic layer disposed between them. The intrinsic layer includes a stud having a stud axis and a stud cross-section. The first and second contact layers have dimensions in a plane perpendicular to the stud axis that are greater than the stud's cross-section. These layers are also elongated and have longitudinal axes offset angularly relative to each other to minimize facing areas of said electrical contact layers.

Abstract: The present invention discloses a thin-film solar cell and the manufacturing method thereof. A thin-film solar cell includes a substrate, a P-type layer, an interface layer, an I-type amorphous silicon layer, an I-type absorbing layer, an N-type layer and an electrode layer. The P-type is disposed on the substrate. The interface layer is disposed on the P-type layer. The I-type amorphous silicon layer is disposed on the interface layer. The I-type absorbing layer is disposed on the I-type amorphous silicon layer. The N-type layer is disposed on the I-type absorbing layer. The electrode layer is disposed on the N-type layer. Wherein, the I-type absorbing layer is thicker than 20% the I-type amorphous silicon layer, and the interface layer is thinner than 20% of the I-type amorphous silicon layer.

Abstract: A solar cell includes a semiconductor substrate having a first conductivity type, an emitter layer on a surface of the semiconductor substrate, the emitter layer having a second conductivity type different from the first conductivity type, and electrodes including a first electrode electrically connected to the emitter layer, and a second electrode electrically connected to the semiconductor substrate. The emitter layer includes a high-concentration doping portion adjacent to the first electrode, and a low-concentration doping portion in a region that does not include the high-concentration doping portion. The low-concentration doping portion has a higher resistance than the high-concentration doping portion. The high-concentration doping portion includes a first region having a first resistance, and a second region having a second resistance higher than the first resistance.

Abstract: An avalance diode including, between two heavily-doped regions of opposite conductivity types arranged at the surface of a semiconductor region, a lightly-doped region, with length L of the lightly-doped region between the heavily-doped regions approximately ranging between 50 and 200 nm.

Abstract: A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25-0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

Abstract: A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25?0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

Abstract: In a method of manufacturing a solar cell includes forming a dopant layer by doping a dopant of a first conductive type and a count dopant of a second conductive type opposite to the first conductive type to a surface of a semiconductor substrate. Here, a doping amount of the count dopant is less than a doping amount of the dopant.

Abstract: One embodiment of the present invention provides a tunneling junction solar cell. The solar cell includes a base layer, an emitter layer situated adjacent to the shallow counter doping layer, a surface field layer situated adjacent to a side of the base layer opposite to the shallow counter doping layer, a front-side electrode, and a back-side electrode. The base layer includes a shallow counter doping layer having a conduction doping type that is opposite to a remainder of the base layer. The emitter layer has a bandgap that is wider than that of the base layer.

Abstract: The present invention relates to optoelectronic device layer structures, light emitting devices, and detectors based upon heterostructures formed between hexagonal boron nitride (hNB) and III-nitrides, and more particularly, to heterojunction devices capable of emitting and detecting photons in the ultraviolet (UV) and extremely ultraviolet (RUV) spectral range. The present invention also relates to neutron detectors based on epitaxially grown hBN thin films (or epitaxial layers) and hBN stacked thin films (or epitaxial layers) to satisfy the thickness required for capturing all incoming neutrons.

Abstract: A photovoltaic device includes a silicon substrate of a first conduction type that includes an impurity diffusion layer on one surface side; a light-receiving-surface side electrode that includes a plurality of grid electrodes electrically connected to the impurity diffusion layer; and a back-surface side electrode formed on the other surface side of the silicon substrate wherein the impurity diffusion layer includes a first impurity diffusion layer and a second impurity diffusion layer, and wherein the first impurity diffusion layer is formed so that a direction perpendicular to a longitudinal direction of the grid electrodes is a longitudinal direction thereof, and so that an area ratio of the first impurity diffusion layer to a band region is equal to or lower than 50%.

Abstract: The present invention concerns a light conversion device comprising at least direction of impinging light one photovoltaic light conversion layer stack (43, 51) comprising a p-i-n junction and situated between a front (42) and back (47) electrode, wherein the n-layer (49) of the layer stack (43) situated closest to the back electrode (47) consists of a n-doped silicon- and oxygen-containing (SiOx) microcrystalline layer, and is in direct contact with the back electrode (47). The invention equally concerns a corresponding method for manufacturing such a light conversion device. The requirement for intermediate adhesion/interface layers between SiOx layer and back electrode can thus be obviated, resulting in simplified manufacture.

Abstract: A process of manufacturing the interdigitated back-contact solar cell, with the use of screen printing or spraying and the use of chemical etching, forms the trenches for the P-type electrode on the back of the substrate for making the solar cell. The time-consuming process of photolithography (for example, at least two steps of high-temperature diffusion) can be avoided. Furthermore, only one machine for printing and etching is needed to form the structure of the interdigitated back-contact solar cell. The present invention can make the whole process time-efficient and low-cost to enhance the efficiency of the solar cell, fulfilling the demand of mass production.

Abstract: A semiconductive device is fabricated by forming, within a semiconductive substrate, at least one continuous region formed of a material having a non-uniform composition in a direction substantially perpendicular to the thickness of the substrate.

Abstract: A back contact configuration for a CIGS-type photovoltaic device is provided. The back contact configuration includes an interfacial seed layer, made up of one or more layers/sublayers, disposed between a Mo based rear contact/electrode and a CIGS inclusive semiconductor absorber. The interfacial seed layer may be of or include one or more element(s) that make up, or help make up, the CIGS inclusive semiconductor absorber. Various methods and compositions of the interfacial seed layer are disclosed, including a seed layer comprising metallic and/or substantially metallic Cu—In—Ga, CIGS, and/or a stack of alternating layers of or including Cu, In and Ga. Methods for making the back contact configuration, including an interfacial seed layer, are also provided.

Abstract: A method for manufacturing a photoelectric conversion device including a first-conductivity-type crystalline semiconductor region, an intrinsic crystalline semiconductor region, and a second-conductivity-type semiconductor region that are stacked over an electrode is provided for a new anti-reflection structure. An interface between the electrode and the first-conductivity-type crystalline semiconductor region is flat. The intrinsic crystalline semiconductor region includes a crystalline semiconductor region, and a plurality of whiskers that are provided over the crystalline semiconductor region and include a crystalline semiconductor. The first-conductivity-type crystalline semiconductor region and the intrinsic crystalline semiconductor region are formed by a low pressure chemical vapor deposition method at a temperature higher than 550° C. and lower than 650° C.

Abstract: A method for manufacturing a P-I-N microcrystalline silicon structure for thin-film solar cells, includes the steps of: (a) forming a P-type layer; (b) forming an I-type layer including a plurality of sub-layers successively stacked on the P-type layer using gas mixtures including fluoride and hydride that have different gas ratios, respectively; and (c) forming an N-type layer on the I-type layer. First, second, and third I-type sub-layers may be formed on the P-type layer using gas mixtures including fluoride and hydride at a first, second, and third gas ratios, respectively. Then, advantageously, the third gas ratio may be larger than the second gas ratio and the second gas ratio may be larger than the first gas ratio, and the first gas ratio may be 8%, the second gas ratio may range between 15% and 35%, and the third gas ratio may range between 35% and 50%.

Abstract: The invention relates to a micromechanical device comprising a semiconductor element capable of deflecting or resonating and comprising at least two regions having different material properties and drive or sense means functionally coupled to said semiconductor element. According to the invention, at least one of said regions comprises one or more n-type doping agents, and the relative volumes, doping concentrations, doping agents and/or crystal orientations of the regions being configured so that the temperature sensitivities of the generalized stiffness are opposite in sign at least at one temperature for the regions, and the overall temperature drift of the generalized stiffness of the semiconductor element is 50 ppm or less on a temperature range of 100° C. The device can be a resonator. Also a method of designing the device is disclosed.

Abstract: A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted. According to one or more embodiments of the present invention, a photoelectric device having a reduction in the number of processes for manufacturing the photoelectric device and improved output characteristics is provided.

Abstract: A method for forming copper indium gallium (sulfide) selenide (CIGS) solar cells, cadmium telluride (CdTe) solar cells, and copper zinc tin (sulfide) selenide (CZTS) solar cells using laser annealing techniques to anneal the absorber and/or the buffer layers. Laser annealing may result in better crystallinity, lower surface roughness, larger grain size, better compositional homogeneity, a decrease in recombination centers, and increased densification. Additionally, laser annealing may result in the formation of non-equilibrium phases with beneficial results.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region, the substrate having a front side and a backside. A co-implant process is performed along the backside of the substrate opposing a photosensitive element positioned along the front side of the substrate. The co-implant process utilizes a first pre-amorphization implant process that creates a pre-amorphization region. A dopant is then implanted wherein the pre-amorphization region retards or reduces the diffusion or tailing of the dopants into the photosensitive region. An anti-reflective layer, a color filter, and a microlens may also be formed over the co-implant region.

Abstract: A semiconductor substrate is prepared. A glass layer containing one conductivity type dopant is formed on one main surface of the semiconductor substrate. One conductivity type semiconductor region including a first concentration region having a first concentration as a dopant concentration, and a second concentration region having a second concentration as a dopant concentration higher than the first concentration is formed by heating the semiconductor substrate with the glass layer on the one main surface to diffuse the dopant in a surface part on the one main surface side of the semiconductor substrate. Surfaces of two or more portions apart from each other in the surface part on the one main surface side of the semiconductor substrate are roughened by locally heating the semiconductor substrate from above the glass layer, to form alignment reference parts.

Abstract: A method of forming a multijunction solar cell comprising an upper subcell, a middle subcell, and a lower subcell comprising providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on said substrate having a first band gap; forming a second solar subcell over said first subcell having a second band gap smaller than said first band gap; and forming a grading interlayer over said second subcell having a third band gap larger than said second band gap forming a third solar subcell having a fourth band gap smaller than said second band gap such that said third subcell is lattice mismatched with respect to said second subcell.

Abstract: A multijunction solar cell including a window layer with a gradation in doping from the region in the window layer adjacent to the emitter region to the region in the window layer adjacent to the surface layer overlying the window layer, so that minority carriers in the window layer experience an electric field which would tend to drive them in the direction of the emitter layer, thereby increasing the efficiency of the solar cell.

Abstract: A method of manufacturing a solar cell according to an embodiment includes the steps of: forming an emitter layer by ion-implanting a first conductive type dopant to a first surface of a semiconductor substrate; and forming a back surface field layer by ion-implanting a second conductive type dopant to a second surface of the semiconductor substrate. When an additional dopant is a dopant other than the first and second conductive type dopants, an amount of the additional dopant doped during the forming the back surface field layer is larger than an amount of the additional dopant doped during the forming the emitter layer.

Abstract: A method for forming a photovoltaic device includes depositing a p-type layer on a substrate. A barrier layer is formed on the p-type layer by exposing the p-type layer to an oxidizing agent. An intrinsic layer is formed on the barrier layer, and an n-type layer is formed on the intrinsic layer.

Abstract: Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer.

Abstract: Methods for forming a photovoltaic device include depositing a p-type layer on a substrate and cleaning the p-type layer by exposing a surface of the p-type layer to a plasma treatment to react with contaminants. An intrinsic layer is formed on the p-type layer, and an n-type layer is formed on the intrinsic layer.

Abstract: Methods for forming a photovoltaic device include adjusting a deposition power for depositing a buffer layer including germanium on a transparent electrode. The deposition power is configured to improve device efficiency. A p-type layer is formed on the buffer layer. An intrinsic layer and an n-type layer are formed over the p-type layer.

Abstract: The disclosure provides apparatuses for videoconferencing and a method of operation thereof. In one embodiment, an apparatus includes: (1) a display substrate occupying less than an entirety of a viewing area, (2) an actuator configured to move the display substrate over the viewing area and (3) a camera having a field of view at least partially overlapping the viewing area and configured to capture a camera image through the viewing area.

Abstract: Disclosed are embodiments of a Schottky barrier diode. This diode can be formed in a semiconductor substrate having a doped region with a first conductivity type. A trench isolation structure can laterally surround a section of the doped region at the top surface of the substrate. A semiconductor layer can be positioned on the top surface of the substrate. This semiconductor layer can have a Schottky barrier portion over the defined section of the doped region and a guardring portion over the trench isolation structure laterally surrounding the Schottky barrier portion. The Schottky barrier portion can have the first conductivity type and the guarding portion can have a second conductivity type different from the first conductivity type. A metal silicide layer can overlie the semiconductor layer. Also disclosed are embodiments of a method of forming this Schottky barrier diode and of a design structure for the Schottky barrier diode.

Abstract: An image pickup apparatus includes a semiconductor substrate, and multiple pixels. Each of the multiple pixels includes a photoelectric-conversion unit disposed in the semiconductor substrate, a first conductive first semiconductor region disposed in the semiconductor substrate, which holds charge generated by the photoelectric-conversion unit at a place different from the photoelectric-conversion unit, a first transfer unit which transfers charge to the first semiconductor region, and a second transfer unit which transfers charge held at the first semiconductor region. The first semiconductor region includes a first portion, a second portion, and a third portion. At the depth where the third portion is disposed, the first portion is disposed between the third portion and first transfer unit, and the second portion is disposed between the third portion and second transfer unit. Impurity concentration of the third portion is lower than that of the first and second portions.

Abstract: Methods for forming a buried p-n junction and avalanche photodiodes incorporating same are disclosed. The method includes forming a well in a semiconductor layer, wherein a depth of the well is selected as a function of the desired shape of the p-n junction in the edge region of the avalanche photodiode. A diffusion mask is then formed on the semiconductor layer, wherein the diffusion mask includes at least two openings per APD formed, wherein one opening is a diffusion window and the other is a diffusion sink. The depth of the p-n junction in the active region of the APD is based, in part, on an attribute of the diffusion mask relating to the diffusion sink.

Abstract: A semiconductor device contains a photodiode which includes a buried collection region formed by a bandgap well to vertically confine photo-generated minority carriers. the bandgap well has the same conductivity as the semiconductor material immediately above and below the bandgap well. A net average doping density in the bandgap well is at least a factor of ten less than net average doping densities immediately above and below the bandgap well. A node of the photodiode, either the anode or the cathode, is connected to the buried collection region to collect the minority carriers, the polarity of the node matches the polarity of the minority carriers. The photodiode node connected to the buried collection region occupies less lateral area than the lateral area of the buried collection region.

Abstract: An object is to obtain a high-efficiency photoelectric conversion device having a crystalline silicon i-layer in a photoelectric conversion layer. Disclosed is a fabrication method for a photoelectric conversion device that includes a step of forming, on a substrate, a photoelectric conversion layer having an i-layer formed mainly of crystalline silicon. The method includes the steps of determining an upper limit of an impurity concentration in the i-layer according to the Raman ratio of the i-layer; and forming the i-layer so as to have a value equal to or less than the determined upper limit of the impurity concentration. Alternatively, an upper limit of impurity-gas concentration in a film-formation atmosphere is determined according to the Raman ratio of the i-layer, and the i-layer is formed while controlling the impurity-gas concentration so as to have a value equal to or less than the determined upper limit.

Abstract: A solar cell comprises a region formed on a substrate. The region has a dopant. The region can be one of a selective emitter and a back surface field of the solar cell. A grid line is deposited over a first portion of the region. A dopant profile is generated that has a concentration of electrically active dopants at a surface portion on the first portion of the region smaller than the concentration of electrically active dopants at a distance away from the surface portion. In an embodiment, an electrical activity of a portion of the dopant is deactivated in a second portion of the region outside the grid line. The grid line is used as a mask for deactivating the dopant.

Abstract: A photovoltaic device is presented. The photovoltaic device includes a transparent conductive layer; a window layer disposed on the transparent conductive layer; and an absorber layer disposed on the window layer. The window layer includes a low-diffusivity layer disposed adjacent to the transparent conductive layer and a high-diffusivity layer interposed between the low-diffusivity layer and the absorber layer. Method of making a photovoltaic device is also presented.

Abstract: A method for forming single crystal or large-crystal-grain thin-film layers deposits a thin-film amorphous, nanocrystalline, microcrystalline, or polycrystalline layer, and laser-heats a seed spot having size on the order of a critical nucleation size of the thin-film layer. The single-crystal seed spot is extended into a single-crystal seed line by laser-heating one or more crystallization zones adjacent to the seed spot and drawing the zone across the thin-film layer. The single-crystal seed line is extended across the thin-film material layer into a single-crystal layer by laser-heating an adjacent linear crystallization zone and drawing the crystallization zone across the thin-film layer. Photovoltaic cells may be formed in or on the single-crystal layer. Tandem photovoltaic devices may be formed using one or several iterations of the method. The method may also be used to form single-crystal semiconductor thin-film transistors, such as for display devices, or to form single-crystal superconductor layers.

Abstract: A solar cell, a solar cell manufacturing device, and a method for manufacturing the solar cell are discussed. The solar cell manufacturing device includes a chamber; an ion implantation unit configured to implant ions into a substrate inside the chamber and a mask positioned between the ion implantation unit and the substrate. The mask includes a first opening to form a lightly doped region having a first concentration at one surface of the substrate, a second opening to form a heavily doped region having a second concentration higher than the first concentration at the one surface of the substrate, and at least one connector formed to cross the second opening. The second opening includes finger openings formed in a first direction, and bus openings formed in a second direction crossing the first direction.

Abstract: There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×1016-1×1017 atoms/cm3 and solid-soluted oxygen having a concentration of 1.4×1018-1.6×1018 atoms/cm3.

Abstract: Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

Abstract: A photovoltaic device having an absorber multilayer and methods of manufacturing the same are described. The absorber multilayer, which is formed adjacent to a window layer, may include a doped first cadmium telluride layer which contains a first dopant and an intrinsic second cadmium telluride layer. The absorber multilayer may further include at least a third cadmium telluride layer formed adjacent to a back contact. The at least third cadmium telluride layer may include doped or intrinsic cadmium telluride.

Abstract: To improve the conversion efficiency of a thin film solar cell constituted by a pin junction-type thin film layer. Specifically, a thin film solar cell including a laminate which includes first diffusion layer made of semiconductor having p-type or n-type conductivity, a film-forming layer made of semiconductor having lower conductivity than the first diffusion layer, and second diffusion layer made of semiconductor having different polarity from the film-forming layer inside is provided. The first diffusion layer and the second diffusion layer have impurities distributed in a film-thickness direction with a concentration gradient.

Abstract: Disclosed is a method which includes forming a bottom metallic electrode on an insulating substrate; forming a semiconductor junction on the metallic electrode; forming a transparent conducting overlayer in contact with the semiconductor junction; and forming a metallic layer in contact with the transparent conducting overlayer, wherein the metallic layer is formed by a plating process. The plating process may be an electroplating process or an electroless plating process. The transparent conducting overlayer may be carbon nanotubes or graphene. The semiconductor junction may be a p-i-n semiconductor junction, a p-n semiconductor junction, an n-p semiconductor junction or an n-i-p semiconductor junction.