Graded Composition Patents (Class 438/87)
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Publication number: 20110146775Abstract: The present invention provides a semiconductor based photovoltaic device and a manufacturing method thereof. The semiconductor based photovoltaic device is able to absorb light with a wide band wavelength, and has high photoelectric conversion efficiency since it has high electron-hole pair separation efficiency.Type: ApplicationFiled: August 28, 2009Publication date: June 23, 2011Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCEInventors: Kyung Joong Kim, Woo Lee, Yong Sung Kim, Young Heon Kim, Seung hui Hong, Wan Soo Yun, Sang Woo Kang
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Publication number: 20110139249Abstract: Solar cell structures formed using molecular beam epitaxy (MBE) that can achieve improved power efficiencies in relation to prior art thin film solar cell structures are provided. A reverse p-n junction solar cell device and methods for forming the reverse p-n junction solar cell device using MBE are described. A variety of n-p junction and reverse p-n junction solar cell devices and related methods of manufacturing are provided. N-intrinsic-p junction and reverse p-intrinsic-n junction solar cell devices are also described.Type: ApplicationFiled: December 10, 2010Publication date: June 16, 2011Applicant: Uriel Solar Inc.Inventors: James David Garnett, Peter Dingus, Shumin Wang
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Publication number: 20110126907Abstract: A solar cell includes; a semiconductor substrate, an n+ region disposed on a surface of the semiconductor substrate, a plurality of first electrodes connected to the n+ region, a p+ region disposed on the surface of the semiconductor substrate and separated from the n+ region, a second electrode connected to the p+ region, and a first dielectric layer which has a positive fixed charge and is disposed between adjacent first electrodes of the plurality of first electrodes, and a method of manufacturing the same.Type: ApplicationFiled: June 21, 2010Publication date: June 2, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jin-Wook LEE, Doo-Youl LEE, Hwa-Young KO
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Publication number: 20110120541Abstract: A Semiconductor device including, on at least one surface of a layer made of a crystalline semiconductor material of a certain type of conductivity, a layer made of an amorphous semiconductor material, doped with a type of conductivity opposite to the type of conductivity of the crystalline semiconductor material layer, characterized in that the concentration of the doping elements in the amorphous semiconductor layer varies gradually.Type: ApplicationFiled: January 31, 2011Publication date: May 26, 2011Inventors: Pere ROCA I. CABARROCAS, Jerome Damon-Lacoste
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Publication number: 20110120538Abstract: A device, system, and method for a silicon germanium solar cell structure. An exemplary silicon germanium solar cell structure has a substrate with a graded buffer layer grown on the substrate. An absorber layer is grown on the graded buffer layer and an emitter layer is grown on the absorber layer. A first junction is provided between the emitter layer and the absorber layer. A second junction may be provided between the substrate and the graded buffer layer.Type: ApplicationFiled: October 25, 2010Publication date: May 26, 2011Applicant: AMBERWAVE, INC.Inventors: Anthony Lochtefeld, Allen Barnett
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Publication number: 20110120537Abstract: High quality silicon inks are used to form polycrystalline layers within thin film solar cells having a p-n junction. The particles deposited with the inks can be sintered to form the silicon film, which can be intrinsic films or doped films. The silicon inks can have a z-average secondary particle size of no more than about 250 nm as determined by dynamic light scattering on an ink sample diluted to 0.4 weight percent if initially having a greater concentration. In some embodiments, an intrinsic layer can be a composite of an amorphous silicon portion and a crystalline silicon portion.Type: ApplicationFiled: September 21, 2010Publication date: May 26, 2011Inventors: Goujun Liu, Clifford M. Morris, Igor Altman, Uma Srinivasan, Shivkumar Chiruvolu
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Publication number: 20110111551Abstract: Provided is a photoelectric conversion device fabrication method that realizes both high productivity and high conversion efficiency by rapidly forming an n-layer having good coverage. The fabrication method for a photoelectric conversion device includes a step of forming a silicon photoelectric conversion layer on a substrate by a plasma CVD method. In the fabrication method for the photoelectric conversion device, the step of forming the photoelectric conversion layer includes a step of forming an i-layer formed of crystalline silicon and a step of forming, on the i-layer, an n-layer under a condition with a hydrogen dilution ratio of 0 to 10, inclusive.Type: ApplicationFiled: August 18, 2009Publication date: May 12, 2011Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Kengo Yamaguchi, Satoshi Sakai, Yoshiaki Takeuchi
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Publication number: 20110111550Abstract: A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer.Type: ApplicationFiled: December 14, 2010Publication date: May 12, 2011Inventors: Xunming Deng, Xianbo Liao, Wenhui Du
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Patent number: 7939363Abstract: A process for manufacturing a cadmium telluride based thin film photovoltaic device having an intermixed layer is provided. The process can include introducing a substrate into a deposition chamber, wherein a window layer (e.g., a cadmium sulfide layer) is on a surface of the substrate. A sulfur-containing gas can be supplied to the deposition chamber. In addition, a source vapor can be supplied to the deposition chamber, wherein the source material comprises cadmium telluride. The sulfur-containing gas and the source vapor can be present within the deposition chamber to form an intermixed layer on the window layer. In one particular embodiment, for example, the intermixed layer generally can have an increasing tellurium concentration and decreasing sulfur concentration extending away from the window layer. An apparatus for sequential deposition of an intermixed thin film layer and a sublimated source material on a photovoltaic (PV) module substrate is also provided.Type: GrantFiled: October 27, 2010Date of Patent: May 10, 2011Assignee: General Electric CompanyInventors: James Neil Johnson, Bastiaan Arie Korevaar, Yu Zhao
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Publication number: 20110100444Abstract: A photovoltaic device that exhibits increased open-circuit voltage and an improved fill factor due to an improvement in the contact properties between the n-layer and a back-side transparent electrode layer or intermediate contact layer, and a process for producing the photovoltaic device. The photovoltaic device comprises a photovoltaic layer having a p-layer, an i-layer and an n-layer stacked on top of a substrate, wherein the n-layer comprises a nitrogen-containing n-layer and an interface treatment layer formed on the opposite surface of the nitrogen-containing n-layer to the substrate, the nitrogen-containing n-layer comprises nitrogen atoms at an atomic concentration of not less than 1% and not more than 20%, and has a crystallization ratio of not less than 0 but less than 3, and the interface treatment layer has a crystallization ratio of not less than 1 and not more than 6.Type: ApplicationFiled: July 8, 2009Publication date: May 5, 2011Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Shigenori Tsuruga, Kengo Yamaguchi, Saneyuki Goya, Satoshi Sakai
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Patent number: 7936038Abstract: Disclosed herein is a photodiode cell, including: a first-type substrate; a second-type epitaxial layer disposed on the first-type substrate; heavily-doped second-type layers, each having a small depth, formed on the second-type epitaxial layer; and heavily-doped first-type layers, each having a narrow and shallow section, disposed on the second-type epitaxial layer and formed between the heavily-doped second-type layers, wherein the first-type and second-type have opposite doped states.Type: GrantFiled: May 12, 2009Date of Patent: May 3, 2011Assignee: Samsung Electro-Mechanics Co.Inventors: Ha Woong Jeong, Kyoung Soo Kwon, Chae Dong Go, Deuk Hee Park
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Patent number: 7935984Abstract: There are provided a higher-performance compound semiconductor epitaxial substrate having improved electron mobility characteristics and its production method. The compound semiconductor epitaxial substrate includes a channel layer in which electrons travel and an epitaxial layer on each of a front side and a back side of the channel layer, wherein a total p-type carrier concentration A (/cm2) per unit area in the epitaxial layer on the back side of the channel layer and a total p-type carrier concentration B (/cm2) per unit area in the epitaxial layer on the front side of the channel layer satisfy the following expression (1): 0<A/B?3.Type: GrantFiled: May 28, 2007Date of Patent: May 3, 2011Assignee: Sumitomo Chemical Company, LimitedInventor: Tsuyoshi Nakano
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Publication number: 20110097840Abstract: Methods of improving the anti-reflection properties of one or more dielectric layers and reducing surface recombination of generated carriers of a solar cell are disclosed. In some embodiments, dopants are introduced into the dielectric layers to improve their anti-reflection properties. In other embodiments, species are introduced into the dielectric layers to create electrical fields which repel the minority carriers away from the surface and toward the contacts. In another embodiment, mobiles species are introduced to the anti-reflective coating, which cause carrier to be repelled from the surface of the solar cell. By creating a barrier at the surface of the solar cell, undesired recombination at the surface may be reduced.Type: ApplicationFiled: October 25, 2010Publication date: April 28, 2011Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventor: Deepak A. Ramappa
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Publication number: 20110092012Abstract: A process for producing a photovoltaic device, wherein when providing an n-type amorphous silicon layer on an i-type amorphous silicon layer, a desired crystallization ratio can be achieved without reducing the deposition rate.Type: ApplicationFiled: October 30, 2008Publication date: April 21, 2011Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Hiroshi Mashima, Koichi Asakusa, Akemi Takano, Nobuki Yamashita, Yoshiaki Takeuchi
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Publication number: 20110070681Abstract: Interdigitated back contact (IBC) solar cells are produced by depositing spaced-apart parallel pads of a first dopant bearing material (e.g., boron) on a substrate, heating the substrate to both diffuse the first dopant into corresponding first (e.g., p+) diffusion regions and to form diffusion barriers (e.g., borosilicate glass) over the first diffusion regions, and then disposing the substrate in an atmosphere containing a second dopant (e.g., phosphorus) such that the second dopant diffuses through exposed surface areas of the substrate to form second (e.g., n+) diffusion regions between the first (p+) diffusion regions (the diffusion barriers prevent the second dopant from diffusion into the first (p+) diffusion regions). The substrate material along each interface between adjacent first (p+) and second (n+) diffusion regions is then removed (e.g.Type: ApplicationFiled: November 24, 2010Publication date: March 24, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Kenta Nakayashiki, Baomin Xu
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Publication number: 20110062542Abstract: Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.Type: ApplicationFiled: September 17, 2009Publication date: March 17, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James William Adkisson, John Joseph Ellis-Monaghan, Mark David Jaffe, Richard John Rassel
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Publication number: 20110062544Abstract: An optical semiconductor device is provided with a low concentration p-type silicon substrate (1); a low dopant concentration n-type epitaxial layer (second epitaxial layer) (26); a low dopant concentration p-type anode layer (27); a high concentration n-type cathode contact layer (9); a photodiode (2) made of the anode layer (27) and the cathode contact layer (9); and an NPN transistor (3) formed on the n-type epitaxial layer (26). The anode can be substantially completely depleted in the case where the anode layer (27) has its dopant concentration peak in the vicinity of the interface between the silicon substrate (1) and the n-type epitaxial layer (26). Therefore, high speed and high light receiving sensitivity characteristics can be obtained, and further, any influence of auto-doping from peripheral embedding layers can be controlled, so that a depletion layer can be stably formed in the anode.Type: ApplicationFiled: November 19, 2010Publication date: March 17, 2011Applicant: PANASONIC CORPORATINInventor: Takaki IWAI
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Publication number: 20110056544Abstract: A solar cell is disclosed. The solar cell includes a substrate containing first impurities of a first conductive type, an emitter layer containing second impurities of a second conductive type opposite the first conductive type, a first electrode electrically connected to the emitter layer, and a second electrode electrically connected to the substrate. The emitter layer and the substrate form a p-n junction. A doping concentration of the second impurities of the emitter layer linearly or nonlinearly changes depending on a depth of a position within the emitter layer.Type: ApplicationFiled: September 3, 2010Publication date: March 10, 2011Applicant: LG ELECTRONICS INC.Inventors: Kwangsun JI, Heonmin LEE, Wonseok CHOI, Junghoon CHOI, Hyunjin YANG
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Publication number: 20110053310Abstract: The manufacturing method includes: forming a P-type silicon substrate and a high-concentration N-type diffusion layer, in which an N-type impurity is diffused in a first concentration, on an entire surface at a light-incident surface side; forming an etching resistance film on the high-concentration N-type diffusion layer and forming fine pores at a predetermined position within a recess forming regions on the etching resistance film; forming recesses by etching the silicon substrate around a forming position of the fine pores, so as not to leave the high-concentration N-type diffusion layer within the recess forming region; forming the low-concentration N-type diffusion layer, in which an N-type impurity is diffused in a second concentration that is lower than the first concentration, on a surface on which the recesses are formed; and forming a grid electrode in an electrode forming region at a light-incident surface side of the silicon substrate.Type: ApplicationFiled: April 30, 2008Publication date: March 3, 2011Applicant: Mitsubishi Electric CorporationInventors: Masato Yonezawa, Kimikazu Hazumi, Akihiro Takami, Hiroaki Morikawa, Kunihiko Nishimura
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Patent number: 7897868Abstract: A stacked photovoltaic element comprising a plurality of unit photovoltaic elements each composed of a pn- or pin-junction, connected to each other in series, wherein a zinc oxide layer is provided at least one position between the unit photovoltaic elements, and the zinc oxide layer has resitivity varying in the thickness direction.Type: GrantFiled: March 24, 2004Date of Patent: March 1, 2011Assignee: Canon Kabushiki KaishaInventors: Koichi Matsuda, Makoto Higashikawa, Tetsuro Nakamura
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Patent number: 7897417Abstract: Hybrid semiconductor materials have an inorganic semiconductor incorporated into a hole-conductive fluorene copolymer film. Nanometer-sized particles of the inorganic semiconductor may be prepared by mixing inorganic semiconductor precursors with a steric-hindering coordinating solvent and heating the mixture with microwaves to a temperature below the boiling point of the solvent.Type: GrantFiled: July 11, 2006Date of Patent: March 1, 2011Assignee: National Research Council of CanadaInventors: Farid Bensebaa, Pascal L'Ecuyer, Jianfu Ding, Andrea Firth
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Publication number: 20110045629Abstract: A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel regionType: ApplicationFiled: November 2, 2010Publication date: February 24, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Narumi Ohkawa
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Publication number: 20110036394Abstract: Provided is a superstrate type a-Si:H thin film solar cell of which the device characteristics are improved as compared with conventional ones. The solar cell device is manufactured by a process comprising depositing phosphorus on a transparent conductive film formed on a transparent substrate and sequentially forming a p-type layer, an i-type layer, and an n-type layer which are formed of a-Si:H on the transparent conductive film by a plasma CVD method. The phosphorus is deposited, for example, by plasmatization of phosphorus-containing gas. Alternatively, the phosphorus is deposited by etching a phosphorus source provided in a margin region where a plasma excitation voltage is applied but no transparent substrate is placed, with hydrogen plasma at the start of the formation of the p-type layer by the plasma CVD method.Type: ApplicationFiled: February 6, 2009Publication date: February 17, 2011Applicant: KYOCERA CORPORATIONInventors: Koichiro Niira, Takehiro Nishimura, Norikazu Ito, Shinichiro Inaba
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Patent number: 7863518Abstract: A photovoltaic device capable of improving output characteristics is provided. This photovoltaic device comprises a crystalline semiconductor member, a substantially intrinsic first amorphous semiconductor layer formed on the front surface of the crystalline semiconductor member and a first conductivity type second amorphous semiconductor layer formed on the front surface of the first amorphous semiconductor layer, and has a hydrogen concentration peak in the first amorphous semiconductor layer. Thus, the quantity of hydrogen atoms in the first amorphous semiconductor layer is so increased that the hydrogen atoms increased in quantity can be bonded to dangling bonds of silicon atoms forming defects in the first amorphous semiconductor layer for inactivating the dangling bonds.Type: GrantFiled: March 8, 2004Date of Patent: January 4, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Publication number: 20100326507Abstract: In a manufacturing method of a thin film solar cell in which a p-type layer, an i-type layer, and an n-type layer are layered, the i-type layer is an amorphous silicon layer, the n-type layer is a microcrystalline silicon layer, and in a process of forming the n-type layer, a doping concentration of an n-type dopant is increased as a distance from the i-type layer is increased.Type: ApplicationFiled: June 29, 2010Publication date: December 30, 2010Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mitsuhiro Matsumoto, Kazuya Murata
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Publication number: 20100319760Abstract: This invention relates to an electronic semiconductive component comprising at least one layer (2,3) of a p-type or n-type material, wherein the layer of a said p- or n-type material is constituted by a metal hydride having a chosen dopant. The invention also relates to methods for producing the component.Type: ApplicationFiled: February 9, 2009Publication date: December 23, 2010Inventors: Alexander G. Ulyashin, Smagul Karazhanov, Arve Holt
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Patent number: 7855094Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.Type: GrantFiled: April 23, 2009Date of Patent: December 21, 2010Assignee: Electronics and Telecommunications Research InstituteInventors: Eun Soo Nam, Seon Eui Hong, Myoung Sook Oh, Yong Won Kim, Ho Young Kim, Bo Woo Kim
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Publication number: 20100313942Abstract: A method of manufacturing a photovoltaic module is provided. The method includes providing an electrically insulating substrate and a lower electrode, depositing a lower stack of silicon layers above the lower electrode, and depositing an upper stack of silicon layers above the lower stack. The lower and upper stacks include N-I-P junctions. The lower stack has an energy band gap of at least 1.60 eV while the upper stack has an energy band gap of at least 1.80 eV. The method also includes providing an upper electrode above the upper stack. The lower and upper stacks convert incident light into an electric potential between the upper and lower electrodes with the lower and upper stacks converting different portions of the light into the electric potential based on wavelengths of the light.Type: ApplicationFiled: June 8, 2010Publication date: December 16, 2010Applicant: THINSILICION CORPORATIONInventors: Kevin Michael Coakley, Guleid Hussen, Jason Stephens, Kunal Girotra, Samuel Rosenthal
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Publication number: 20100304527Abstract: Embodiments of the invention contemplate the formation of high efficiency solar cells and novel methods for forming the same. Embodiment of the invention can be used to form a solar cell that has doped regions that act as a back surface field. The methods and apparatus disclosed herein may include the use of a doping source, a rapid annealer and a slow annealer. One embodiment of the methods used to form an improved emitter structure include disposing an amount of a dopant atom in a substrate and performing two or more thermal processing steps to cause the dopant to diffuse deeper into the substrate to achieve a desirable multi-facet doping profile.Type: ApplicationFiled: March 3, 2010Publication date: December 2, 2010Inventors: Peter BORDEN, Sunhom (Steve) Paak
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Publication number: 20100301445Abstract: A Schottky photodiode may include a monocrystalline semiconductor substrate having a front surface, a rear surface, and a first dopant concentration and configured to define a cathode of the Schottky photodiode, a doped epitaxial layer over the front surface of the monocrystalline semiconductor substrate having a second dopant concentration less than the first dopant concentration, and parallel spaced apart trenches in the doped epitaxial layer and having of a depth less than a depth of the doped epitaxial layer.Type: ApplicationFiled: May 28, 2010Publication date: December 2, 2010Applicant: STMicroelectronics S.r.l.Inventor: Massimo Cataldo Mazzillo
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Publication number: 20100297803Abstract: The present invention provides nanophotovoltaic devices having sizes in a range of about 50 nm to about 5microns, and method of their fabrication. In some embodiments, the nanophotovoltaic device includes a semiconductor core, e.g., formed of silicon, sandwiched between two metallic layers, one of which forms a Schottky barrier junction with the semiconductor core and the other forms an ohmic contact therewith. In other embodiment, the nanophotovoltaic device includes a semiconductor core comprising a p-n junction that is sandwiched between two metallic layers forming ohmic contacts with the core.Type: ApplicationFiled: August 6, 2010Publication date: November 25, 2010Applicant: SPIRE CORPORATIONInventors: Steven J. Wojtczuk, James G. Moe, Roger G. Little
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Patent number: 7838761Abstract: A method for manufacturing a solar cell includes (S1) forming, on a first conductive semiconductor substrate, a second conductive semiconductor layer having an opposite conduction type by means of ion implantation to form a pn junction in an interface thereof; (S2) treating an alkali solution on the second conductive semiconductor layer for texturing; (S3) forming an antireflection film on the textured second conductive semiconductor layer; (S4) forming a front electrode to pass through a partial region of the antireflection film and connect to a part of the second conductive semiconductor layer; and (S5) forming a rear electrode at an opposite side to the front electrode with the first conductive semiconductor substrate being interposed therebetween such that the rear electrode is connected to the first conductive semiconductor substrate. The second conductive semiconductor layer, namely an emitter layer, functions as an etch stop layer.Type: GrantFiled: October 25, 2007Date of Patent: November 23, 2010Assignee: LG Electronics Inc.Inventor: Seongeun Lee
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Publication number: 20100289107Abstract: A photodiode includes a first doped layer and a second doped layer adjacent to the first doped layer and sharing a common face. A deep isolation trench is provided adjacent the photodiode having a face contiguous with the first doped layer and the second doped layer. A free face of the second doped layer is in contact with a conducting layer. A protective layer capable of generating a layer of negative charge is provided at the interface between, on one side, the first doped layer and the second doped layer and, on the other side, the deep isolation trench.Type: ApplicationFiled: May 14, 2010Publication date: November 18, 2010Applicants: STMICROELECTRONICS S.A., STMICROELECTRONICS (CROLLES 2) SASInventors: Jorge Regolini, Luc Pinzelli
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Patent number: 7834379Abstract: The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its solubility to the dopant compared to the solubility of the multiplication layer to dopant. The solid source has a diameter between the first and second diffusion windows. Thus, there are three distinct diffusion regions during the second diffusion. The dopant in the multiplication layer at the edge region, the dopant from the solid source material with a relatively higher dopant concentration (limited by the solubility of the dopant in the solid source material) at the intermediate region, and the central region exposed to an infinite diffusion source from the solid source material as it is continually charged with new dopant from the external gas source.Type: GrantFiled: July 15, 2008Date of Patent: November 16, 2010Assignee: JDS Uniphase CorporationInventors: Zhong Pan, David Venables, Craig Ciesla
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Publication number: 20100279493Abstract: A system and method for intentional doping, including variable doping, within a semiconductor structure for improved efficiency is described. One embodiment includes a method for forming a semiconductor structure, the method comprising forming a first semiconductor layer, wherein the first semiconductor layer comprises a first semiconductor material, and forming a second semiconductor layer on the first semiconductor layer, wherein the second semiconductor layer comprises a second semiconductor material, wherein the second semiconductor material is an oppositely-typed semiconductor material from the first semiconductor material, and wherein the second semiconductor layer comprises a first region adjacent to the first semiconductor layer, wherein the first region comprises second semiconductor material, and a second region adjacent to the first region, wherein the second region comprises intentionally doped second semiconductor material to increase a built-in potential of the semiconductor structure.Type: ApplicationFiled: April 30, 2009Publication date: November 4, 2010Inventors: Kishore KAMATH, Alan R. DAVIES, Anders OLSSON
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Patent number: 7820475Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.Type: GrantFiled: December 20, 2006Date of Patent: October 26, 2010Assignee: Sunpower CorporationInventors: Denis De Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
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Publication number: 20100267188Abstract: Multi-zone, solar cell diffusion furnaces having a plurality of radiant element (SiC) or/and high intensity IR lamp heated process zones, including baffle, ramp-up, firing, soaking and cooling zone(s). The transport of solar cell wafers, e.g., silicon, selenium, germanium or gallium-based solar cell wafers, through the furnace is implemented by use of an ultra low-mass, wafer transport system comprising laterally spaced shielded metal bands or chains carrying non-rotating alumina tubes suspended on wires between them. The wafers rest on raised circumferential standoffs spaced laterally along the alumina tubes, which reduces contamination. The bands or chains are driven synchronously at ultra-low tension by a pin drive roller or sprocket at either the inlet or outlet end of the furnace, with appropriate tensioning systems disposed in the return path. The high intensity IR flux rapidly photo-radiation conditions the wafers so that diffusion occurs >3× faster than conventional high-mass thermal furnaces.Type: ApplicationFiled: April 16, 2010Publication date: October 21, 2010Applicant: TP SOLAR, INC.Inventors: Richard W. Parks, Peter G. Ragay, Luis Alejandro Rey Garcia
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Publication number: 20100259658Abstract: A solid-state image capturing element according to the present invention includes, disposed in a surface portion from an upper part of the photodiode region to the electric charge detecting section: a second conductivity type first region; a second conductivity type second region; and a second conductivity type third region, one end of which is adjacent to the second conductivity type second region and the other end of which is adjacent to the electric charge detecting section, where each impurity concentration of the first, second and third regions is set in a manner to form an electric field being directed from the second conductivity type first region through the second conductivity type second region to the second conductivity type third region.Type: ApplicationFiled: April 9, 2010Publication date: October 14, 2010Inventor: Takefumi KONISHI
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Publication number: 20100261305Abstract: A method is disclosed to make a multi-crystalline silicon film of a solar cell. The method includes the step of providing a ceramic substrate, the step of providing a titanium-based film on the ceramic substrate, the step of providing a p+-type back surface field layer on the titanium-based film, the step of providing a p?-type light-soaking layer on the p+-type back surface field layer and the step of conducting n+-type diffusive deposition of phosphine on the p?-type light-soaking layer based on atmospheric pressure chemical vapor deposition, thus forming an n+-type emitter on the p?-type light-soaking layer.Type: ApplicationFiled: October 31, 2007Publication date: October 14, 2010Inventors: Tsun-Neng Yang, Shan-Ming Lan, Chin-Chen Chiang, Wei-Yang Ma, Chien-Te Ku, Yu-Hsiang Huang
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Publication number: 20100244177Abstract: Disclosed herein is a photodiode cell, including: a first-type substrate; a second-type epitaxial layer disposed on the first-type substrate; heavily-doped second-type layers, each having a small depth, formed on the second-type epitaxial layer; and heavily-doped first-type layers, each having a narrow and shallow section, disposed on the second-type epitaxial layer and formed between the heavily-doped second-type layers, wherein the first-type and second-type have opposite doped states.Type: ApplicationFiled: May 12, 2009Publication date: September 30, 2010Inventors: Ha Woong Jeong, Kyoung Soo Kwon, Chae Dong Go, Deuk Hee Park
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Publication number: 20100248411Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; attaching a surrogate second substrate over the third solar subcell and removing the first substrate; and etching a first trough around the periphery of the solar cell to the surrogate second substrate so as to form a mesa structure on the surrogate second substrate and facilitate the removal of the solar cell from the surrogate second substrate.Type: ApplicationFiled: June 15, 2010Publication date: September 30, 2010Applicant: Emcore Solar Power, Inc.Inventors: Arthur Cornfeld, Tansen Varghese, Jacqueline Diaz
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Publication number: 20100243041Abstract: This invention relates to an apparatus and a method for solar cells with laser fired contacts in thermally diffused doped regions. The cell includes a doped wafer and a plurality of first highly doped regions having a first conductivity type. The cell also includes a plurality of second highly doped regions having an opposite conductivity type from the first conductivity type and a passivation layer disposed over at least a portion of each the plurality of first highly doped regions and the plurality of second highly doped regions. The cell also includes a network of conductors having a first conductor and a second conductor, and a plurality of contacts electrically connecting the first highly doped regions with the first conductor and electrically connecting the second highly doped regions with the second conductor.Type: ApplicationFiled: March 18, 2010Publication date: September 30, 2010Applicant: BP Corporation North America Inc.Inventors: David E. Carlson, Lian Zou, Murray S. Bennett, George Hmung
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Publication number: 20100240171Abstract: A multijunction solar cell is fabricated according to an embodiment by providing a substrate, depositing a nucleation first layer over and directly in contact with the substrate, depositing a second layer containing an arsenic dopant over the nucleation layer and depositing a sequence of layers over the second layer forming at least one solar subcell. The nucleation layer serves as a diffusion barrier to the arsenic dopant such that diffusion of the arsenic dopant into the substrate is limited in depth by the nucleation layer.Type: ApplicationFiled: April 8, 2010Publication date: September 23, 2010Applicant: Emcore Solar Power, Inc.Inventors: Mark A. Stan, Nein Y. Li, Frank A. Spadafora, Hong Q. Hou, Paul R. Sharps, Navid S. Fatemi
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Publication number: 20100233838Abstract: According to an embodiment, a method of manufacturing a solar cell includes depositing a sequence of layers of semiconductor material forming at least one solar cell on a first substrate; temporarily bonding a flexible film to a support second substrate; permanently bonding the sequence of layers of semiconductor material to the flexible film so that the flexible film is interposed between the first and second substrates; thinning the first substrate while bonded to the support substrate to expose the sequence of layers of semiconductor material; and subsequently removing the support substrate from the flexible film.Type: ApplicationFiled: March 10, 2009Publication date: September 16, 2010Applicant: Emcore Solar Power, Inc.Inventor: Tansen Varghese
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Publication number: 20100229925Abstract: Disclosed is a method for manufacturing a solar cell. The method includes forming an impurity layer on a substrate of a first conductive type, the impurity layer having impurities of a second conductive type opposite the first conductive type; forming a first emitter portion having a first impurity concentration in the substrate using the impurity layer by heating the substrate with the impurity layer; forming a second emitter portion having a second impurity concentration at the first emitter portion using the impurity layer by irradiating laser beams on a region of the impurity layer, the second impurity concentration being greater than the first impurity concentration; and forming a first electrode connected to the second emitter portion and a second electrode connected to the substrate.Type: ApplicationFiled: March 11, 2010Publication date: September 16, 2010Inventors: Hyungseok KIM, Jaewon Chang
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Patent number: 7794798Abstract: A method for depositing material on a substrate is described. The method comprises maintaining a reduced-pressure environment around a substrate holder for holding a substrate having a surface, and holding the substrate securely within the reduced-pressure environment. Additionally, the method comprises providing to the reduced-pressure environment a gas cluster ion beam (GCIB) from a pressurized gas mixture, accelerating the GCIB, and irradiating the accelerated GCIB onto at least a portion of the surface of the substrate to form a thin film. In one embodiment, the pressurized gas mixture comprises a silicon-containing specie and at least one of a nitrogen-containing specie or a carbon-containing specie for forming a thin film containing silicon and at least one of nitrogen or carbon. In another embodiment, the gas mixture comprises a metal-containing specie for forming a thin metal-containing film.Type: GrantFiled: September 29, 2007Date of Patent: September 14, 2010Assignee: TEL Epion Inc.Inventor: John J. Hautala
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Publication number: 20100206365Abstract: A method of manufacturing a solar cell by providing a first substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a surrogate second substrate on top of the sequence of layers; removing the first substrate; and thinning a plurality of discrete, spaced-apart portions of the backside of the surrogate second substrate so as to reduce its weight.Type: ApplicationFiled: February 19, 2009Publication date: August 19, 2010Applicant: Emcore Solar Power, Inc.Inventors: Daniel R. Chumney, Fred Newman
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Publication number: 20100193016Abstract: A process for producing a photovoltaic device having a substrate comprising silicon doped with a first dopant, the process comprising the steps of: a. forming a first layer over a front surface of the substrate, the first layer comprising a second dopant of a conductivity type opposite the first dopant; b. forming a second surface coating over the first layer; c. forming elongate grooves reaching or entering the silicon substrate, d. forming a third layer within the grooves, the layer comprising a third dopant of a conductivity type opposite to the first dopant; e. forming a contact finger system which intersects with the grooves to provide an electrically conducting front contact; and f. forming a second contact.Type: ApplicationFiled: August 21, 2007Publication date: August 5, 2010Applicant: BP Solar Espana, S.A. UnipersonalInventors: Juan M. Fernandez, Rafael M. Bueno, Carmen Morilla, Ines Vincueria
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Publication number: 20100186802Abstract: The present invention relates to improved HIT type or polysilicon emitter solar cells. According to certain aspects, the invention includes forming a masking oxide layer on the front and back of the cell and then patterning holes in the masking oxide. A HIT cell structure or polysilicon emitter solar cell structure is then formed over the patterned oxide, creating the cell junction only in the areas where holes have been cut. Benefits of the invention include that it provides a controlled interface for the HIT cell through insertion of a thin tunnel oxide. Moreover, the tunnel oxide prevents epitaxial growth of amorphous silicon, allowing it to remain amorphous for the optimum band structure. Still further, it provides a layer to protect the surface from plasma damage during deposition of the a-Si layer. Further, it may be used in conjunction with a point contact structure to further increase efficiency.Type: ApplicationFiled: January 27, 2009Publication date: July 29, 2010Inventor: Peter BORDEN
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Publication number: 20100186804Abstract: A method of forming a multijunction solar cell string by providing a first multijunction solar cell including a contact pad disposed adjacent the top surface of the multijunction solar cell along a first peripheral edge thereof; providing a second multijunction solar cell disposed adjacent said first multijunction solar cell, having a top surface and a bottom surface, and including a cut-out extending from a second peripheral edge along the top surface of the second solar cell located adjacent the first peripheral edge of said first multijunction solar cell, and extending to a metal contact layer adjacent the bottom surface of said second multijunction solar cell to allow an electrical contact to be made to the metal contact layer; mounting said first and said second multijunction solar cells on a first side of a perforated carrier; attaching a first electrical interconnect to the contact pad of said first multijunction solar cell, the electrical interconnect extending through said perforated carrier; attachiType: ApplicationFiled: January 29, 2009Publication date: July 29, 2010Applicant: Emcore Solar Power, Inc.Inventor: Arthur Cornfeld