Abstract: A photoelectric conversion device manufacturing system in which a photoelectric conversion device is manufactured, the photoelectric conversion device including a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer which are sequentially layered on a transparent-electroconductive film formed on a substrate in the photoelectric conversion device.

Abstract: A stacked-layered thin film solar cell and a manufacturing method thereof are provided. The stacked-layered thin film solar cell includes a front electrode layer, a stacked-layered light-absorbing structure, and a back electrode layer. The stacked-layered light-absorbing structure has a p-i-n-type layered structure and consists essentially of I-III-VI compounds, wherein the group III elements at least include indium (In) and aluminum (Al). The p-type layer of the stacked-layered light-absorbing structure is near the front electrode layer while the n-type layer is near the back electrode layer. The Al/In concentration ratio in the p-type layer is higher than that in the n-type layer.

Abstract: The invention relates to a method for production of a thin-layer solar cell with microcrystalline silicon and a layer sequence. According to the invention, a microcrystalline silicon layer is applied to the lower p- or n-layer in pin or nip thin-layer solar cells, by means of a HWCVD method before the application of the microcrystalline i-layer. The efficiency of the solar cell is hence increased by up to 0.8% absolute.

Abstract: Cadmium telluride thin film photovoltaic devices are generally disclosed including an intermixed layer of cadmium sulfide and cadmium telluride between a cadmium sulfide layer and a cadmium telluride layer. The intermixed layer generally has an increasing tellurium concentration and decreasing sulfur concentration extending in a direction from the cadmium sulfide layer towards the cadmium telluride layer. Methods are also generally disclosed for manufacturing a cadmium telluride based thin film photovoltaic device having an intermixed layer of cadmium sulfide and cadmium telluride.

Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.

Abstract: There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×1016-1×1017 atoms/cm3 and solid-soluted oxygen having a concentration of 1.4×1018-1.6×1018 atoms/cm3.

Abstract: A photoelectric conversion device manufacturing method manufactures a photoelectric conversion device in which a first photoelectric conversion unit and a second photoelectric conversion unit are sequentially stacked on a transparent-electroconductive film formed on a substrate. The method includes: forming each of a first p-type semiconductor layer, a first i-type semiconductor layer, a first n-type semiconductor layer, and a second p-type semiconductor layer in a plurality of first plasma CVD reaction chambers; exposing the second p-type semiconductor layer to an air atmosphere; supplying a gas including p-type impurities to inside a second plasma CVD reaction chamber before forming of the second i-type semiconductor layer; forming the second i-type semiconductor layer on the second p-type semiconductor layer that was exposed to an air atmosphere, in the second plasma CVD reaction chamber; and forming the second n-type semiconductor layer on the second i-type semiconductor layer.

Abstract: Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a dopant into a semiconductor to form a p-n junction in the device region. The dopant is diffused through a first diffusion window to form the device region and a second diffusion window to form the diffusion sink. The depth of the p-n junction is based on an attribute of the second diffusion window.

Abstract: Image sensors have photodiodes separated by isolations regions formed from p-well or n-well implants. Isolation regions may be formed that are narrow and deep. Isolation regions may be formed in a multi-step process that selectively places implants at desired depths in a substrate. Complementary photoresist patterns may be used. To form an implant near the surface of a substrate, a photoresist pattern with openings over the desired implant area may be used. Subsequent implantation may use a complementary pattern such that ions pass through photoresist before implanting in desired regions of a substrate.

Abstract: A high operating temperature split-off band infrared (SPIP) detector having a double and/or graded barrier on either side of the emitter is provided. The photodetector may include a first and second barrier and an emitter disposed between the first and second barriers so as to form a heterojunction at each interface between the emitter and the first and second barriers, respectively. The emitter may be of a first semiconductor material having a split-off response to optical signals, while one of the first or the second barriers may include a double barrier having a light-hole energy band level that is aligned with the split-off band energy level of the emitter. In addition, the remaining barrier may be graded.

Abstract: Described herein is a device operable to detect polarized light comprising: a substrate; a first subpixel; a second subpixel adjacent to the first subpixel; a first plurality of features in the first subpixel and a second plurality of features in the second subpixel, wherein the first plurality of features extend essentially perpendicularly from the substrate and extend essentially in parallel in a first direction parallel to the substrate and the second plurality of features extend essentially perpendicularly from the substrate and extend essentially in parallel in a second direction parallel to the substrate; wherein the first direction and the second direction are different; the first plurality of features and the second plurality of features react differently to the polarized light.

Abstract: A photoelectric conversion device having a high electric generating capacity at low illuminance, in which a semiconductor layer is appropriately separated and short circuit of a side surface portion of a cell is prevented. The photoelectric conversion device includes an isolation groove formed between one first electrode and the other first electrode that is adjacent to the one first electrode; a stack including a first semiconductor layer having one conductivity type over the first electrode, a second semiconductor layer formed using an intrinsic semiconductor, and a third semiconductor layer having a conductivity type opposite to the one conductivity type; and a connection electrode connecting one first electrode and a second electrode that is in contact with a third semiconductor layer included in a stack formed over the other first electrode that is adjacent to the one first electrode. A side surface portion of the second semiconductor layer is not crystallized.

Abstract: A photoelectric conversion device having a new anti-reflection structure is provided. A photoelectric conversion device includes a first-conductivity-type crystalline semiconductor region that is provided over a conductive layer; a crystalline semiconductor region that is provided over the first-conductivity-type crystalline semiconductor region and has an uneven surface by including a plurality of whiskers including a crystalline semiconductor; and a second-conductivity-type crystalline semiconductor region that covers the uneven surface of the crystalline semiconductor region having the uneven surface, the second conductivity type being opposite to the first conductivity type. In the photoelectric conversion device, a concentration gradient of an impurity element imparting the first conductivity type is formed from the first-conductivity-type crystalline semiconductor region toward the crystalline semiconductor region having the uneven surface.

Abstract: An object is to provide a photoelectric conversion device in which defects are suppressed as much as possible by filling a separation process region of a semiconductor film with an insulating resin. A photoelectric conversion device includes a first conductive layer formed over a substrate; first to third semiconductor layers formed over the first conductive layer; a second conductive layer formed over the third semiconductor layer; a first separation groove for separating the first conductive layer and the first to third semiconductor layers into a plurality of pieces; a second separation groove for separating the first to third semiconductor layers into a plurality of pieces; and a third separation groove for separating the second conductive layer into a plurality of pieces. An insulating resin is filled in a structural defect that exists in at least one of the first to third semiconductor layers, and in the first separation groove.

Abstract: A method of forming an electrode, by which the resistance of the electrode can be reduced, and a method of manufacturing a solar cell using the method of forming an electrode are provided. The electrode forming method includes coating conductive paste on a substrate, forming a metal layer by drying the conductive paste or heating the same at low temperature, and annealing the metal layer by Joule heating using the metal layer by applying an electric field to the metal layer.

Abstract: An energy efficient triple junction InGaP/GaAs/Ge solar cell. In one embodiment, the triple junction InGaP/GaAs/Ge solar cell includes: a bottom Ge layer; a first tunnel junction layer above the bottom Ge layer; a middle GaAs layer above the first tunnel junction layer; a second tunnel junction layer above the middle GaAs layer; and a top InGaP layer above the second tunnel junction layer.

Abstract: Solar cells and methods for their manufacture are disclosed. An example method may include providing a silicon substrate and introducing dopant to one or more selective regions of the front surface of the substrate by ion implantation. The substrate may be subjected to a single high-temperature anneal cycle. Additional dopant atoms may be introduced for diffusion into the front surface of the substrate during the single anneal cycle. A selective emitter may be formed on the front surface of the substrate such that the one or more selective regions of the selective emitter layer are more heavily doped than the remainder of the selective emitter layer. Associated solar cells are also provided.

Abstract: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

Abstract: A compound semiconductor solar battery including a first compound semiconductor photoelectric conversion cell, a second compound semiconductor photoelectric conversion cell provided on the first compound semiconductor photoelectric conversion cell, and a compound semiconductor buffer layer provided between the first compound semiconductor photoelectric conversion cell and the second compound semiconductor photoelectric conversion cell, the first compound semiconductor photoelectric conversion cell and the compound semiconductor buffer layer being provided adjacent to each other, and a ratio of a difference in lattice constant between the first compound semiconductor photoelectric conversion cell and a compound semiconductor layer provided in a position closest to the first compound semiconductor photoelectric conversion cell among compound semiconductor layers constituting the compound semiconductor buffer layer being not less than 0.15% and not more than 0.

Abstract: Disclosed is a solar cell and a method for manufacturing the same, which facilitates to improve cell efficiency by smoothly drifting carrier such as hole or electron generated in a semiconductor wafer to first and second electrodes, the solar cell comprising a semiconductor wafer having a predetermined polarity; a first semiconductor layer on one surface of the semiconductor wafer; a first transparent conductive layer on the first semiconductor layer; a first electrode on the first transparent conductive layer; a second semiconductor layer on the other surface of the semiconductor wafer, wherein the second semiconductor layer is different in polarity from the first semiconductor layer; a second transparent conductive layer on the second semiconductor layer; a second electrode on the second transparent conductive layer; and at least one of first and second auxiliary layers, wherein the first auxiliary layer is formed between the first semiconductor layer and the first transparent conductive layer so as to smoo

Abstract: A solar cell capable of restricting carrier loss and yields higher energy conversion efficiency than was conventionally possible and a method of producing a solar cell enabling formation of a light absorbing layer containing quantum dots through a low-temperature process using a coating or printing method requiring no vacuum equipment or complicated apparatuses. The solar cell includes a light absorbing layer containing quantum dots in a matrix layer, and the light absorbing layer is connected to an N-type semiconductor layer on one side and to a P-type semiconductor layer on the other side. In the light absorbing layer, the quantum dots are made of nanocrystalline semiconductor and arranged 3-dimensionally uniformly enough and spaced regularly so that a plurality of wave functions lie on one another between adjacent quantum dots to form intermediate bands. The matrix layer is formed of amorphous IGZO.

Abstract: A solar cell and method of fabricating the same using a simplified process. The solar cell includes a semiconductor substrate of a first conductivity type having a front surface configured to receive sunlight and a back surface opposite to the front surface, and a diffusion region of the first conductivity type and a diffusion region of a second conductivity type extending from the back surface of the semiconductor substrate into the semiconductor substrate to a predetermined depth, wherein the diffusion region of the first conductivity type is counter doped with both a dopant of the first conductivity type and a dopant of the second conductivity type.

Abstract: A single carrier avalanche photodiode (200) comprising a p-doped absorption layer (213), an unintentionally doped avalanche multiplication layer (203) and an n-doped collector layer (211) and a method of manufacturing said avalanche photodiode. The absorption layer is doped at a level that allows the photodiode to operate as a single carrier device. Therefore total delay time of the device is mainly dependent on electrons. The collector layer is in charge of reducing capacitance in the device. A built-in field layer (212) of n+? doped material may be provided between the two layers in order to improve the injection of electrons in the collector layer.

Abstract: There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×1016-1×1017 atoms/cm3 and solid-soluted oxygen having a concentration of 1.4×1018-1.6×1018 atoms/cm3.

Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The metal grid includes at least one of: Cu and Ni.

Abstract: A method for improving the overall quantum efficiency and output voltage in solar cells using spontaneous ordered semiconductor alloy absorbers to form a DOH below the front or above the back surface of the cell.

Abstract: A template for three-dimensional thin-film solar cell substrate formation for use in three-dimensional thin-film solar cells. The template comprises a substrate which comprises a plurality of posts and a plurality of trenches between said plurality of posts. The template forms an environment for three-dimensional thin-film solar cell substrate formation.

Abstract: Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystalized silicon layer is formed on the back side of the substrate. The recrystalized silicon layer has different photoluminescence intensity than the substrate.

Abstract: A photodiode capable of interacting with incident photons includes at least: a stack of three layers including an intermediate layer placed between a first semiconductor layer and a second semiconductor layer having a first conductivity type; and a region that is in contact with at least the intermediate layer and the second layer and extends transversely relative to the planes of the three layers, the region having a conductivity type that is opposite to the first conductivity type. The intermediate layer is made of a semiconductor material having a second conductivity type and is capable of having a conductivity type that is opposite to the second conductivity type so as to form a P-N junction with the region, inversion of the conductivity type of the intermediate layer being induced by dopants of the first conductivity type that are present in the first and second layers.

Abstract: Disclosed is a photovoltaic device that comprises: a first electrode including a transparent conductive oxide layer; a first unit cell being placed on the first electrode; a second unit cell being placed on the first unit cell; and a second electrode being placed on the second unit cell, wherein the intrinsic semiconductor layer of the first unit cell includes hydrogenated amorphous silicon or hydrogenated amorphous silicon based material, wherein an intrinsic semiconductor layer of the second unit cell includes hydrogenated microcrystalline silicon or hydrogenated microcrystalline silicon based material, and wherein a ratio of a root mean square roughness to an average pitch of a texturing structure formed on the surface of the first electrode is equal to or more than 0.05 and equal to or less than 0.13.

Abstract: Multi-zone, solar cell diffusion furnaces having a plurality of radiant element (SiC) or/and high intensity IR lamp heated process zones, including baffle, ramp-up, firing, soaking and cooling zone(s). The transport of solar cell wafers, e.g., silicon, selenium, germanium or gallium-based solar cell wafers, through the furnace is implemented by use of an ultra low-mass, wafer transport system comprising laterally spaced shielded metal bands or chains carrying non-rotating alumina tubes suspended on wires between them. The wafers rest on raised circumferential standoffs spaced laterally along the alumina tubes, which reduces contamination. The bands or chains are driven synchronously at ultra-low tension by a pin drive roller or sprocket at either the inlet or outlet end of the furnace, with appropriate tensioning systems disposed in the return path. The high intensity IR flux rapidly photo-radiation conditions the wafers so that diffusion occurs >3× faster than conventional high-mass thermal furnaces.

Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; attaching a surrogate second substrate over the third solar subcell and removing the first substrate; and etching a first trough around the periphery of the solar cell to the surrogate second substrate so as to form a mesa structure on the surrogate second substrate and facilitate the removal of the solar cell from the surrogate second substrate.

Abstract: Provided is an image sensor and method for manufacturing the same. The image sensor includes a semiconductor substrate including a photodiode for each unit pixel, an interlayer insulating layer including metal lines on the semiconductor substrate, and an optical refractive part in a region of the interlayer insulating layer corresponding to the photodiode for focusing light on the photodiode. The optical refractive part can be formed by implanting impurities into the interlayer insulating layer.

Abstract: A solid-state image capturing device, includes a semiconductor board, upon which same semiconductor board are disposed in a predetermined order: a first detecting unit for detecting a first wavelength region component within an electromagnetic wave; and a second detecting unit for detecting a second wavelength region component which is longer wavelength side than at least the first wavelength region component, wherein in the depth direction from the surface of the semiconductor board, a valid region where a first electroconductive type dopant of the second detecting unit is formed reaches a portion deeper than a valid region where a first electroconductive type dopant of the first detecting unit is formed.

Abstract: The present invention relates to a solar cell that can recycle a substrate, and a manufacturing method thereof. The solar cell includes: i) a plurality of nano-structures distanced from each other and extended in one direction; ii) a first conductive layer covering a first end of at least one of the plurality of nano-structures; iii) a second conductive layer distanced from the first conductive layer and covering a second end of the nano-structure; and iv) a dielectric layer disposed between the first conductive layer and the second conductive layer.

Abstract: To provide a dye-sensitized solar cell capable of significantly improving power extraction efficiency, and a manufacturing method of the dye-sensitized solar cell. The dye-sensitized solar cell includes a substrate, a porous semiconductor layer adsorbing a dye, a conductive metal layer, and a conductive substrate. The conductive metal layer 16 is a current collector provided on the side of the porous semiconductor layer, the side being opposite to the side on which the substrate is arranged. The conductive metal layer 16 is configured by a conductive metal section 17 made of a mesh member, and a coating section 19 formed on the conductive metal section 17. The coating section 19 is configured by an inner layer 19a and an outer layer 19b, and has a graded composition structure in which the degree of oxidization of the coating section is increased from the side of the conductive metal section 17 toward the side of the porous semiconductor layer 14.

Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.

Abstract: A multiple-junction photoelectric device includes a substrate on which a first conducting layer is deposited, at least two elementary photoelectric devices of n-i-p or n-p configuration, on which a second conducting layer is deposited, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, top and bottom faces, the latter having a peak-valley roughness >150 nm, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom<?90top by at least 3; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination ?this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the surface of the bottom face of the intermediate layer have an inclination ?this angle.

Abstract: Disclosed is a solar cell and a method for manufacturing the same, which facilitates to prevent residual matters from remaining between first and second electrodes, to minimize a substrate-sagging problem even though plural layers are deposited on a substrate under high-temperature conditions, and to minimize the number of times of laser-scribing process. The solar cell comprises a substrate including a through-hole; a first electrode on one surface of the substrate, wherein one end of the first electrode is extended to an inner surface of the through-hole; a semiconductor layer on the first electrode; a second electrode on the semiconductor layer, wherein one end of the second electrode is extended to the inner surface of the through-hole; and a connecting portion for electrically connecting the one end of the first electrode with the one end of the second electrode.

Abstract: Heterojunction devices and associated methods of making and using are provided. In one aspect, for example, a heterojunction photovoltaic device can include a crystalline semiconductor layer, a first doped semiconductor layer coupled to the crystalline semiconductor layer, and a second doped semiconductor layer coupled to the crystalline semiconductor layer opposite the first doped semiconductor layer. The first and second doped semiconductor layers form junctions with the semiconductor layer. The device can further include a laser processed semiconductor region coupled to the crystalline semiconductor layer.

Abstract: A process for producing a high-performance photovoltaic device by depositing a high-quality crystalline silicon layer, and a deposition apparatus for depositing the high-quality crystalline silicon layer. A process for producing a photovoltaic device that comprises forming a crystalline silicon-based photovoltaic layer comprising an i-layer on a substrate using a plasma-enhanced CVD method, wherein formation of the i-layer comprises an initial layer deposition stage and a bulk i-layer deposition stage, and the initial layer deposition stage comprises depositing the initial layer using a silane-based gas flow rate during the initial layer deposition stage that is lower than the silane-based gas flow rate during the bulk i-layer deposition stage, with the deposition time for the initial layer deposition stage set to not less than 0.

Abstract: A method for manufacturing a silicon-based thin film solar cell including a crystalline silicon photoelectric conversion unit which contains a p-type layer (4p), a crystalline i-type silicon photoelectric conversion layer (4ic), and an n-type layer (4nc) stacked in this order from a transparent substrate side is provided. In one example, an n-type silicon-based thin film layer (4na) is formed on the crystalline i-type silicon photoelectric conversion layer (4ic), there is formed an the n-type silicon-based thin film layer (4na) having an n-type silicon alloy layer having a film thickness of 1-12 nm and being in contact with the crystalline i-type silicon photoelectric conversion layer.

Abstract: A thin film photovoltaic device on a substrate is being realized by a method for manufacturing a p-i-n junction semiconductor layer stack with a p-type microcrystalline silicon layer, a p-type amorphous silicon layer, a buffer silicon layer comprising preferably intrinsic amorphous silicon, an intrinsic type amorphous silicon layer, and an n-type silicon layer over the intrinsic type amorphous silicon layer.

Abstract: A solar cell includes a nano-scale patterned back contact layer; a spacer layer on the nano-scale patterned back contact layer; a semiconductor layer on the spacer layer; and a light transmissive first electrode on the semiconductor layer.

Abstract: The invention relates to a heterojunction solar cell and a method for the production thereof. The heterojunction solar cell has an absorber layer made of silicon with a basic doping and at least one heterojunction layer of a doped semiconductor material whose band gap differs from that of the silicon of the absorber layer. The absorber layer has a doped layer at an interface directed toward the heterojunction layer, the doping concentration of said doped layer being greater than the basic doping concentration of the absorber layer. As a result of this doping profile, a field effect can be caused which prevents charge carrier pairs produced within the absorber layer from diffusing toward the interface between the absorber layer and the heterojunction layer and from recombining there.

Abstract: A photodiode (7) formed in a polycrystalline silicon layer or a continuous grain silicon layer on a base substrate (5) of a display device includes a semiconductor region of a first conductivity-type (n layer (21)), an intrinsic semiconductor region (i layer (22)), and a semiconductor region of a second conductivity-type (p layer (23)) that is opposite from the first conductivity-type. At least a portion of the intrinsic semiconductor region (i layer (22)) is amorphous silicon.

Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a antireflection coating layer disposed on a first surface of a substrate, a barrier layer disposed on a second surface of the substrate, a first transparent conductive oxide layer disposed on the barrier layer, a conductive contact layer disposed on the first transparent conductive oxide layer, a first p-i-n junction formed on the conductive contact layer, and a second transparent conductive oxide layer formed on the first p-i-n junction.

Abstract: The present invention relates to a fast and inexpensive method which can be carried out locally for the wet-chemical edge deletion of “solar modules” by applying etching pastes which are suitable for this purpose and, when the reaction is complete, removing the paste residues or cleaning the substrate surface in a suitable manner. An etching paste newly developed for the purpose is employed in the method.

Abstract: A solar cell and a manufacturing method thereof have been disclosed in the present invention. According to the present invention, the p-layer or n-layer with the grooves helps to strengthen the electric filed of the solar cell and facilitates the carrier collection, thereby improving the overall efficiency of the solar cell.