Abstract: A method for fabricating an image sensor comprises forming an over coat layer on an upper face of a semiconductor substrate on which a color filter layer is formed, forming a microlens on the over coat layer; covering the microlens with a protection layer, back grinding a lower face of the semiconductor substrate, and removing the protection layer of the microlens. In this method, the protection layer is formed on the microlens of an image sensor and is subsequently removed after back grinding.

Abstract: A photonic device suitable for being optically coupled to at least one optical fiber having a first spot-size, the device including: at least one photonic component; and, a graded index lens optically coupled between the at least one photonic component and the at least one optical fiber; wherein, the graded index lens is adapted to convert optical transmissions from the at least one photonic component to the first spot size.

Abstract: A semiconductor structure and method of processing same including a substrate, a lattice-mismatched first layer deposited on the substrate and annealed at a temperature greater than 100° C. above the deposition temperature, and a second layer deposited on the first layer with a greater lattice mismatch to the substrate than the first semiconductor layer. In another embodiment there is provided a semiconductor graded composition layer structure on a semiconductor substrate and a method of processing same including a semiconductor substrate, a first semiconductor layer having a series of lattice-mismatched semiconductor layers deposited on the substrate and annealed at a temperature greater than 100° C. above the deposition temperature, a second semiconductor layer deposited on the first semiconductor layer with a greater lattice mismatch to the substrate than the first semiconductor layer, and annealed at a temperature greater than 100° C. above the deposition temperature of the second semiconductor layer.

Abstract: An aspect of the present invention is directed to an avalanche photodiode (APD) device for use in oil well drilling applications in harsh, down-hole environments where shock levels are near 250 gravitational acceleration (G) and/or temperatures approach or exceed 150° C. Another aspect of the present invention is directed to an APD device fabricated using SiC materials. Another aspect of the present invention is directed to an APD device fabricated using GaN materials.

Abstract: A nitride-based semiconductor light-emitting device includes a GaN-based substrate and a semiconductor stacked-layer structure including a plurality of nitride-based semiconductor layers grown on the GaN-based substrate by vapor deposition. The GaN-based substrate has an interface region contacting the semiconductor stacked-layer structure and the interface region contains oxygen atoms of concentration n in the range of 2×1016≦n≦1022 cm−3.

Abstract: The present invention provides an epitaxially grown compound semiconductor film having a low density of crystal defects which are generated during the course of crystal growth of a compound semiconductor. The present invention also provides a compound semiconductor multi-layer structure including an n-type InP substrate, an n-type InP buffer layer, an undoped InGaAs light-absorbing layer, and an n-type InP cap layer, the layers being successively grown on the substrate through MOCVD. In the InGaAs layer, the compositional ratio of In/Ga is cyclically varied in a thickness direction (cyclic intervals: 80 nm) so as to fall within a range of ±2% with respect to a predetermined compositional ratio that establishes lattice matching between InGaAs and InP; specifically, within a range between 0.54/0.46 (i.e., In0.54Ga0.46As) and 0.52/0.48 (i.e., In0.52Ga0.

Abstract: A semiconductor light receiving device is provided, which comprises a semiconductor substrate, a collector region, a base region, and an emitter region, an insulating film covering the surface of the collector region, the base region, and the emitter region, a first metal line on the insulating film at a position corresponding to the base region and being electrically connected to the emitter region, and a second metal line on the insulating film at a position corresponding to a junction portion of the base region and the collector region and being electrically connected to the emitter region. The first metal line has a sloped surface such that incident light falling on the first metal line is reflected and directed toward the surface of the base region.

Abstract: A method of manufacturing a solar cell comprises interposing an intermediate layer containing p-type or n-type impurity between a silicon thin film and a support substrate, and heating all or part of the structure thus formed to a temperature at which the impurity contained in the intermediate layer diffuses into the silicon thin film, forming a high-concentration impurity layer in the silicon thin film.

Abstract: An optical silicon-based detector with a porous filter layer that has a laterally modifiable filter effect, comprising a plurality of integrated photosensitive cells. The invention also relates to a method for the production of an optical detector by creating an insulating layer on the porous filter layer and by providing active filter surfaces.

Abstract: A retrograde and periphery well structure for a CMOS imager is disclosed which improves the quantum efficiency and signal-to-noise ratio of the photosensing portion imager. The retrograde well comprises a doped region with a vertically graded dopant concentration that is lowest at the substrate surface, and highest at the bottom of the well. A single retrograde well may have a single pixel sensor cell, multiple pixel sensor cells, or even an entire array of pixel sensor cells formed therein. The highly concentrated region at the bottom of the retrograde well repels signal carriers from the photosensor so that they are not lost to the substrate, and prevents noise carriers from the substrate from diffusing up into the photosensor. The periphery well contains peripheral logic circuitry for the imager. By providing retrograde and peripheral wells, circuitry in each can be optimized. Also disclosed are methods for forming the retrograde and peripheral well.

Abstract: A method of preparing an efficient photoresponsive device includes the steps of providing a first electrode on a substrate, providing a layer of an organic material including a blend of at least two semiconductive polymers having different electrode affinities and/or different ionization potentials over the first electrode, providing a second electrode over the layer of organic material, at least one of the electrodes being a transparent or semi-transparent, to form a photoresponsive device, and thermally annealing the photoresponsive device.

Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.

Abstract: A retrograde well structure for a CMOS imager that improves the quantum efficiency and signal-to-noise ratio of the imager. The retrograde well comprises a doped region with a vertically graded dopant concentration that is lowest at the substrate surface, and highest at the bottom of the well. A single retrograde well may have a single pixel sensor cell, multiple pixel sensor cells, or even an entire array of pixel sensor cells formed therein. The highly concentrated region at the bottom of the retrograde well repels signal carriers from the photosensor so that they are not lost to the substrate, and prevents noise carriers from the substrate from diff-using up into the photosensor. Also disclosed are methods for forming the retrograde well.

Abstract: The present invention relates to a CMOS image sensor and a fabrication method thereof. The sensor has a photo diode region being extended to a lower portion of an active region in which a transfer gate, sensing gate and reset gate are formed and therefrom the sensitivity of the CMOS image sensor is enhanced. The sensor of the present invention includes a unit cell region having a first region and a second region adjacent to the first region, a PDN region having a first PDN region which is extended from the surface in the first region into the bulk in a direction perpendicular to the surface in an accompanying drawing and a second PDN region which is extended from the lower portion of the first PDN region into the lower portion of the second region in a horizontal direction in the accompanying drawing, and a floating diffusion region and a reset region which are formed in a surface of the second region above the second PDN region.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.

Abstract: A thin-film flexible solar cell built on a plastic substrate comprises a cadmium telluride p-type layer and a cadmium sulfide n-type layer sputter deposited onto a plastic substrate at a temperature sufficiently low to avoid damaging or melting the plastic and to minimize crystallization of the cadmium telluride. A transparent conductive oxide layer overlaid by a bus bar network is deposited over the n-type layer. A back contact layer of conductive metal is deposited underneath the p-type layer and completes the current collection circuit. The semiconductor layers may be amorphous or polycrystalline in structure.

Abstract: One or more deep-array implants under the photosensitive region of a semiconductor substrate are conducted to improve optical cross-talk between pixel cells. According to an embodiment of the present invention, one or more deep-array implants of a first conductivity type are used to dope predefined regions of a well of a second conductivity type. This way, first conductivity type dopants from the one or more deep-array implants counterdope second conductivity type dopants from the predefined regions of the well. The dosage and energy of each deep-array implant may be optimized so that the collection of signal carriers by the photosensitive region and the photoresponse for different wavelengths are maximized.

Abstract: A light-emitting device (1000) has a light-emitting device section (100) and a waveguide section (200) for transmitting light emitted from the light-emitting device section, which are integrally formed on a substrate (10). The light-emitting device section (100) has a transparent anode (200) which is formed on the substrate (10) and forms a light-transmitting section, a grating which is formed in part of the anode (20), an insulation layer (16) having an opening (16a) facing the grating (12), a light-emitting layer (14) at least part of which is formed in the opening (16a) of the insulation layer (16), and a cathode (22). A waveguide section (200) has a core layer (30) which is formed on the substrate (10) and is integrally formed with the anode (20), and a cladding layer (32) which covers an exposed area of the core layer (30) and is integrally formed with the insulation layer (16).

Abstract: A photodiode with an optimized floating P+ region for a CMOS image sensor. The photodiode is constructed with a P+/Nwell/Psub structure. The Nwell/Psub junction of the photodiode acts as a deep junction photodiode which offers high sensitivity. The P+ floating region passivates the silicon surface to reduce dark currents. Unlike a traditional pinned photodiode structure, the P+ region in the present invention is not connected to the Pwell or Psub regions, thus making the P+ region floating. This avoids the addition of extra capacitance to the cell. The photodiode may be included as part of an active pixel sensor cell, the layout of which is fully compatible with the standard CMOS fabrication process. This type of active pixel sensor cell includes the photodiode, and may be configured with a three transistor configuration for reading out the photodiode signals.

Abstract: Semiconductor photo sensor and semiconductor wafer processing designs are disclosed. The disclosed designs provide significantly improved photo sensor performance within the framework of a CMOS process. CMOS compatible fabrication procedures are presented, that enable tailoring of the 3-dimensional doping profile and defect structure within a photo sensor, to optimize light detection efficiency and minimize noise from dark current.

Abstract: A solar cell comprises a superstrate formed from a material that is transparent to light, a first layer formed of delta doped silicon, a plurality of layers formed from semiconductor materials, each characterized by multi-quantum wells and multiple band gaps, a first semiconductor layer having a band gap energy state that is the smallest, the last semiconductor layer having-a band gap that is the largest, and the intermediate semiconductor layers having band gaps transitioning from the smallest to the largest, a second layer overlying the semiconductor layers and formed of delta doped silicon, an n-cap layer formed on the second delta doped layer, and a metal layer formed on the n-cap layer and serving to reflect light into the semiconductor.

Abstract: The present invention provides a semiconductor light-emitting device including a Si substrate, a first clad layer, and an intermediate layer of n-AlInN between the substrate and the first clad layer. The intermediate layer is formed of AlxGayInzN, wherein x+y+z=1, 0≦y≦0.5, and 5/95≦z/x≦40/60. Thus on the Si substrate there can be provided a nitride-based, light emitting semiconductor device of high quality capable of electrical conduction from the Si substrate.

Abstract: A powder glass solution is applied on top of a solar cell 12 with electrodes 17 formed thereon, and solvent is volatilized, followed by baking process, by which a glass 13 is directly formed on the top of the solar cell 12. In this way, the alignment between solar cell and glass as well as the finish work of removing overflowed adhesive are eliminated. Also, by selecting a powder glass having a coefficient of thermal expansion generally similar to that of a P-type silicon substrate 14, distortion by heating due to abrupt temperature changes is reduced. Thus, cost reduction and reliability improvement can be fulfilled.

Abstract: A method for manufacturing a semiconductor optical waveguide comprises the steps of forming a core layer having an Al content which monotonically increases from the central part thereof to the film surface, and selectively oxidizing the core layer to obtain a peripheral, oxidized region and a central, non-oxidized region acting as a waveguide. The waveguide is tapered to have a circular mode field at the distal end thereof for efficiently coupling with an optical fiber.

Abstract: A process for producing a thin film semiconductor solar cell, said solar cell at least comprising: a p-type layer, and an n-type layer, which are deposited on carrier material, wherein the composition of the p-type layer, especially the optical band gap and/or the specific conductivity, and/or the composition of the n-type layer, especially the optical band gap and/or the specific conductivity thereof, are varied on a continuous way in time and/or space, by controlling the composition and/or flow of predetermined gases at the location where the respective semiconductor layer is formed.

Abstract: In a solar cell, a crystal defect layer by ion implantation or an amorphous layer by ion implantation is formed between p type diffusion layers provided in an island-like manner at a side opposite to a light receiving surface of a low concentration p type semiconductor single crystalline substrate. The element of the ion implantation may be at least one selected from the group consisting of hydrogen, silicon, germanium, fluorine, oxygen and carbon. The constituent substance of the semiconductor substrate, such as Si is preferably used for the ion implantation. In such a solar cell structure having the crystal defect or amorphous layer, relatively long wavelength light that could not effectively be utilized in the prior art solar cell may be utilized so that the photoelectric conversion efficiency may be improved.

Abstract: A photovoltaic element is formed by providing a substrate under vacuum; introducing a sputter gas and applying RF power to generate a plasma and provide a photovoltaic element having a substrate, a zinc oxide layer containing fluorine on the substrate, wherein a fluorine-containing zinc oxide layer is employed as a target.

Abstract: An amorphous silicon germanium thin film is disclosed which contains hydrogen and germanium in concentrations of 5-10 atomic percent and 40-55 atomic percent, respectively for exhibiting the optical gap in the range of 1.30-1.40 eV. Also disclosed is a photovoltaic element incorporating the amorphous silicon germanium thin film.

Abstract: A solar cell utilizing a chalcopyrite semiconductor and reducing the density of defects on the junction interface of pn junctions is provided. This solar cell includes a substrate, a back electrode formed on the substrate, a p-type chalcopyrite semiconductor thin film formed on the back electrode, an n-type semiconductor thin film formed so as to constitute a pn junction with the p-type chalcopyrite semiconductor thin film, and a transparent electrode formed on the n-type semiconductor thin film. A material having a higher resistivity than the p-type chalcopyrite semiconductor is formed between the p-type chalcopyrite semiconductor thin film and the n-type semiconductor thin film. A thin film made of this material may be formed by deposition from a solution. For example, CuInS.sub.2 is formed on the surface of a p-type chalcopyrite based semiconductor such as CuInSe.sub.

Abstract: In one embodiment, a semiconductor structure is disclosed. The structure includes both a silicon and a cadmium telluride layer. Each may have a (100) lattice orientation. A plurality of buffer layers are disposed between the silicon layer and the cadmium telluride layer. Each of these buffer layers has a lattice constant which is greater than the lattice constant of the layer below it and less than the lattice constant of the layer above it. As examples, these buffer layers may comprise zinc sulfide, zinc selenide, zinc telluride or zinc tellurium selenide.

Abstract: A green-blue to ultraviolet light emitting semiconductor laser having a top contact, a Bragg reflector, cladding layer, active layer, cladding layer, buffer, substrate, bottom contact and a passivation layer. The key aspect is a Ga*N material on a base structure comprising a SiC substrate selected from a group consisting of 2H-SiC, 4H-SiC and a-axis oriented 6H-SiC. Furthermore, the cladding layers have larger band gaps than the active layer and are complimentarily doped.

Abstract: This invention relates to a process and structure for performing a high temperature or other process on both sides of a thin slice of material or die prior to being placed onto a integrated circuit or multi-chip module. In a particular embodiment, a process and structure is given to provide for double sided interdiffusion for passivation of a Mercury Cadmium Telluride (MCT) film which is mounted to a read-out integrated circuit (ROIC) face side up in order to fabricate vertically integrated Focal Plane Arrays (FPAs) with reduced dark currents and improved performance. The process of the present invention also allows for the insertion of novel materials such as Double Layer Heterojunction (DLHJ), MBE, MOCVD, etc. in the vertical integrated approach to FPAs.

Abstract: Disclosed is a semiconductor device, which is used as an optical detector and has: a photodiode section which has a first silicon layer, a light-absorbing layer and a second silicon layer which are in turn layered on a silicon substrate; wherein the light-absorbing layer is formed as a single silicon-germanium epitaxial layer and the single silicon-germanium epitaxial layer has a germanium concentration distribution which provides germanium concentrations of zero at its interfaces to the first silicon layer and the second silicon layer and provides a triangle-shaped concentration profile that a peak concentration value is provided in the middle of the single silicon-germanium epitaxial layer.

Abstract: A thermophotovoltaic device and a method for making the thermophotovoltaic device. The device includes an n-type semiconductor material substrate having top and bottom surfaces, a tunnel junction formed on the top surface of the substrate, a region of active layers formed on top of the tunnel junction and a back surface reflector (BSR). The tunnel junction includes a layer of heavily doped n-type semiconductor material that is formed on the top surface of the substrate and a layer of heavily doped p-type semiconductor material formed on the n-type layer. An optional pseudomorphic layer can be formed between the n-type and p-type layers. A region of active layers is formed on top of the tunnel junction. This region includes a base layer of p-type semiconductor material and an emitter layer of n-type semiconductor material. An optional front surface window layer can be formed on top of the emitter layer.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.