Abstract: Polyimide is used with a semiconductor wafer with a number of dies with circuitry formed thereon. A layer of polyimide is formed on the semiconductor wafer. The wafer is inspected to determine whether the layer of polyimide was formed in a desired pattern. Based on the results of the inspection, the layer of polyimide is removed. A layer of polyimide is removed from a semiconductor substrate with circuitry formed thereon. The semiconductor substrate is provided in a container with a solvent. Energy is introduced to the substrate from a frequency-based energy source. A rinse agent is applied to the substrate.

Abstract: To planarize an insulating film formed on a semiconductor substrate, a polishing slurry containing cerium oxide is used to polish the surface of the insulating film. Using the cerium oxide included slurry as a polishing agent, the insulating film is not contaminated by alkali metals during the polishing process. Furthermore, the insulating film is polished at an enhanced polishing rate.

Abstract: A method for forming silica stain on a substrate to facilitate monitoring of the silica stain during integrated circuit manufacture. The method includes providing a silica stain test structure which has a silicon substrate, a hydrophilic silicon dioxide containing layer disposed above the silicon substrate, and a plurality of cavities formed in the silicon substrate through the silicon dioxide containing layer. The cavities have hydrophobic sidewalls. The method also includes exposing the silica stain test structure to deionized water, and drying the silica stain test structure to form the silica stain on the silicon dioxide containing layer.

Abstract: According to the preferred embodiment, an erosion and dishing monitor and monitor method are provided that facilitates the accurate optimization of a planarization process as in semiconductor process. The dishing monitor comprises at least two monitor structure sets embedded in a semiconductor substrate, the monitor structure sets comprising a plurality of monitor structures connected together with a plurality of connective conductors. The erosion monitor comprises a plurality of elongated conductors embedded into a semiconductor substrate, the plurality of conductors having varying conductor widths and adjacent substrate widths.

Abstract: A method for staining a wafer containing a semiconductor device is disclosed which properly delineates the various layers of the semiconductor device and provides good contrast for proper testing and diagnosis of problems using a scanning electron microscope. After grinding, lapping and polishing a surface of the semiconductor device, the surface is ion beam etched, reactive ion etched and stained. The staining solution is made from 1 part by volume hydrofluoric acid, 3 parts by volume nitric acid, and 6 parts by volume acetic acid. The staining solution is cooled and subjected to a light to slow the reaction of the staining solution with the semiconductor device. This prevents structure collapse and under or over etching, and provides an easily controllable staining process.

Abstract: On an insulating film covering a silicon substrate formed with desired circuit elements, a first Al wiring layer is formed and at the same time a test pattern is formed by using the same Al layer. The test pattern has a same thickness as the first Al wiring layer and has a shape with different line/space ratios at a plurality of positions. A coated film is formed over the wiring layer and test pattern, and etched back. During this etch-back, the border position between the coated film at the space area in the test pattern and the exposed insulating film is optically detected to judge the etching amount, in accordance with previously measured correlation data between the border position and an etching amount. Thus, discrimination can be done whether the etching amount is optimum or not. A method of manufacturing a semiconductor device is provided which can easily judge through optical non-destructive inspection whether the etching amount is optimum or not.

Abstract: An improved method for selecting etch endpoint when dry etching conductive material layers for use in semiconductor device circuits has been created. The more precise endpoint selection procedure produces metallization patterns which are free from residues (resulting from under-etching) and free from sidewall attack and/or pattern degradation (resulting from over-etching). The method avoids costly and time consuming pre-sorting of substrates according to product pattern density.

Abstract: This invention relates to a method for detecting crystal defects in a silicon single crystal substrate which contains a dopant with the concentration of at least 7.0.times.10.sup.16 atoms/cm.sup.3. In the method, a native oxide film 2 on the surface of a silicon single crystal substrate 1 is removed, then copper 4 is deposited on the surface of silicon single crystal substrate 1, then the silicon single crystal substrate 1 is etched by an alkaline aqueous solution. Finally, the etched surface of silicon single crystal substrate 1 is observed by visual observation or by an optical microscope to evaluate crystal defects 3 of silicon single crystal substrate 1.

Abstract: A method for irradiating a substrate such as a semiconductor substrate, coated with a photoresist, with light to measure variations in optical properties such as reflectivity, refractive index, transmittance, polarization, spectral transmittance, for determining an optimum photoresist coating condition, an optimum photoresist baking condition, an optimum developing condition or an optimum exposure energy quantity, and forming a photoresist pattern according to the optimum condition. A system for the exposure method, a controlling method of forming a photoresist film by use of the exposure method, and a system for the controlling method, are useful for stabilization of the formation or treatment of the photoresist film, and ensure less variations in the pattern size.

Abstract: A contour indicator that visually indicates non-uniformities in the planarity of the planarizing surface of a polishing pad. In one embodiment of the invention, a polishing pad has a polishing body with a planarizing surface facing the wafer and a contour indicator embedded in the polishing body. The contour indicator is preferably the material of the polishing body dyed to a color or shade that is visually distinguishable from the polishing body. The contour indicator preferably has first and second sidewalls spaced apart from one another at the planarizing surface of the polishing body, and the contour indicator also has a cross-sectional shape so that the distance between the first and second sidewalls changes with increasing the depth within the pad.

Abstract: A method of sensing a particle in a mixture includes providing (52) the mixture (36) having a particle (29, 30), moving (54) the mixture (36) in a direction, shining (56) a light into a portion of the moving mixture (36), reflecting a portion of the light off of the particle (29, 30) in the moving mixture (36), detecting and measuring (57) the reflected light, and using (58) the measured reflected light to determine a size of the particle (29, 30).

Abstract: An improved and new apparatus and process for chemical-mechanical polishing (CMP) the surface of a semiconductor substrate to a planar condition has beed developed. The planarization endpoint, which is independent of topographic pattern density, is detected by monitoring the ratio of the rate of insulator material removal over a pattern feature to the rate of insulator material removal over an area without an underlying pattern feature.

Abstract: Using a p-type silicon substrate 1 having on its front surface an n-type silicon layer 2 with a thickness of twice or more of the desired thickness for the beam, an electrochemical etching is performed from the rear surface and the etching is stopped at the beam thickness which is twice or more of the desired thickness. Etching for the beam part 8 from the rear surface proceeds along with the etching for the gap part 9 from the front surface, and a desired thickness for the beam can be formed by completing the etching at the timing when the gap part is opened through.

Abstract: Apparatus and methods for precise processing of thin materials in a process chamber by the use of ellipsometer monitoring is disclosed. The process includes rapidly etching a layer 42 of material covering a semiconductor device. The process includes placing the semiconductor wafer 14 into a processing chamber 10. In a typical operation, the wafer 14 will include a selected substrate 32 having a first thin layer 30 of material covering the substrate 32 and then a second layer 42 of a different material covering the first layer 30. A process such as reactive ion anisotropic etching which rapidly etches the second layer 42 is initiated and this etching is monitored in situ by an ellipsometer in combination with a controller 28 to determine the thickness of the second layer 42' which has been achieved. Once the desired amount of second layer 42 remains, the rapid etching process stops to leave a residual layer 42' such as about 250 .ANG.

Abstract: Preferential etching during FIB milling can result in a rough, pitted surface and make IC probing/repair operations difficult. Preferential etching is compensated by acquiring a contrast image of the partially-milled sample, preparing mask image data from the contrast image, and controlling further FIB milling using the mask image data. For example, a window is to be milled in a top-layer power plane of an IC to expose a hidden layer. The window is partially milled. A FIB image is acquired and thresholded to produce mask image data. The mask image data distinguish areas where the power plane has been milled through from those where it has not been milled through. Milling is resumed using the mask image data to control effective FIB milling current. The mask image data are updated periodically as the window is milled.