Abstract: A method and system for inspecting and/or analyzing semiconductor devices in which particles in a semiconductor wafer which is processed in a semiconductor device manufacturing line are detected. A particle is selected from among the detected particles and the selected particle is etched to expose a cross section of the selected particle. The selected particle whose cross section is exposed has the element thereof analyzed, and after analyzation, the semiconductor wafer is continued to be processed in the semiconductor device manufacturing line. For etching, pattern data having an edge which intersects the selected particle is created and the semiconductor wafer which is coated with a photosensitive material is exposed by a light pattern according to the pattern data so that an edge intersects the selected particle. Thereafter, the etching is carried out to expose the cross section of the selected particle and analyzation is effected.

Abstract: An equipment for manufacturing semiconductor devices is disclosed. This equipment comprises a processing tool for processing a to-be-processed surface of a semiconductor workpiece to a target shape, and a monitor for three-dimensionally monitoring a shape of a processed surface of the semiconductor workpiece while the semiconductor workpiece is set in the processing tool. The monitor radiates the processed surface with incoherent light, divides light reflected from the processed surface, into a plurality of light beams of different wavelengths, acquires a two-dimensional image from each of the divided light beams of different wavelengths, three-dimensionally analyzes the shape of the processed surface, and transmits information on the analysis results to a controller. The controller controls the processing tool in a feedback manner on the basis of the information.

Abstract: A crystal growing apparatus comprises a vacuum vessel, a heating lamp, a lamp controller for controlling the heating lamp, a gas inlet port, a flow rate adjuster for adjusting the flow rate of a gas, a pyrometer for measuring the temperature of a substrate, and a gas supply unit for supplying a Si2H6 gas or the like to the vacuum vessel. An apparatus for ellipsometric measurement comprises: a light source, a polariscope, a modulator, an analyzer, a spectroscope/detector unit, and an analysis control unit for calculating &PSgr;, &Dgr;. In removing a chemical oxide film on the substrate therefrom, in-situ ellipsometric measurement allows a discrimination between a phase 1 during which a surface of the substrate is covered with the oxide film and a phase 2 during which the surface of the substrate is partially exposed so that the supply of gas suitable for the individual phases is performed and halted.

Abstract: By locally heating or cooling a substrate in an etching process, temperature unevenness is controlled, and convection currents of an etching liquid are restricted simultaneously. By setting the etching temperature low in an initial stage of the etching process and increasing it in a final stage, uniform and quick etching is possible. In a drop etching method, generation of bubbles can be prevented to ensure uniform etching by providing gas release openings in a member opposed to the substrate.

Abstract: A method of detecting an etching depth of a target object includes the steps of irradiating an etching layer of the target object that is being etched in an etching section with light having a plurality of components differing from each other in a wavelength, detecting a plurality of interference light components differing from each other in the wavelength and having an intensity periodically changed by the light components reflected from an upper surface of the etching layer and a surface of the etching section, applying a frequency analysis to these interference light components so as to obtain the frequency of each of these interference wave forms in which the intensity forms the amplitude, calculating an etching rate corresponding to each interference wave form by using the frequency of the interference wave form, and obtaining an etching depth from the etching rate.

Abstract: A computer implemented method for endpointing an etch process comprising the acts of monitoring an attribute of a pressure control valve and determining an endpoint of the process based upon the monitored attribute. The monitored attribute includes the position of the pressure control valve or the rate of change of the pressure control valve. The method is advantageously employed in an in-situ cleaning process of a polymerized plasma chamber.

Abstract: The present invention provides systems and methods of determining the concentration of chemicals in a wet processing stream where the wet processing stream is formed from two or more liquid streams having known chemical concentrations. The concentration of chemicals in the wet processing stream are monitored by measuring the flow rates of the liquid streams during combination to form the wet processing stream, and calculating the concentrations of chemicals in the wet processing stream based on the flow rates and known chemical concentrations of the liquid streams. The present invention also provides systems and methods for controlling the wet processing of semiconductor substrates using the calculated concentrations in the wet processing stream. The methods and systems of the present invention are particularly useful when the semiconductor substrates are contacted with the wet processing stream in a single pass.

Abstract: In a chemical mechanical planarization assembly directed for the removal of oxide layers, which stop on films containing silicon nitride, a conventional polishing table is provided with a gas extraction unit which transmits a gas sample to an infrared spectrometer. The presence of ammonia in the slurry, which is generated when a stop layer containing silicon nitride is abraded under high pH conditions, can be detected using infrared spectroscopy and accordingly provides for an in situ endpoint detection method.

Abstract: A homogeneous marker is formed, possibly by the adsorption of trace amounts of an ambient material such as carbon monoxide gas, at a surface of a deposited material when the plasma in momentarily interrupted during plasma enhanced chemical vapor deposition or other deposition processes involving the presence of a plasma. When the deposited material is etched, the resulting crystal dislocations or adsorbed gas is detected as a marker by optical emission spectroscopy techniques. The accuracy of an end point determination of the etching process can be increased by providing a sequence of such markers within the bulk or volume of the deposited material. The markers, being merely an interface such as a slight crystal dislocation in otherwise homogeneous material, do not affect the electrical, chemical or optical properties of the remainder of the predetermined deposited material and thus the homogeneity of the deposited material is not significantly affected.

Abstract: The invention generally relates to various aspects of a plasma process, and more specifically the monitoring of such plasma processes. One aspect relates in at least some manner to calibrating or initializing a plasma monitoring assembly. This type of calibration may be used to address wavelength shifts, intensity shifts, or both associated with optical emissions data obtained on a plasma process. A calibration light may be directed at a window through which optical emissions data is being obtained to determine the effect, if any, that the inner surface of the window is having on the optical emissions data being obtained therethrough, the operation of the optical emissions data gathering device, or both. Another aspect relates in at least some manner to various types of evaluations which may be undertaken of a plasma process which was run, and more typically one which is currently being run, within the processing chamber.

Abstract: In one aspect, the invention encompasses a semiconductor processing method. A layer of material is provided over a substrate and reacted in a solution to remove at least some of the material. The reacting comprises a reaction chemistry that alters a concentration of a species in the solution. An absorbance of the solution is monitored for at least one wavelength of light that the species absorbs, and a concentration of the species in the solution is monitored by the monitoring of the absorbance. The concentration of the species in the solution is adjusted utilizing information obtained from the absorbance monitoring. In another aspect, the invention encompasses a semiconductor processing method wherein a layer of material is provided over a substrate and reacted with a solution to remove at least some of the material. The reaction consumes a component of the solution, and an absorbance of the solution is monitored for at least one wavelength of light that the consumed component absorbs.

Abstract: Eliminating exposure of PN junctions to light capable of invoking a photovoltaic effect and/or inhibiting the oxidation and reduction reactions induced by the photovoltaic effect prevents the electrochemical dissolution of metal components on semiconductor devices by electrolysis. A darkened enclosure for use on tools for wafer CMP, brush cleaning, unloading, and rinsing will eliminate exposure. Alternatively, illumination of a semiconductor wafer can be limited to wavelengths of light that do not provide enough energy to induce a photovoltaic effect. An inhibitor in the CMP slurry and/or post-CMP water rinse blocks the oxidation and/or reduction reactions. A blocking agent, such as a high molecular weight surfactant, will interfere with both the oxidation and reduction reactions at the metal surface. Also, a poisoning agent will impede the reduction portion of electrolysis.

Abstract: The present invention provides for a method and an apparatus for controlling critical dimensions. At least one run of semiconductor devices is processed. A critical dimension measurement is performed upon at least one of the processed semiconductor device. An analysis of the critical dimension measurement is performed. A secondary process upon the semiconductor device in response to the critical dimension analysis is performed.

Abstract: The present invention provides wafer polishing apparatus in which the wafer holding head comprises a diaphragm substantially vertically expanded to the head axis in the head body; a carrier, which is fixed to the diaphragm and provided so as to be able to displace along the head axis direction together with the diaphragm; a retainer fixed to the diaphragm in a concentric relation to the carrier; a pressure adjusting mechanism for controlling the pressure of a fluid chamber formed between the diaphragm and the head body; a plurality of carrier torque mechanisms provided between the head body and the carrier for communicating the torque of the head body to the carrier; a plurality of first sensors, which is provided at individual torque transfer mechanism, for observing the force along the direction of rotation acting on the wafer; and a processor, which is connected to each first sensor, for calculating the force acting on the wafer based on the output from these first sensors.

Abstract: A method for making a transistor includes the steps of providing a silicon substrate including a silicon-germanium epitaxial layer, forming a masking implant layer on a channel region of the silicon-germanium epitaxial layer, and implanting dopants into the silicon-germanium epitaxial layer using the masking implant layer to define spaced apart source and drain regions adjacent the channel region. The method further includes the step of removing the masking implant layer after the implanting to expose the channel region. A silicon epitaxial layer is formed on the exposed channel region, and at least a portion of the silicon epitaxial layer is converted to silicon oxide to define a gate dielectric layer for the transistor. The gate dielectric layer includes a gate oxide layer, and a silicon protection layer between the gate oxide layer and the channel region. A conductive gate is formed on an upper surface of the gate oxide layer.

Abstract: An object of the present invention is to provide a method for accurately determining a swing curve in the &mgr;m order's semiconductor technology. Photoresist films with different thicknesses are coated on silicon dummy wafers, respectively. Using a mask with a critical dimension bar's pattern, each of the chips of the silicon dummy wafers is exposed by different exposure doses such that the pattern is transferred on each of the chips. After the silicon dummy wafers are developed, each of the chips of the silicon dummy wafers is inspected by using a scanning electron microscope. For each of the silicon dummy wafers, the exposure dose resulting in completely removing the photoresist film on the region between the adjacent critical dimension bars of the pattern by developing is recorded. According to the present invention, it is easy to obtain an accurate swing curve since the resolution of the scanning electron microscope is up to the order of &mgr;m.

Abstract: The present invention relates to a method for providing patterned recess formation in a previously recessed area of a semiconductor structure, i.e. DRAM trench capacitor, using acid diffusion to selectively activate some, but not all of the acid sensitive material that is filled within the recessed areas of such structures. By employing the method of the present invention, it is possible to recess all the previously recessed areas at the same time providing the same level of recessed acid sensitive material within the previous recessed areas, recess some of the previously recessed areas to a desired level leaving other portions of the structure unrecessed, or recessing the previously recessed areas to contain different levels of the acid sensitive material.

Abstract: A process for reducing the waviness of a semiconductor wafer utilizing plasma assisted chemical etching is disclosed. The process includes measuring the surface profile at discrete points on one surface of the wafer independent from the apposing surface, computing a dwell time versus position map based on the measured surface profiles, and selectively removing material from each surface of the wafer by plasma assisted chemical etching to reduce the waviness of the wafer.

Abstract: In a semiconductor manufacturing apparatus, a semiconductor substrate ion-implanted with an ion species is heated and thereby raised in temperature under vacuum. At this time, a partial pressure of a gas released from the semiconductor substrate is measured by a quadrupole mass spectrometer. Further, a change in partial pressure with time is observed and compared with a pre-measured release characteristic, whereby the temperature of the semiconductor substrate is corrected.

Abstract: A method for monitoring a condition of a polishing pad used in a chemical-mechanical planarization (CMP) process to polish a semiconductor wafer is disclosed. The method uses a linear multi-dimensional scanning device arranged above the polishing pad in a radial direction to monitor the changes in profile of the surface of the polishing pad, and determines the condition of the polishing pad according to the profile information. When the change in profile of the surface of the polishing pad substantially exceeds a preset value, e.g. 2 mm, it is indicated that the polishing pad should be changed.

Abstract: An improved method for specifying and reliably detecting endpoints in processes such as plasma etching, where the signal-to-noise ratio has been severely degraded due to factors such as “cloudy window” and low ratio of reactive surface area to non-reactive surface area. The improved method of the invention samples signals produced by photo sensitive equipment, digitally filters and cross-correlates the data, normalizes the data using an average normalization value, and provides further noise reduction through the use of three modes of endpoint specification and detection. The three modes of endpoint specification and detection require a pre-specified number of consecutive samples to exhibit a certain behavior before the endpoint is deemed detected and the process terminated as a result. The three modes of endpoint specification and detection also permit a very fine control of the etch time by permitting the user to adjust the specified endpoint by gradations of the sampling period.

Abstract: A method of detecting an end point of polishing arranged to perform CMP polishing with which an insulating layer of a wafer incorporating a substrate having a metal-containing permalloy layer formed thereon and the insulating layer formed on the metal-containing permalloy layer is chemimechanically polished to expose the flat permalloy layer, the method of detecting an end point of polishing, having the steps of: collecting abrasive material slurry on a surface plate for polishing as a continuous flow from the start or during CMP polishing; continuously mixing a color developing reagent with the collected continuous flow to prepare a specimen for the continuos flow; reading the color of the specimen as a digital value (Ii) by a color identifying sensor; and determining a moment of time at which the digital value (Ii) reaches a digital value (Io) of a specimen of a waste flow of the abrasive material slurry at the end of polishing to be the end of CMP polishing.

Abstract: The invention generally relates to various aspects of a plasma process, and more specifically the monitoring of such plasma processes. One aspect relates in at least some manner to calibrating or initializing a plasma monitoring assembly. This type of calibration may be used to address wavelength shifts, intensity shifts, or both associated with optical emissions data obtained on a plasma process. A calibration light may be directed at a window through which optical emissions data is being obtained to determine the effect, if any, that the inner surface of the window is having on the optical emissions data being obtained therethrough, the operation of the optical emissions data gathering device, or both. Another aspect relates in at least some manner to various types of evaluations which may be undertaken of a plasma process which was run, and more typically one which is currently being run, within the processing chamber.

Abstract: In accordance with the present invention, a method for inspecting a semiconductor sample for failures includes the steps of determining a target area for observation on the semiconductor sample, preparing a region in proximity to the target area to provide access to the target area, and mounting the semiconductor sample into a chamber. The chamber provides a capability for removing material in proximity of the target area, and provides a capability for observing the semiconductor sample in-situ. The semiconductor sample is maintained in the chamber while performing the following steps: etching a first material selective to a second material such that the target area has the first material removed therefrom to expose the second material such that the second material is preserved for observation, and monitoring the progress of the etching step to determine a time to discontinue the etching.

Abstract: A method of making circuit edit structures through the backside of a flip-chip packaged integrated circuit die. In one embodiment, a circuit edit is achieved by exposing first and second circuit edit connection targets through a semiconductor substrate of the integrated circuit die from the backside. Next, a polyimide layer is vapor deposited over the first and second circuit edit connection targets and the exposed semiconductor substrate. Next, the circuit edit connection targets are re-exposed through the polyimide layer and a conductor is deposited over the re-exposed circuit edit connection targets and the deposited polyimide layer from the backside of the integrated circuit to couple together the circuit edit connection targets. The polyimide layer may act as both an insulation layer and an anti-reflective coating layer.

Abstract: A method and apparatus that uses compound processing for detecting defects in integrated circuits involves processing two portions of a semiconductor wafer differently according to a first and a second process. The first process and the second process are performed on alternating columns on the wafer. Image subtraction is used to detect differences between the layouts in adjacent columns. After differences are detected, the layout is examined to determine whether the difference represents a defect. If so, the design rules of the layout can be changed to accommodate a wider process variation.

Abstract: A method of fabricating a semiconductor wafer is disclosed.

Abstract: A method of reducing agglomerated particles in a slurry for use in a chemical mechanical polishing (CMP) machine, the CMP machine also using deionized water, is disclosed. The method comprises the steps of: monitoring the pH of the slurry that is provided to the CMP machine; monitoring the pH of the deionized water that is provided to the CMP machine; and adjusting the pH of the deionized water to be substantially the same as the pH of the slurry.

Abstract: Aspects for removing device packaging from an FBGA (fine pitch ball grid array) package are described. In an exemplary method aspect, the method includes recessing a predetermined area of the FBGA package, and exposing an integrated circuit die covered by the FBGA package. Device analysis is then performed on the exposed die. The step of recessing further includes milling the predetermined area, while the step of exposing includes chemically etching the FBGA package.

Abstract: A method of planarizing a semiconductor wafer to a distance from a semiconductor substrate of the wafer is disclosed. The method includes the step of forming in the wafer a metallic reporting substance that is at the predetermined distance from the substrate of the wafer. The method also includes the step of polishing a first side of the wafer in order to remove material from the wafer. The method further includes the step of utilizing an atomic absorption spectroscopic technique to detect the presence of the metallic reporting substance in the material removed from the wafer. Moreover, the method includes the step of terminating the polishing step in response to the detection of the metallic reporting substance. An associated apparatus for polishing a semiconductor wafer down to a metallic reporting substance of the wafer is also described.

Abstract: An apparatus is disclosed. In one embodiment, the apparatus includes a semiconductor substrate and a second substrate. The semiconductor substrate has a top side and a bottom side. The semiconductor substrate has an integrated circuit and at least one alignment fiducial formed on the top side. The alignment fudicial is aligned with the integrated circuit and the alignment fiducial is accessible from the bottom side. The semiconductor substrate further includes a first set of bond pads on the integrated circuit, the bond pads on the top side. The second substrate has a second set of bond pads corresponding to the first set of bond pads. The semiconductor substrate is coupled to the second substrate at a plurality of solder interconnections disposed between the first and the second set of bond pads.

Abstract: A method for fabricating a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a planarizable layer. The planarizable layer has a lower residual portion of the planarizable layer and an upper removable portion of the planarizable layer, where one of the lower residual portion of the planarizable layer and the upper removable portion of the planarizable layer has a colorant incorporated therein. The colorant is positioned at a location which assists in monitoring and controlling an endpoint of a chemical mechanical polish (CMP) planarizing method employed in planarizing the planarizable layer. There is then planarized through the chemical mechanical polish (CMP) planarizing method the planarizable layer while employing the colorant concentration to determine the endpoint of the chemical mechanical polish (CMP) planarizing method.

Abstract: The present invention discloses a chemical mechanical polishing method with in-line thickness detection. First, the semiconductor wafer is loaded into CMP equipment and is putted on a loading table for the preparation of a CMP process. The CMP process is performed on the wafer for polishing. The CMP process is interrupted and the thickness of a polished thin film layer is detected by using an in-line thickness measurement technique. The thickness is determined whether or not being accepted by a specification of the CMP process. As the thickness is accepted by the specification, the wafer is cleaned, dried and moved out from the CMP equipment. Alternatively, the thickness is not accepted by the specification, it must be determined whether or not the thickness is less than the low limit of the specification. As the thickness is smaller than the low limit, the wafer is cleaned, dried after it is moved out from the CMP equipment.

Abstract: In a process of selectively removing material from an exposed layer carried by a substrate, a technique for determining endpoint by monitoring the intensity of a radiation beam that is passed through the substrate and any intervening layers to be reflected off the layer being processed. This monitoring technique is used during photoresist developing, wet etching, and mechanical planarization and polishing during the manufacture of integrated circuits on semiconductor wafers, flat panel displays on glass substrates, and similar articles. Planarization and polishing processes are alternatively monitored by monitoring temperature.

Abstract: A method for generating information for producing a pattern, defined by design information on a medium, using at least one direct-writing pattern generating process, which first provides the design information and then calculates correction data based on the provided design information and depending on the pattern generating process which corrects pattern faults in the pattern to be generated which were caused by the pattern generating process. The design and correction information is then separately provided to the direct-writing pattern generating process for its activation.

Abstract: In a process of selectively removing material from an exposed layer carried by a substrate, a technique for determining endpoint by monitoring the intensity of a radiation beam that is passed through the substrate and any intervening layers to be reflected off the layer being processed. This monitoring technique is used during photoresist developing, wet etching, and mechanical planarization and polishing during the manufacture of integrated circuits on semiconductor wafers, flat panel displays on glass substrates, and similar articles. Planarization and polishing processes are alternatively monitored by monitoring temperature.

Abstract: An alignment strategy for asymmetrical alignment marks in a wafer, in which the positions of the a symmetrical alignment marks are determined twice. A first set of positions is detected after a chemical-mechanical polishing step. A second set of positions is detected after a rotation in which the wafer is rotated by 180.degree. in the plane of the surface of the wafer.

Abstract: A system for labeling defective semiconductor chips so that such defective chips can be used in secondary or downgraded applications is provided. The system includes identifying defective semiconductor chips which are not fit for their primary purpose. These defective semiconductor chips are labeled with a letter, symbol or other marking which indicates that they are defective. The marking may indicate the degree of defectiveness, or may include a code or other standard set forth by the industry. The label is etched or carved into the semiconductor generally at one or both ends, or at a center portion, using a laser or an engraver or other permanent labeling device. The etching or carving is of a depth which prevents one from knowingly or unknowingly erasing, removing or otherwise obliterating the label. An etching or carving depth of one half the thickness from the top surface of the chip has been found to be effective.

Abstract: A [work] workpiece processing apparatus and a [work] workpiece measuring method are provided in which a [work] workpiece can be processed or planarized without decreasing a processing rate and/or an operating rate of the apparatus. The apparatus can be reduced in size, and can measure the state of planarization of the [work] workpiece at a high degree of accuracy. The apparatus includes a rotatable surface plate, and a carrier 6 for swinging or oscillating a [work] workpiece 200 in a radial direction of the surface plate 1 while pressing the [work] workpiece 200 against the surface plate 1. The surface plate 1 is divided into an inner surface plate member 11, an intermediate surface plate member 12, and an outer surface plate member 13 which are all disposed in a concentric relation and rotatable independently of each other. The intermediate surface plate member 12 is disposed between the inner and outer surface plate members 11 and 13.

Abstract: The present invention provides a method for polishing a semiconductor substrate having a first layer of material formed on a second layer of different material. In one embodiment, the method includes placing the semiconductor substrate against a polishing surface and polishing the semiconductor substrate, producing a first vibration by polishing and removing the first layer, producing a second vibration by polishing at least a portion of the second layer, and detecting a change from the first vibration to the second vibration with a vibration sensor. The vibration that is sensed in the present invention is physical or mechanical vibration, and it is not a vibration associated with a change in temperature. The vibration sensor may be of varying types. For example, the vibration sensor may be an acoustic sensor or an ultrasonic sensor.

Abstract: A method and apparatus for endpointing mechanical and chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrates. In one application in which a microelectronic substrate is planarized against a planarizing medium defined by a planarizing fluid and a polishing pad, one method of endpointing the planarizing process in accordance with the invention includes increasing the viscosity of the planarizing fluid between the substrate and the polishing pad as the substrate becomes substantially planar. The endpointing method continues by detecting a change in drag or frictional force between the substrate and the planarizing medium, and then stopping removal of material from the substrate when the rate that the friction increases between the substrate and the planarizing medium changes from a first rate to a second rate greater than the first rate.

Abstract: The present invention provides a method for preparing samples for microscopic examination that requires a glass slide to be laminated to a sample substrate by an adhesive layer for polishing in a sample polishing process. A cavity can be first formed in the surface of the substrate by a focused ion beam technique to reveal a characteristic feature which needs to be examined. A wax-based material is then used to fill the cavity and to protect the characteristic feature before an adhesive layer is applied on top of the substrate for bonding a glass slide to the substrate. After the sample is sectioned in the polishing process to reveal a new cross-section that contains the characteristic feature, the protective coating of the wax-based material can be removed by a suitable solvent such that the characteristic feature is ready for microscopic examination. A suitable wax-based material can be a wax that is similar to a candle wax which can be easily removed by acetone.

Abstract: An apparatus and a method for production control whereby checks for cross contamination removal are made automatically to control whether to load a workpiece into a given working device depending on the work status of that workpiece. A storage unit stores status flags each indicating the work status of the workpiece. The unit also stores either a post-work status flag indicating the work status which the workpiece will be in after status-flag-designated processing by the working device, or a warning flag prohibiting the processing of the workpiece by the working device. A computing unit reads from the storage unit the status flags of the workpiece before the workpiece is loaded into the working device. The computing unit further determines whether the workpiece is suitable for being loaded into the working device in accordance with either the post-work status flag or the warning flag corresponding to the status flags of the workpiece in relation to the working device in question.

Abstract: A method for stripping a film from a wafer substrate includes the steps of inserting a boat holding the wafer into a processing chamber of a CVD apparatus, and injecting gas into the chamber, to thereby strip the wafer of its film. A typical film requiring stripping is a polysilicon film grown on an underlying oxide layer of the substrate. In this case, CIF.sub.3 is used to strip the polysilicon film without damaging the oxide layer. Accordingly, this method is applicable to the quality testing of semiconductor wafer films using a test wafer. In such quality testing a film is formed on a test wafer substrate at the same time the semiconductor wafer film is formed. The film of the test wafer is tested to evaluate the quality of the formation of the semiconductor wafer film. The test wafer can then be stripped within the chemical vapor deposition apparatus and thus can be reused soon thereafter.

Abstract: In an apparatus for removing material from an article, such as an exposed surface of an intermediate integrated circuit structure, by planarizing, polishing, etching or the like, a sensor is mechanically coupled to a moving carrier of the article for directing through the article to its first side an electromagnetic radiation beam having a wavelength band to which the structure is substantially transparent. The beam is detected after interacting with the article, such as being reflected from its exposed surface, and resulting information of the state of the processing of the exposed surface is transmitted from the moving carrier to a stationary receiver by radiation without the use of any physical transmission media such as wires or optical fibers. Multiple sensors mounted on the moving article carrier provide information of the uniformity of the processing across the exposed article surface.

Abstract: In order to detect the end point of a plasma process stably and at a high precision always without being affected by the fine delineation of a pattern to be processed and an external disturbance, it is constructed such that emission wavelength components 27 of species are taken out of a plasma emission 24 and only a frequency component synchronous with a high-frequency electric power for plasma excitation is extracted by a synchronous detection circuit 30 and so on. Thereby, the progressing status of etching is seized more accurately and a change in signal at an end point becomes clear. As a result, the precision of detection of the end point of a plasma process for a minute aperture pattern is improved.

Abstract: An automated endpoint detection process includes obtaining a baseline graph of reflected radiation signal versus time of radiation exposure for a standard integrated circuit substrate surface that is substantially free of residual metal, directing radiation generated from a radiation source through a radiation transparent region of a polishing pad such that radiation is incident on at least a portion of a surface of the integrated circuit substrate, detecting a reflected radiation signal from the integrated circuit substrate surface through the radiation transparent region of the polishing pad, comparing an area under a graph of the reflected radiation signal versus time of radiation exposure obtained for the integrated circuit surface to the baseline graph of the standard integrated circuit substrate surface and thereby determining whether residual metal is present on the surface of the integrated circuit substrate and signaling the chemical-mechanical polishing assembly to stop polishing after polishing for

Abstract: Two wafers of single-crystal silicon are used to produce a bonded substrate having a silicon-on-insulator (SOI) structure. In a principal surface of a first wafer, a number of first insulator film patterns of equal thickness art formed for isolation of semiconductor devices to be fabricated on the bonded substrate. Simultaneously, at least to second insulator film patterns having the same thickniess as the first insulator film patterns are formed in the same surface of the first wafer for optical measurement of the thickness of an active layer of in the bonded substrate. Then the first wafer is bonded to a second wafer to obtain a bonded substrate in which the insulator film patterns are buried adjacent to the interface between the two silicon wafers. To form an active layer having a desired thickness above the buried insulator film patterns, the thickness of the first wafer is reduced by mechanical grinding and chemical-mechanical polishing.

Abstract: A method and an apparatus providing a mechanical probe structure through the back side of an integrated circuit die. In one embodiment, semiconductor substrate is thinned from the back side of the integrated circuit die above a probe target. The probe target is then exposed and a thin insulating layer is formed over the exposed probe target and the nearby semiconductor substrate. The thin insulating layer provides electrical isolation between the exposed probe target and the bulk semiconductor substrate. The thin insulating layer also provides a base insulating platform for a probe pad that is subsequently deposited. After the insulating layer is formed over the exposed probe target and the nearby semiconductor substrate, the probe target is re-exposed through insulating layer such that a probe pad may be deposited over the probe target to provide electrical contact to the original probe target as well as provide a probe pad for mechanical probing purposes from the back side of the integrated circuit die.

Abstract: A method for accessing a portion of an integrated circuit formed on top of a semiconductor substrate from the bottom of the semiconductor substrate. First, alignment marks are located which are approximately aligned to the integrated circuit. These alignment marks are then used in conjunction with a circuit diagram of the integrated circuit to determine the point on the bottom of the semiconductor substrate residing beneath the portion of the integrated circuit which the practitioner desires to access. Finally, an opening is etched into the bottom of the semiconductor substrate at this point.