Abstract: In order to inhibit or prevent a pattern abnormality such as the deformation or misalignment of a pattern of a semiconductor integrated circuit device, a light intensity is calculated based on the pattern data DBP of a mask and the aberration data DBL of a lens of a pattern exposure device (step 101) and then the results of the light intensity calculation is compared with the results of the light intensity calculated on condition that the lens of the pattern exposure device has no aberration (step 102), and then a pattern data exceeding an allowable level, of the pattern data of the mask, is corrected according to the amount of correction calculated on the basis of the results of the comparison such that the pattern data does not exceed the allowable level (step 104). The mask is manufactured by using the mask making data DBM after the correction and then is mounted on the pattern exposure device to transfer a predetermined pattern to a semiconductor wafer.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.

Abstract: A system and method for monitoring the conditions in a gas plasma processing system while varying or modulating the RF power supplied to the system, so that resulting signals of the electrical circuits of the system provide information regarding operational parameters of the system or the state of a process. Significant improvements in sensitivity and accuracy over conventional techniques are thereby achieved. In addition, the plasma processing system can be thoroughly tested and characterized before delivery, to allow more accurate monitoring of and greater control over a process, thereby improving quality control/assurance of substrates being produced by the system. The information obtained by the modulation technique can be displayed on a monitor screen, in order to allow an operator to accurately monitor the system/process and diagnose any problems with the system/process.

Abstract: The present invention is generally directed to a method of modeling and controlling the endpoint of chemical mechanical polishing operations performed on a process layer, and a system for accomplishing same. In one illustrative embodiment, the method comprises providing a first wafer having a process layer formed thereabove, determining a duration of an endpoint polishing process performed on the process layer on the wafer, providing a second wafer having a process layer formed thereabove, and modifying at least one parameter of the endpoint polishing process to be performed on the process layer formed above the second wafer based upon a variance between the determined duration of the endpoint polishing process performed on the process layer on the first wafer and a target value for the duration of the endpoint polishing process.

Abstract: A method and system are provided for controlling and/or monitoring a semiconductor processing apparatus while predicting its processing results.

Abstract: A method and system are provided for controlling and/or monitoring a semiconductor processing apparatus while predicting its processing results.

Abstract: The present invention relates to in-situ techniques for determining process end points in semiconductor wafer polishing processes. Generally, the technique involves utilizing a scanning inspection machine having multiple pair of lasers and sensors located at different angles for detecting signals caused to emanate from an inspected specimen. The detection techniques determine the end points by differentiating between various material properties within a wafer. An accompanying algorithm is used to obtain an end point detection curve that represents a composite representation of the signals obtained from each of the detectors of the inspection machine. This end point detection curve is then used to determine the process end point. Note that computation of the algorithm is performed during the polishing process so that the process end point can be determined without interruptions that diminish process throughputs.

Abstract: The present invention relates to in-situ techniques for determining process end points in semiconductor wafer polishing processes. Generally, the technique involves utilizing a scanning inspection machine having multiple pair of lasers and sensors located at different angles for detecting signals caused to emanate from an inspected specimen. The detection techniques determine the end points by differentiating between various material properties within a wafer. An accompanying algorithm is used to obtain an end point detection curve that represents a composite representation of the signals obtained from each of the detectors of the inspection machine. This end point detection curve is then used to determine the process end point. Note that computation of the algorithm is performed during the polishing process so that the process end point can be determined without interruptions that diminish process throughputs.

Abstract: Disclosed herein is a method comprised of forming a metal layer above a structure layer on a workpiece, measuring a thickness of the metal layer, determining, based upon the measured thickness of the metal layer, at least one parameter of an etching process to be performed on the metal layer, and performing the etching process comprised of the determined parameter on the metal layer. Also disclosed is a system comprised of a deposition tool for forming a metal layer above a structure layer on a workpiece, a metrology tool for measuring a thickness of the metal layer, a controller for determining, based upon the measured thickness of the metal layer, at least one parameter of an etch process to be performed on the metal layer, and an etch tool adapted to perform an etch process comprised of the determined parameter on the metal layer.

Abstract: A method for determining an endpoint for an oxygen free plasma stripping process for use in semiconductor wafer processing. The method comprises exciting a gas composition containing a nitrogen gas and a reactive gas to form the oxygen free plasma. The oxygen free plasma reacts with a substrate having a photoresist and/or residues thereon to produce emitted light signals corresponding to an oxygen free reaction product. The endpoint is determined by optically measuring a primary emission signal of the oxygen free reaction product at a wavelength of about 387 nm. The endpoint is determined when the plasma no longer reacts with the photoresist and/or residues on the substrate to produce the emitted light at about 387 nm, an indication that the photoresist and/or residues have been removed from the wafer. Secondary emission signals of the oxygen free reaction product at about 358 nm and 431 nm can also be monitored for determining the endpoint.

Abstract: A method includes measuring a surface non-uniformity of a wafer. A current state of an etch processing tool is determined. The surface non-uniformity of the wafer is compared with the current state of the processing tool. An operating parameter of the processing tool is adjusted based on the comparison of the surface non-uniformity of the wafer with the current state of the processing tool. A system includes a processing tool, a plurality of measuring devices, and a process controller. The processing tool is adapted for etch processing of a wafer. The plurality of measuring devices measure a surface non-uniformity of the wafer and determine a current state of the processing tool. The process controller compares the surface non-uniformity of the wafer with the current state of the processing tool and adjusts an operating parameter of the processing tool based on the comparison.

Abstract: A method for controlling the sheet resistance of thin film resistors. The sheet resistance can be inexpensively controlled within a tight tolerance by determining a desired final value for the sheet resistance of thin film resistor material to be deposited on a substrate, depositing the resistor material on the substrate using a deposition process which is consistent enough to achieve a target sheet resistance within a first specified tolerance, the resistor material being deposited to achieve a target sheet resistance which is equal to the desired final value minus the first specified tolerance, and removing a small amount of material from the surface of the deposited thin film resistor material by etching or ion bombardment to raise the sheet resistance to the desired final value within a second specified tolerance characteristic of the removing process where the second specified tolerance is less than the first specified tolerance.

Abstract: Described herein is a method for selectively enlarging vias connecting two different layers of conductors in a semiconductor device. Whether or not an individual via is extended on each of its edges is determined by the distance of the edge to the neighboring features. Since many vias can be selectively enlarged along one or more edges without infringing upon neighboring structures, via integrity and conductive characteristics are improved.

Abstract: A system and method is described for providing a robust mechanical and electrical connection between two or more circuit boards which may be employed for diagnostic purposes and/or for permanent connections. A spacer block, connection block, or pedestal, preferably made of PCB type material is preferably disposed between two PCBs. The pedestal is preferably dimensioned to space the two PCBs far enough apart that the surface mount components on two boards connected employing the inventive pedestal do not interfere with one another. The pedestal preferably provides for ample signal density and signal quality because of the block thickness and availability of insulation within the pedestal.

Abstract: The present invention provides for a method and an apparatus for performing dynamic sampling of a production line. A first plurality of semiconductor wafers are processed. A minimum sampling rate of semiconductor wafers is calculated. Wafers from the first plurality of the semiconductor wafers are selected and analyzed at the calculated sampling rate. The performance of the processing of the first plurality of semiconductor wafers is quantified, based upon the analyzed wafers. A dynamic sampling process is performed based upon the quantification of the performance of the processing of semiconductor wafers.

Abstract: Disclosed is a method for characterizing the quality of microelectronic features using broadband white light. A highly collimated light source illuminates an area of a first wafer using broadband multi-spectral light. The angular distribution of the light scattered from the first wafer is then measured. Generally, the angle of the light source, detector, or both is altered and an angular distribution measurement taken at each angle, producing a scatter signature for the first wafer. Finally, the scatter signature of the first wafer is compared with a known scatter signature of a second wafer of good quality to determine the quality of the first wafer.

Abstract: According to an example embodiment, a semiconductor device having a back side and a circuit side opposite the back side is analyzed. The semiconductor device includes bulk silicon in the back side and also includes epitaxial silicon. A wet etch solution comprising aqueous tetramethylammonium hydroxide (TMAHW) is directed at the back side. Using the wet etch solution, the back side is selectively etched and an exposed region is formed. The etching is selective to the bulk silicon. When the etching process encounters the epitaxial silicon, the etch rate slows and is used as an endpoint indicator of the selective etching process. Once the etching process is stopped, the circuitry is accessed via the exposed region.

Abstract: A method and apparatus for processing a wafer comprising a material selected from an electrical semiconducting material and an electrical insulating material. The wafer has opposed generally planar front and rear sides and a peripheral edge, wherein said wafer is pressed against a pad in the presence of a slurry to reduce its thickness. The thickness of the wafer is controlled by first forming a recess such as a dimple on the rear side of the wafer. A first electrical conducting strip extends from a first electrical connection means to the base surface of the recess to the second electrical connector. The first electrical conducting strip overlies the base surface of the recess. There is also a second electrical conductor with an electrical potential source between the first electrical connector and the second electrical connector to form.

Abstract: In a process of selectively removing material from an exposed layer carried by a substrate, a technique for determining endpoint by monitoring the intensity of a radiation beam that is passed through the substrate an any intervening layers to be reflected off the layer being processed. This monitoring technique is used during photoresist developing, wet etching, and mechanical planarization and polishing during the manufacture of integrated circuits on semiconductor wafers, flat panel displays on glass substrates, and similar articles. Planarization and polishing processes are alternately monitored by monitoring temperature.

Abstract: A semiconductor process endpoint detection system uses a relatively wide wavelength range of light to reflect off a semiconductor wafer being processed. Relatively narrow wavelength ranges can be monitored within this wide reflected wavelength range in order to produce an endpoint of the process. An indication can be produced which is a function of detected light intensities at multiple wavelength ranges. These indications aid in the determination of an endpoint of a process.

Abstract: An apparatus detects the width of a V-groove formed on a semiconductor wafer. A resistor overlaps a chip area and an area upon which the V-groove is to be etched on the wafer. A pad etched on the silicon wafer is coupled to the resistor. A tester supplies voltage to the pad after the V-groove has been etched into the silicon wafer; and a circuit coupled to the pad determines the width of the etched V-groove.

Abstract: A process for revealing agglomerated intrinsic point defects in a single crystal silicon sample. The process includes heat-treating the single crystal silicon sample, cooling the heat-treated sample and then coating a surface of the cooled sample with a composition containing a metal which is capable of decorating agglomerated intrinsic point defects. The coated sample is then heat-treated in an inert atmosphere at a temperature and for a time sufficient to diffuse the metal into the sample. A non-defect delineating etch is performed, followed by a defect delineating etch to reveal the decorated agglomerated intrinsic point defects.

Abstract: An apparatus and a method for removing an organic material from a semiconductor device are provided. The apparatus has a reactor for enclosing at least one semiconductor device with deposited organic material and for enclosing a fluid having ingredients for removing the organic material. An optical sensor system is placed in such a manner that an emitted optical radiation is transmitted through the fluid. The optical sensor system is connected to a control device, which controls the insertion of at least one of the ingredients according to the detected intensity of the optical radiation transmitted through the fluid. The invention allows for optimization of the amount of at least one of the ingredients used in the process.

Abstract: A method of chemical mechanical polishing a metal layer on a substrate in which the substrate is polished at a first polishing rate. Polishing is monitored with an eddy current monitoring system, and the polishing rate is reduced to a second polishing rate when the eddy current monitoring system indicates that a predetermined thickness of the metal layer remains on the substrate. Then polishing is monitored with an optical monitoring system, and polishing is halted when the optical monitoring system indicates that an underlying layer is at least partially exposed.

Abstract: In one aspect, the invention includes a method of etching, comprising: a) forming a material over a substrate, the material comprising a lower portion near the substrate and an upper portion above the lower portion; b) providing a quantity of detectable atoms within the material, the detectable atoms being provided at a different concentration in the lower portion than in the upper portion; c) etching into the material and forming etching debris; and d) detecting the detectable atoms in the debris. In another aspect, the invention includes a method of etching, comprising: a) providing a semiconductor wafer substrate, the substrate having a center and an edge; b) forming a material over the substrate, the material comprising detectable atoms; c) etching into the material and forming etching debris; d) detecting the detectable atoms in the debris; and e) estimating a degree of center-to-edge uniformity of the etching from the detecting.

Abstract: A method for monitoring the performance of a material removal tool includes providing a wafer having at least one process layer formed thereon; measuring the thickness of the process layer; removing at least a portion of the process layer in the material removal tool until an endpoint of the removal process is reached; determining a removal rate based on the measured thickness of the process layer and a duration of the removal process until the endpoint is reached; and comparing the determined removal rate to an expected removal rate to monitor the performance of the material removal tool. A processing line includes a metrology tool, a material removal tool, and a process controller. The metrology tool is adapted to measure a thickness of a process layer formed on a wafer. The material removal tool is adapted to remove at least a portion of the process layer until an endpoint is reached.

Abstract: A method is provided for manufacturing, the method including processing a first workpiece in a nitride processing step and measuring a thickness of a field oxide feature formed on the first workpiece. The method also includes forming an output signal corresponding to the thickness of the field oxide feature. In addition, the method includes feeding back a control signal based on the output signal to adjust processing performed on a second workpiece in the nitride processing step to adjust a thickness of a field oxide feature formed on the second workpiece toward at least a predetermined threshold value.

Abstract: An optical endpoint system controls the overetching of a semiconductor device by using double optical endpoint detection. With a complex spacer, the system monitors the chemistry change at both the top TEOS/nitride interface and the bottom nitride/TEOS interface. This double optical endpoint method reduces the possibility of overetching the layers regardless of the variations in the thickness of the incoming film or the etching characteristics of the etch chamber.

Abstract: A method for planarizing an integrated circuit on a substrate to a target surface of the substrate where at least portions of the target surface are of a first material having a first reflectivity. The substrate is overlaid with a top layer of a second material having a second reflectivity thereby forming an upper surface. Material is removed from the upper surface in a planarizing process, and the first reflectivity and second reflectivity of the upper surface are sensed with multiple wavelengths of electromagnetic radiation. The planarization process is stopped when a ratio of the second reflectivity to the first reflectivity equals a predetermined value.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A method of manufacturing a semiconductor device includes fetching inspection chip information including information of a dust-particle/fault on an inspection chip by irradiating the inspection chip of a semiconductor wafer with an optical beam and by detecting the scattering/diffracting beam of the optical beam, fetching reference chip information as information of a reference chip without a dust-particle/fault, comparing the inspection chip information and the reference chip information to determine a dust-particle/fault, and determining whether the dust-particle/fault is located on a pattern or outside of the pattern by matching between the dust-particle/fault information and design pattern data as data of a prepared pattern. The dust-particle/fault is determined to be a fatal dust-particle/fault when the dust-particle fault is located on the pattern or to be a non-fatal dust-particle fault when the dust-particle/fault is located outside of the pattern.

Abstract: A method and apparatus for endpointing a planarization process of a microelectronic substrate. In one embodiment, the microelectronic substrate can include a semiconductor base, a first material, such as an oxide, disposed on the base, a second material, such as a nitride, disposed on the first material to stiffen the first material, and an endpointing material, such as polysilicon, disposed on the second material. The endpointing material can have a hardness and/or a fracture resistance that is less than a hardness and/or a fracture resistance of the stiffening material and, in one embodiment, can have a coefficient of friction that is different than surrounding material of the microelectronic substrate so as to be detected when exposed to a planarizing medium.

Abstract: An apparatus to generate an endpoint signal to control the polishing of thin films on a semiconductor wafer surface includes a through-hole in a polish pad, a light source, a fiber optic cable, a light sensor, and a computer. A pad assembly includes the polish pad, a pad backer, and a pad backing plate. The pad backer includes a pinhole and a canal that holds the fiber optic cable. The pad backer holds the polish pad so that the through-hole is coincident with the pinhole opening. A wafer chuck holds a semiconductor wafer so that the surface to be polished is against the polish pad. The light source provides light within a predetermined bandwidth. The fiber optic cable propagates the light through the through-hole opening to illuminate the surface as the pad assembly orbits and the chuck rotates. The light sensor receives reflected light from the surface through the fiber optic cable and generates reflected spectral data. The computer receives the reflected spectral data and calculates an endpoint signal.

Abstract: A silicon layer is etched using a plasma etcher equipped with an endpoint control device. CF4 and N2 are provided to the plasma etcher at lower flow rates than those typically used during fixed time etching processes. The endpoint control device monitors optical emissions from the etching chamber at a particular wavelength to detect a predetermined change in intensity. When the change in intensity is detected, the etching is terminated.

Abstract: The present invention is directed to a method of controlling the width of a gate electrode based upon the etch rate of a chemical bath. In one illustrative embodiment, the method comprises determining an etching rate for a chemical bath, determining the manufactured width of the gate electrode, and varying the time duration of an etching process performed in the bath depending upon the etch rate of the bath and the width of the gate electrode.

Abstract: A system and method for monitoring the conditions in a gas plasma processing system while varying or modulating the RF power supplied to the system, so that resulting signals of the electrical circuits of the system provide information regarding operational parameters of the system or the state of a process. Significant improvements in sensitivity and accuracy over conventional techniques are thereby achieved. In addition, the plasma processing system can be thoroughly tested and characterized before delivery, to allow more accurate monitoring of and greater control over a process, thereby improving quality control/assurance of substrates being produced by the system. The information obtained by the modulation technique can be displayed on a monitor screen, in order to allow an operator to accurately monitor the system/process and diagnose any problems with the system/process.

Abstract: Two-step process to improve low-K dielectric etch uniformity, apparatus to perform the method, and semiconductor devices formed in accordance with the method. In a first etching step, an insulating hot edge ring is provided. When the photoresist clearing signal is observed using end-point software, the insulating cover is moved aside to expose the conductive edge ring for the remainder of the etch. One aspect of this invention contemplates an insulator cover over a conductive edge ring at the start of wafer etching, which cover is removed after end-pint detection. The present invention contemplates a number of physical configurations whereby the insulator ring is urged into, and away from, its masking of the conductive edge ring.

Abstract: A method for characterizing semiconductor device performance variations includes processing a wafer in a processing line to form a feature on the wafer; measuring a physical critical dimension of the feature in a first metrology tool to generate a first critical dimension measurement; measuring the physical critical dimension of the feature in a second metrology tool to generate a second critical dimension measurement independent of the first critical dimension measurement; determining an effective critical dimension of the feature in a third metrology tool to generate a third critical dimension measurement; and comparing the first, second, and third critical dimension measurements to identify a metrology drift in one of the first and second metrology tools. A system for characterizing semiconductor device performance variations includes a processing line, first, second, and third metrology tools, and a process controller. The processing line is adapted to process a wafer to form a feature on the wafer.

Abstract: In one aspect, the invention includes a method of etching, comprising: a) forming a material over a substrate, the material comprising a lower portion near the substrate and an upper portion above the lower portion; b) providing a quantity of detectable atoms within the material, the detectable atoms being provided at a different concentration in the lower portion than in the upper portion; c) etching into the material and forming etching debris; and d) detecting the detectable atoms in the debris. In another aspect, the invention includes a method of etching, comprising: a) providing a semiconductor wafer substrate, the substrate having a center and an edge; b) forming a material over the substrate, the material comprising detectable atoms; c) etching into the material and forming etching debris; d) detecting the detectable atoms in the debris; and e) estimating a degree of center-to-edge uniformity of the etching from the detecting.

Abstract: In a semiconductor wafer polishing end point detection method, a polishing progress state distribution on the surface of a semiconductor wafer by chemical and mechanical polishing in forming a metal wire is measured by using one or more measurement systems. The end point of polishing is detected on the basis of a measurement result, thereby obtaining an optimal polishing result. A semiconductor wafer polishing end point detection apparatus is also disclosed.

Abstract: A method of detecting an end point of polishing of a wafer, comprising the steps of: using a color identifying sensor for recognizing a color component of light by applying light from a light source and by converging reflected light to an optical fiber to cause the color identifying sensor to previously recognize a color component of a substance of a wafer which must be polished; displaying an ON-state when the color component is recognized and an OFF-state when the color component is not recognized; one point (except for the central point) of the surface of the rotating wafer is irradiated with light emitted from the color identifying sensor to cause the color identifying sensor to detect the number of times (m) of off-states; and determining an end of polishing of the wafer when the detected number of times (m) coincides with the number (n) of off-states indicating an optimum end point of polishing of the wafer.

Abstract: A standard pattern of a differential value of an interference light is set with respect to a predetermined film thickness of a first member to be processed. The standard pattern uses a wavelength as a parameter. Then, an intensity of an interference light of a second member to be processed, composed just like the first member, is measured with respect to each of a plurality of wavelengths so as to obtain a real pattern of an differential value of the measured interference light intensity. The real pattern also uses a wavelength as a parameter. Then, the film thickness of the second member is obtained according to the standard pattern and the real pattern of the differential value.

Abstract: A method includes providing a first wafer having at least one process layer formed thereon. A portion of a first process layer is removed using a polishing process. A portion of at least one of the first process layer and a second process layer is removed using a buffing process for a pre-selected duration of time. A buffed surface of at least one of the first process layer and the second process layer is inspected to determine a post-buff defect density for the inspected process layer. The duration of the buffing process is adjusted for a second wafer based on the determined post-buff defect density of the inspected process layer. A system includes a processing tool, at least one metrology tool, and a process controller. The processing tool is adapted to remove at least a portion of a first process layer of a first wafer using a buffing process for a pre-selected duration of time.

Abstract: A chemical etching system provides a mixture of sulfuric acid and hydrogen peroxide and serves as the etchant for removing residual copper from an edge bevel region of a semiconductor wafer. The etching system includes a dilution module where concentrated sulfuric acid and concentrated hydrogen peroxide are diluted to the appropriate concentrations and then stored. To reduce the likelihood that oxygen bubbles (from hydrogen peroxide decomposition) will appear in the etchant solution, stored sulfuric acid and hydrogen peroxide are mixed immediately prior to use. In this manner, the dissolved oxygen concentration in the hydrogen peroxide decreases well below the saturation level.

Abstract: An organic film is etched by using plasma generated from an etching gas including a first gas containing, as a principal constituent, a compound including carbon, hydrogen and nitrogen and a second gas including a nitrogen component.

Abstract: A method and apparatus for endpointing a planarization process of a microelectronic substrate. In one embodiment, the apparatus may include a species analyzer that receives a slurry resulting from the planarization process and analyzes the slurry to determine the presence of an endpointing material implanted beneath the surface of the microelectronic substrate. The species analyzer may include a mass spectrometer or a spectrum analyzer. In another embodiment, the apparatus may include a radiation source that directs impinging radiation toward the microelectronic substrate, exciting atoms of the substrate, which in turn produce an emitted radiation. A radiation detector is positioned proximate to the substrate to receive the emitted radiation and determine the endpoint by determining the intensity of the radiation emitted by the endpointing material.

Abstract: A method of planarizing a semiconductor that includes (i) a substrate material, (ii) a first reflective substance positioned on the substrate material, (iii) an intermediate material positioned on the first reflective substance, wherein a channel is defined in a structure which includes the substrate, the first reflective substance, and the intermediate material, and (iv) a second reflective substance positioned on the intermediate material and in the channel is disclosed.

Abstract: A semiconductor wafer polishing endpoint detection system and a method therefor can detect a polishing endpoint accurately. A first polishing endpoint detecting means compares the value of the first averaged gradient data and the first endpoint judgment threshold value for making judgment of end of polishing of wafer when the value of the first averaged gradient data is greater than or equal to the first endpoint judgment threshold value continuously for a predetermined number of times, when the value of the first averaged gradient data is greater than or equal to the first endpoint judgment threshold value for a number of times greater than or equal to a given number of times in total after the absolute value of the first averaged gradient data becomes greater than or equal to a given value, or when a ratio that the value of the first averaged gradient data becomes greater than or equal to the first endpoint judgment threshold value is greater than or equal to a predetermined ratio.

Abstract: A method for dicing a semiconductor wafer into chips is provided, in which the peeling-off of a hard protective film on the surface of a semiconductor substrate may be avoided. Two parallel grooves are formed at a dicing area around a chip by an etching process. Then, SiO2 film is deposited on the GaAs substrate as a protective film. At this time, a bending portion at the interface between the protective films on the inner surface of the groove and the surface of the substrate. When the part between two grooves is cut by a dicing blade, a stress to the protective film caused by the edge of the blade is concentrated to the bending portion, resulting in a crack along the bending portion.

Abstract: The present invention provides a method for appraising the condition of a polishing cloth, and a method for manufacturing semiconductor wafers employing the disclosed appraisal method, allowing acceptably low light point defect numbers of semiconductor wafers to be maintained. The disclosed method comprises polishing the semiconductor wafer using a polishing cloth, washing the wafer, and drying the wafer. The size of particles comprising light point defects is chosen, and the number of light point defects on the semiconductor wafer is counted. Typically, the diameter of particles comprising light point defects is set as 0.12 &mgr;m or greater. The polishing cloth is exchanged when the number of light point defects counted exceeds a prescribed number.