Plasma Etching Patents (Class 438/9)
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Patent number: 7727846Abstract: It is an object of the present invention is to provide a method of manufacturing an SOI substrate provided with a single-crystal semiconductor layer which can be practically used even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like, is used, and further, to manufacture a semiconductor device with high reliability by using such an SOI substrate. A semiconductor layer which is separated from a semiconductor substrate and bonded to a supporting substrate having an insulating surface is irradiated with electromagnetic waves, and the surface of the semiconductor layer is subjected to polishing treatment. At least part of a region of the semiconductor layer is melted by irradiation with electromagnetic waves, and a crystal defect in the semiconductor layer can be reduced. Further, the surface of the semiconductor layer can be polished and planarized by polishing treatment.Type: GrantFiled: June 16, 2008Date of Patent: June 1, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Hideto Ohnuma, Ryota Imahayashi, Yoichi Iikubo, Kenichiro Makino, Sho Nagamatsu
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Patent number: 7713842Abstract: In a method for producing a bonded wafer by bonding a wafer for active layer to wafer for support layer and then thinning the wafer for active layer, a terrace grinding for forming a terrace portion is carried out prior to a step of exposing the oxygen ion implanted layer to thereby leave an oxide film on a terrace portion of the wafer for support layer.Type: GrantFiled: September 29, 2008Date of Patent: May 11, 2010Assignee: Sumco CorporationInventors: Hideki Nishihata, Isoroku Ono, Akihiko Endo
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Patent number: 7713758Abstract: The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures.Type: GrantFiled: June 13, 2007Date of Patent: May 11, 2010Assignee: Tokyo Electon LimitedInventors: Asao Yamashita, Merritt Funk, Daniel Prager, Lee Chen, Radha Sundararajan
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Patent number: 7700378Abstract: A method and system for controlling a dimension of an etched feature. The method includes: measuring a mask feature formed on a top surface of a layer on a substrate to obtain a mask feature dimension value; and calculating a mask trim plasma etch time based on the mask feature dimension value, a mask feature dimension target value, a total of selected radio frequency power-on times of a plasma etch tool since an event occurring to a chamber or chambers of a plasma etch tool for plasma etching the layer, and an etch bias target for a layer feature to be formed from the layer where the layer is not protected by the mask feature during a plasma etch of the layer.Type: GrantFiled: October 15, 2007Date of Patent: April 20, 2010Assignee: International Business Machines CorporationInventors: Gary Walter Behm, Teresita Quitua Magtoto, Rajiv M. Ranade
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Patent number: 7695984Abstract: Method and system for detecting endpoint for a plasma etch process are provided. In accordance with one embodiment, the method provides a semiconductor substrate having a film to be processed thereon. The film is processed in a plasma environment during a time period to provide for device structures. Information associated with the plasma process is collected. The information is characterized by a first signal intensity. Information on a change in the first signal intensity is extracted. The change in the first signal intensity has a second signal intensity. The change in signal intensity at the second signal intensity is associated to an endpoint of processing the film in the plasma environment. The second signal intensity may be about 0.25% and less of the first signal intensity.Type: GrantFiled: April 20, 2006Date of Patent: April 13, 2010Assignee: Pivotal Systems CorporationInventors: Joseph R Monkowski, Barton Lane
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Patent number: 7695987Abstract: A method and apparatus for automatic determination of semiconductor plasma chamber matching a source of fault are provided. Correlated plasma attributes are measured for process used for calibration both in a chamber under study and in a reference chamber. Principal component analysis then is performed on the measured correlated attributes so as to generate steady principal components and transitional principal components; and these principal components are compared to reference principal components associated with a reference chamber. The process used for calibration includes a regular plasma process followed by a process perturbation of one process parameter. Similar process perturbation runs are conducted several times to include different perturbation parameters. By performing inner products of the principal components of chamber under study and the reference chamber, matching scores can be reached. Automatic chamber matching can be determined by comparing these scores with preset control limits.Type: GrantFiled: December 19, 2006Date of Patent: April 13, 2010Assignee: Applied Materils, Inc.Inventors: Matthew F. Davis, Lei Lian
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Patent number: 7695986Abstract: The present invention provides a method and apparatus for modifying process selectivities based on process state information. The method includes accessing process state information associated with at least one material removal process, determining at least one selectivity based on the process state information, and modifying at least one process parameter of said material removal process based on said at least one determined selectivity.Type: GrantFiled: August 1, 2005Date of Patent: April 13, 2010Assignee: GlobalFoundries, Inc.Inventors: Matthew A. Purdy, Matthew Ryskoski, Richard J. Markle
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Publication number: 20100087017Abstract: It is intended to produce a semiconductor device with a stable gate length, using an end-point detection process based on monitoring a plasma emission intensity during dry etching for setting a gate length.Type: ApplicationFiled: September 1, 2009Publication date: April 8, 2010Applicant: Unisantis Electronics (Japan) Ltd.Inventors: Fujio Masuoka, Shintaro Arai
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Patent number: 7687298Abstract: A microelectromechanical device and method of fabricating the same, including a layer of patterned and deposited metal or mechanical-quality, doped polysilicon inserted between the appropriate device element layers, which provides a conductive layer to prevent the microelectromechanical device's output from drifting. The conductive layer may encapsulate of the device's sensing or active elements, or may selectively cover only certain of the device's elements. Further, coupling the metal or mechanical-quality, doped polysilicon to the same voltage source as the device's substrate contact may place the conductive layer at the voltage of the substrate, which may function as a Faraday shield, attracting undesired, migrating ions from interfering with the output of the device.Type: GrantFiled: September 28, 2005Date of Patent: March 30, 2010Assignee: Honeywell International Inc.Inventors: Thomas Stratton, Gary Gardner, Curtis Rhan
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Publication number: 20100055807Abstract: A plasma ashing apparatus for removing organic matter from a substrate including a low k dielectric, comprising a first gas source; a plasma generating component in fluid communication with the first gas source; a process chamber in fluid communication with the plasma generating component; an exhaust conduit in fluid communication with the process chamber; wherein the exhaust conduit comprises an inlet for a second gas source and an afterburner assembly coupled to the exhaust conduit, wherein the inlet is disposed intermediate to the process chamber and an afterburner assembly, and wherein the afterburner assembly comprises means for generating a plasma within the exhaust conduit with or without introduction of a gas from the second gas source; and an optical emission spectroscopy device coupled to the exhaust conduit comprising collection optics focused within a plasma discharge region of the afterburner assembly.Type: ApplicationFiled: September 2, 2009Publication date: March 4, 2010Applicant: AXCELIS TECHNOLOGIES, INC.Inventors: Aseem Kumar Srivastava, Palanikumaran Sakthivel, Thomas James Buckley
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Patent number: 7670947Abstract: A process for forming an interconnect structure in a low-k dielectric layer includes etching to form trenches in the dielectric layer, removal of photoresist, and further etching to remove damaged portions of the dielectric layer in sidewalls of the trenches. An interconnect structure includes a low-k dielectric layer formed on a substrate, and a conductor embedded in the dielectric layer, the conductor having an edge portion with an inwardly rounded shape.Type: GrantFiled: January 11, 2007Date of Patent: March 2, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsang-Jiuh Wu, Syun-Ming Jang, Ming-Chung Liang, Hsin-Yi Tsai
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Plasma processing method and plasma processing apparatus for performing accurate end point detection
Patent number: 7662646Abstract: In a plasma processing method, a correlation between substrate type data and optical data is obtained by using a multivariate analysis; substrate type data is obtained from optical data based on the correlation when initiating a plasma processing; and a substrate type is determined by using the obtained substrate type data. Further, a setting data set corresponding to the determined substrate type is selected from setting data sets, each for detecting a plasma processing end point of the plasma processing, each of the setting data sets being stored in advance in a data storage unit; an end point of the plasma processing is detected based on the selected setting data set; and the plasma processing is terminated at the detected end point.Type: GrantFiled: March 16, 2007Date of Patent: February 16, 2010Assignee: Tokyo Electron LimitedInventors: Kosuke Ogasawara, Susumu Saito, Syuji Nozawa -
Publication number: 20100009470Abstract: An apparatus for adaptive self-aligned dual patterning and method thereof. The method includes providing a substrate to a processing platform configured to perform an etch process and a deposition process and a metrology unit configured for in-vacuo critical dimension (CD) measurement. The in-vacuo CD measurement is utilized for feedforward adaptive control of the process sequence processing platform or for feedback and feedforward adaptive control of chamber process parameters. In one aspect, a first layer of a multi-layered masking stack is etched to form a template mask, an in-vacuo CD measurement of the template mask is made, and a spacer is formed, adjacent to the template mask, to a width that is dependent on the CD measurement of the template mask.Type: ApplicationFiled: July 11, 2008Publication date: January 14, 2010Inventors: Matthew F. Davis, Thorsten B. Lill, Lei Lian
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Patent number: 7645705Abstract: A method of fabricating a semiconductor device including forming a pre metal dielectric liner over a semiconductor substrate on which a transistor is formed. The pre metal dielectric liner is sputter etched to form an unstable interface at the surface. The boron is trapped in an interface in an unstable state in a surface of the PMD liner to effectively suppress the boron penetration phenomenon to the semiconductor substrate.Type: GrantFiled: December 22, 2006Date of Patent: January 12, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Sung Kyung Jung
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Patent number: 7645704Abstract: The present invention provides a method for removing sacrificial materials in fabrications of microstructures using a selected spontaneous vapor phase chemical etchants. During the etching process, an amount of the etchant is fed into an etch chamber for removing the sacrificial material. Additional amount of the etchant are fed into the etch chamber according to a detection of an amount or an amount of an etching product so as to maintaining a substantially constant etching rate of the sacrificial materials inside the etch chamber. Accordingly, an etching system is provided for removing the sacrificial materials based on the disclosed etching method.Type: GrantFiled: September 17, 2003Date of Patent: January 12, 2010Assignee: Texas Instruments IncorporatedInventors: Hongqin Shi, Gregory P. Schaadt
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Patent number: 7635648Abstract: A method for fabricating dual material gate structures in a device is provided. The dual material gate structures have different gate electrode materials in different regions of the device. In one embodiment, the method includes providing a substrate having a patterned first gate electrode and a patterned first gate dielectric layer disposed on the substrate, removing a portion of the first gate electrode from the substrate to define a trench on the substrate, and filling the trench to form a second gate electrode.Type: GrantFiled: April 10, 2008Date of Patent: December 22, 2009Assignee: Applied Materials, Inc.Inventors: Igor Peidous, Victor Ku, Joe Piccirillo
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Patent number: 7632690Abstract: A process and apparatus for controlling an etchant gas concentration in an etch chamber. The etchant gas concentration and an inert gas concentration are determined and the latter concentration is used to normalize the etchant gas concentration. The normalized value is compared with a predetermined reference value and the flow of etchant gas into the chamber is controlled in response thereto.Type: GrantFiled: July 13, 2007Date of Patent: December 15, 2009Assignee: Agere Systems Inc.Inventor: Gerald W. Gibson, Jr.
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Patent number: 7625824Abstract: The present invention provides a method for creating a process change detection algorithm. An evolutionary computing technique is applied to at least one process dataset containing at least one known process change. The evolutionary computing technique will generate a process state function (or a scaling coefficient set for use with an existing process state function) that optimizes detection of the known process changes. The generated process state function or coefficients can then be applied thereafter to future datasets (either in real-time or after processing) to detect process changes.Type: GrantFiled: May 26, 2006Date of Patent: December 1, 2009Assignee: Oerlikon USA, Inc.Inventor: Jason Plumhoff
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Publication number: 20090286333Abstract: A method of etching a semiconductor wafer is provided. The method comprises the steps of: jetting a mixed gas including hydrogen fluoride and ozone onto a surface of a semiconductor wafer; monitoring the surface of the semiconductor wafer; analyzing the surface of the semiconductor wafer; and adjusting at least one of the hydrogen fluoride concentration and the ozone concentration in the mixed gas based on a result of the analysis.Type: ApplicationFiled: May 13, 2009Publication date: November 19, 2009Inventors: Kazuaki Kozasa, Tomonori Kawasaki
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Patent number: 7620511Abstract: Methods for determining characteristics of a plasma are provided. In one embodiment, a method for determining characteristics of a plasma includes obtaining metrics of current and voltage information for first and second waveforms coupled to a plasma at different frequencies, determining at least one characteristic of the plasma using the metrics obtained from each different frequency waveform. In another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, and determining at least one characteristic of a plasma using model. In yet another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, measuring current and voltage for waveforms coupled to the plasma and having at least two different frequencies, and determining ion mass of a plasma from model and the measured current and voltage of the waveforms.Type: GrantFiled: June 5, 2007Date of Patent: November 17, 2009Assignee: Applied Materials, Inc.Inventors: Steven C. Shannon, Daniel J. Hoffman, Jeremiah T. P. Pender, Tarreg Mawari
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Detection of arcing events in wafer plasma processing through monitoring of trace gas concentrations
Publication number: 20090280581Abstract: A method of detecting substrate arcing in a semiconductor plasma processing apparatus is provided. A substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. Process gas is introduced into the reaction chamber. A plasma is generated from the process gas and the substrate is processed with the plasma. Intensities of real-time spectrometry signals of selected gas species produced in the reaction chamber during plasma processing are monitored. The selected gas species are generated by a substrate arcing event. The arcing event is detected when the intensities are above a threshold value.Type: ApplicationFiled: May 12, 2008Publication date: November 12, 2009Applicant: Lam Research CorporationInventor: Eric Hudson -
Patent number: 7608546Abstract: A method for fabricating a semiconductor device includes forming an etch target layer over a substrate that includes a cell region and a peripheral region. A first hard mask layer, a second hard mask layer, and an anti-reflective coating layer are formed over the etch target layer. A photosensitive pattern is formed over the anti-reflective coating layer. The anti-reflective coating layer is etched to have a width smaller than the width of the photosensitive pattern. The second hard mask layer is etched. A main etching and an over-etching are performed on the first hard mask layer. The etch target layer is then etched.Type: GrantFiled: June 20, 2007Date of Patent: October 27, 2009Assignee: Hynix Semiconductor Inc.Inventors: Sang-Soo Park, Chang-Heon Park, Dong-Ryeol Lee
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Patent number: 7604908Abstract: A fine pattern forming method includes the first step of depositing a plasma reaction products on a sidewall of a patterned mask layer to increase a pattern width thereof, the second step of etching a first etching target layer by using as a mask the mask layer, the pattern width of which has been increased, the third step of filling with a mask material a space formed in the etched first etching target layer, the fourth step of etching the etched first etching target layer leaving the mask material filling the space, and the fifth step of etching a second etching target layer by using a remaining mask material as a mask.Type: GrantFiled: March 8, 2006Date of Patent: October 20, 2009Assignee: Tokyo Electron LimitedInventors: Masato Kushibiki, Akitaka Shimizu
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Publication number: 20090253222Abstract: An etching process state judgment method comprising: a spectral data obtaining step, in which an optical emission spectrum distribution is obtained by monitoring optical emission during an etching process of a plurality of wafers; a peak detection step, in which peaks are detected from the optical emission spectrum distribution at a specific time point during the etching process, to obtain peak characteristics; a common peak identifying step, in which peaks common to the wafers are identified among the peaks detected in the peak detection step; and a state detection step, in which the characteristics are compared regarding the common peaks, to detect a state of each wafer in the etching process. A state (anomaly or normalcy) of an etching process is detected from optical emission spectrum distribution at the time of etching process, by a simple method without assuming substances.Type: ApplicationFiled: April 3, 2009Publication date: October 8, 2009Inventors: Toshihiro Morisawa, Shoji Ikuhara, Akira Kagoshima, Daisuke Shiraishi
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Patent number: 7588946Abstract: A method of controlling gate formation of semiconductor devices includes determining the correlation between the step heights of isolation structures and the over-etching time by measuring step heights of isolation structures, determining an over-etching time based on the step heights, and etching gates using the over-etching time. The method may include an after-etching-inspection to measure the gate profile and fine-tune the gate formation control. Within-wafer uniformity can also be improved by measuring the step height uniformity on a wafer and adjusting gate formation processes.Type: GrantFiled: July 25, 2005Date of Patent: September 15, 2009Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Tsung Tso, Jiun-Hong Lai, Mei-Jen Wu, Li Te Hsu, Pin Chia Su, Po-Zen Chen
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Patent number: 7582490Abstract: A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to the process environment, a voltage bias is applied across the gap. Electron tunneling current across the gap is measured during the process environment exposure and the process environment is controlled during process environment exposure based on tunneling current measurement. A method for controlling the gap between electrically conducting electrodes provided on a support structure. Each electrode has an electrode tip separated from other electrode tips by a gap. The electrodes are exposed to a flux of ions causing transport of material of the electrodes to corresponding electrode tips, locally adding material of the electrodes to electrode tips in the gap.Type: GrantFiled: January 29, 2004Date of Patent: September 1, 2009Assignee: President and Fellows of Harvard CollegeInventors: Jene A. Golovchenko, Gregor M. Schürmann, Gavin M. King, Daniel Branton
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Patent number: 7579273Abstract: A method for manufacturing a photodiode array includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has a first layer of a first conductivity proximate the first main surface and a second layer of a second conductivity proximate the second main surface. A via is formed in the substrate which extends to a first depth position relative to the first main surface. The via has a first aspect ratio. Generally simultaneously with forming the via, an isolation trench is formed in the substrate spaced apart from the via which extends to a second depth position relative to the first main surface. The isolation trench has a second aspect ratio different from the first aspect ratio.Type: GrantFiled: August 10, 2007Date of Patent: August 25, 2009Assignee: Icemos Technology Ltd.Inventors: Robin Wilson, Conor Brogan, Hugh J. Griffin, Cormac MacNamara
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Patent number: 7566574Abstract: A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled into the front scribe lines. Subsequently, the structural pattern is bonded to a carrier wafer with a bonding layer, and a plurality of back scribe lines are defined on the back surface of the wafer. Finally, the filling layer filled in the front scribe lines is removed.Type: GrantFiled: September 6, 2007Date of Patent: July 28, 2009Assignee: Touch Micro-System Technology Inc.Inventor: Chen-Hsiung Yang
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Publication number: 20090160027Abstract: Methods of manufacturing semiconductor devices and methods of optical proximity correction methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes determining an amount of reactive ion etch (RIE) lag of a RIE process for a material layer of the semiconductor device, and adjusting a size of at least one pattern for a feature of the material layer by an adjustment amount to partially compensate for the amount of RIE lag determined.Type: ApplicationFiled: December 19, 2007Publication date: June 25, 2009Inventors: O Seo Park, Wai-Kin Li
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Publication number: 20090162952Abstract: The present invention generally provides methods and apparatus for controlling edge performance during process. One embodiment of the present invention provides an apparatus comprising a chamber body defining a process volume, a gas inlet configured to flow a process gas into the process volume, and a supporting pedestal disposed in the process volume. The supporting pedestal comprises a top plate having a substrate supporting surface configured to receive and support the substrate on a backside, and an edge surface configured to circumscribe the substrate along an outer edge of the substrate, and a height difference between a top surface of the substrate and the edge surface is used to control exposure of an edge region of the substrate to the process gas.Type: ApplicationFiled: December 19, 2007Publication date: June 25, 2009Inventors: Wei Liu, Johanes F. Swenberg, Hanh D. Nguyen, Son T. Nguyen, Roger Curtis, Philip A. Bottini, Michael J. Mark
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Patent number: 7544521Abstract: A method of trimming the critical dimension of an isolated line to a greater extent than a dense line is provided. A mask is formed of an organic material over the etch layer wherein the mask has at least a first region with a first pattern density and a second region with a second pattern density. A surface area of the organic material in the first region is measured. A surface area of the organic material in the second region is measured. A reverse bias trim of the mask is provided, wherein a ratio of a trim rate of the organic material in the first region to a trim rate of the organic material in the second region is related to a ratio of the measured surface area of the organic material in the first region to the measured surface area of the organic material in the second region.Type: GrantFiled: September 11, 2006Date of Patent: June 9, 2009Assignee: Lam Research CorporationInventors: Scott Briggs, Aaron Eppler
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Publication number: 20090081815Abstract: The invention can provide a method of processing a substrate using S-O processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures.Type: ApplicationFiled: September 21, 2007Publication date: March 26, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Asao Yamashita, Merritt Funk, Daniel J. Prager, Lee Chen, Radha Sundararajan
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Patent number: 7504288Abstract: A linear laser light which has an energy and is to be scanned is irradiated to a semiconductor device formed on a substrate, and then the substrate is rotated to irradiate to the semiconductor device a linear laser light which has a higher energy than that of the irradiated linear laser light and is to be scanned. Also, in a semiconductor device having an analog circuit region and a remaining circuit region wherein the analog circuit region is smaller than the remaining circuit region, a linear laser light having an irradiation area is irradiated to the analog circuit region without moving the irradiation area so as not to overlap the laser lights by scanning. On the other hand, the linear laser light to be scanned is irradiated to the remaining circuit region.Type: GrantFiled: August 7, 2000Date of Patent: March 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Publication number: 20090068768Abstract: A non-destructive and simple analytical method is provided which allows in situ monitoring of plasma damage during the plasma processing such as resist stripping. If a low-k film is damaged during plasma processing, one of the reaction products is water, which is remained adsorbed onto the low-k film (into pores), if the temperature is lower than 100-150 C. A plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules forming electronically excited oxygen atoms is used to detect the adsorbed water. The excited oxygen is detected from optical emission at 777 nm. Therefore, the higher the adsorbed water concentration (higher damage), a more intensive (oxygen) signal is detected. Therefore, intensity of oxygen signal is a measure of plasma damage in the previous strip step.Type: ApplicationFiled: September 4, 2008Publication date: March 12, 2009Applicants: Interuniversitair Microelektronica Centrum vzw (IMEC), Katholieke Universiteit Leuven, K.U. LEUVEN R&DInventors: Adam Michal Urbanowicz, Mikhail Baklanov
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Publication number: 20090061540Abstract: The present invention provides a plasma process detecting sensor. In the plasma process detecting sensor, a hole diameter of an insulating film is spread with almost no spread of a hole diameter of an upper electrode. Therefore, when the plasma process detecting sensor is exposed to a plasma, positive ions incident onto the bottom of a contact hole are hard to collide with an inner wall surface of a hole main body of the insulating film. As a result, the inner wall surface of the hole main body of the insulating film is hard to undergo damage, and the generation of a defect level that assists electric conduction can be suppressed. It is thus possible to suppress age deterioration of a sensor function during the measurement of a charge-up under an environment of a plasma etching condition.Type: ApplicationFiled: July 18, 2008Publication date: March 5, 2009Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Tomohiko Tatsumi
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Patent number: 7497958Abstract: The invention includes methods of forming reticles configured for imprint lithography, methods of forming capacitor container openings, and methods in which capacitor container openings are incorporated into DRAM arrays. An exemplary method of forming a reticle includes formation of a radiation-imageable layer over a material. A lattice pattern is then formed within the radiation-imageable layer, with the lattice pattern defining a plurality of islands of the radiation-imageable layer. The lattice-patterned radiation-imageable layer is utilized as a mask while subjecting the material under the lattice-patterned layer to an etch which transfers the lattice pattern into the material. The etch forms a plurality of pillars which extend only partially into the material, with the pillars being spaced from one another by gaps. The gaps are subsequently narrowed with a second material which only partially fills the gaps.Type: GrantFiled: June 21, 2006Date of Patent: March 3, 2009Assignee: Micron Technology, Inc.Inventor: Gurtej S. Sandhu
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Patent number: 7494827Abstract: The plasma etching method first forms a coating film on the inner surface of the chamber. Next, an etching process is performed on a wafer under a condition in which the coating film is formed, and thereafter a reaction product adhered onto the coating film in the etching process is removed together with the coating film. Each of these processes is implemented at a frequency in which the condition of the chamber inner surface is nearly always the same at the time of initiating the etching process.Type: GrantFiled: June 21, 2006Date of Patent: February 24, 2009Assignee: Panasonic CorporationInventors: Mitsuhiro Ohkuni, Keiichi Matsunaga
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Publication number: 20090029489Abstract: An endpoint detection device, a plasma reactor with the endpoint detection device, and an endpoint detection method are provided. The endpoint detection device includes an OES data operation unit, a data selector, a product generator, an SVM, and an endpoint determiner. The OES data operation unit processes reference OES data by normalization and PCA. The data selector selects part of the linear reference loading vectors and selects part of the selected linear reference loading vectors. The product generator outputs at least one reference product value. The SVM performs regression and outputs a prediction product value. The endpoint determiner detects a process wafer etch or deposition endpoint and outputs a detection signal.Type: ApplicationFiled: February 25, 2008Publication date: January 29, 2009Applicant: DMS. CO. LTD.Inventors: Kun Joo Park, Kwang Hoon Han, Kee Hyun Kim, Weon Mook Lee, Kyounghoon Han, Heeyeop Chae
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Patent number: 7482177Abstract: A method for manufacturing an optical device includes the steps of: forming a first multilayer film, including forming a first mirror above a substrate, forming an active layer above the first mirror, forming a second mirror above the active layer, forming a semiconductor layer on the second mirror, and forming a sacrificial layer on the semiconductor layer; conducting a first examination step of conducting a reflectance examination on the first multilayer film; forming a second multilayer film by removing the sacrificial layer from the first multilayer film; conducting a second examination step of conducting a reflection coefficient examination on the second multilayer film; and patterning the second multilayer film to form a surface-emitting laser section having the first mirror, the active layer and the second mirror, and a diode section having the semiconductor layer, wherein the sacrificial layer is formed to have an optical film thickness of an odd multiple of ?/4, where ? is a design wavelength of lighType: GrantFiled: June 27, 2007Date of Patent: January 27, 2009Assignee: Seiko Epson CorporationInventor: Yasutaka Imai
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Patent number: 7479395Abstract: The invention relates to a method for monitoring a manufacturing process, which by using a linear combination of measured variables with judiciously chosen weighting, produces a suitable (optimal) signal for determining each parameter. The extraction of the parameters from the measured variables is thus greatly simplified and in many cases becomes actually possible for the first time. According to the invention, large amounts of data may now be prepared, such that the crucial information (parameters) can be obtained from the data, almost in real time, or in real time.Type: GrantFiled: July 25, 2002Date of Patent: January 20, 2009Assignee: Infineon Technologies AGInventors: Ferdinand Bell, Dirk Knobloch, Knut Voigtländer, Jan Zimpel
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Patent number: 7476556Abstract: Systems and methods for plasma processing of microfeature workpieces are disclosed herein. In one embodiment, a method includes generating a plasma in a chamber while a microfeature workpiece is positioned in the chamber, measuring optical emissions from the plasma, and determining a parameter of the plasma based on the measured optical emissions. The parameter can be an ion density or another parameter of the plasma.Type: GrantFiled: August 11, 2005Date of Patent: January 13, 2009Assignee: Micron Technology, Inc.Inventors: Shu Qin, Allen McTeer
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Patent number: 7468790Abstract: A method of detecting gaseous species in a mixture by light-emission spectroscopy, in which use is made of the radiation emitted by a plasma (4) present in the gas mixture under analysis, a measurement system (20) is used to take a raw optical spectrum of said radiation emitted by the plasma (4), and the raw optical spectrum is compared with a library of reference optical spectra, the method comprising a step of generating a pruned optical spectrum, which step consists in making use, in the raw optical spectrum, of only those zones of the spectrum that present a significant shape corresponding to a predefined shape criterion, and subsequently said pruned spectrum is compared with the library of reference optical spectra.Type: GrantFiled: February 24, 2005Date of Patent: December 23, 2008Assignee: AlcatelInventors: Gloria Sogan, Julien Bounouar, Jean-Pierre Desbiolles, Isabelle Gaurand
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Publication number: 20080311687Abstract: The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures.Type: ApplicationFiled: June 13, 2007Publication date: December 18, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Asao Yamashita, Merritt Funk, Daniel Prager, Lee Chen, Radha Sundararajan
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Patent number: 7456109Abstract: A cleaning method of a substrate processor that reduces damage to a member in a substrate processing container. The method of cleaning the substrate processing container of the substrate processor that processes a target substrate according to the present invention includes: introducing gas into a remote plasma generating unit of the substrate processor; exciting the gas by the remote plasma generating unit, and generating reactive species; and supplying the reactive species to the processing container from the remote plasma generating unit, and pressurizing the processing container at 1333 Pa or greater.Type: GrantFiled: November 14, 2003Date of Patent: November 25, 2008Assignee: Tokyo Electron LimitedInventors: Hideaki Yamasaki, Kazuhito Nakamura, Koumei Matsuzawa, Tsukasa Matsuda, Yumiko Kawano
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Patent number: 7455790Abstract: A plasma processing method using a spectroscopic processing unit which includes separating spectrally plasma radiation emitted from a vacuum process chamber into component spectra, converting the component spectra into a time series of analogue electric signals composed of different wavelength components at a predetermined period, adding together analogue signals of the different wavelength components, converting a plurality of added signals into digital quantities on a predetermined-period basis, digitally adding together the plurality of added and converted signals a plural number of times on a plural-signal basis, determining discriminatively an end point of a predetermined plasma process on the basis of a signal resulting from the digital addition step, and terminating the predetermined plasma process.Type: GrantFiled: March 10, 2005Date of Patent: November 25, 2008Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Tetsunori Kaji, Shizuaki Kimura, Tatehito Usui, Takashi Fujii
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Patent number: 7452824Abstract: The invention involves a method of characterizing a plasma reactor chamber through the behavior of many selected plasma parameters as functions of many selected chamber parameters. The plasma parameters may be selected from a group including ion density, wafer voltage, etch rate and wafer current or other plasma parameters. The chamber parameters are selected from a group including source power, bias power, chamber pressure, magnetic coil current in different magnetic coils, gas flow rates in different gas injection zones and species composition of the gas in different gas injection zones.Type: GrantFiled: December 11, 2006Date of Patent: November 18, 2008Assignee: Applied Materials, Inc.Inventors: Daniel J. Hoffman, Ezra Robert Gold
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Publication number: 20080261335Abstract: Apparatus and method for endpoint detection are provided for photomask etching. The apparatus provides a plasma etch chamber with a substrate support member. The substrate support member has at least two optical components disposed therein for use in endpoint detection. Enhanced process monitoring for photomask etching are achieved by the use of various optical measurement techniques for monitoring at different locations of the photomask.Type: ApplicationFiled: October 29, 2007Publication date: October 23, 2008Inventor: Michael Grimbergen
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Patent number: 7440859Abstract: Methods for determining characteristics of a plasma are provided. In one embodiment, a method for determining characteristics of a plasma includes obtaining metrics of a plasma at two different frequencies, and determining at least one characteristic of the plasma utilizing the metrics. In another embodiment, a method for determining characteristics of a plasma includes obtaining metrics of current and voltage information for first and second waveforms coupled to a plasma at different frequencies, determining at least one characteristic of the plasma using the metrics obtained from each different frequency waveform. In another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, and determining at least one characteristic of a plasma using model.Type: GrantFiled: December 29, 2006Date of Patent: October 21, 2008Assignee: Applied Materials, Inc.Inventors: Steven C. Shannon, Daniel J. Hoffman, Jeremiah T. P. Pender, Tarreg Mawari
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Patent number: 7439068Abstract: Disclosed is a plasma monitoring method for detecting the amount of atomic radicals generated by dissociation of a molecular raw material gas during a plasma processing conducted by introducing the molecular raw material gas and a rare gas into a process atmosphere, wherein the amount of the atomic radicals is predicted from the dissociation degree of the molecular raw material gas determined from the partial pressure of the molecular raw material gas in the process atmosphere, the luminous intensity of the rare gas, and the partial pressure of the rare gas in the process atmosphere, whereby the amount of the specific atomic radicals can be monitored easily and accurately.Type: GrantFiled: June 25, 2004Date of Patent: October 21, 2008Assignee: Sony CorporationInventor: Tetsuya Tatsumi
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Patent number: 7427519Abstract: A method of detecting an end point of a plasma etching process for etching a first layer on a second layer is described, the first layer producing a first etching product and the second layer a second etching product. Time-dependent intensity [Ij=1 to m(t)] of a number “m” (m?1) of spectral line(s) of the first etching product in emission spectrum of the plasma and that [Ii=1 to n(t)] of a number “n” (n?1) of spectral line(s) of the second etching product in the emission spectrum are collected, wherein “m+n?3” is satisfied. One index of Lm ? ( t ) ? [ = ? i = 1 , j = 1 n , m ? ? I i ? ( t ) I j ? ( t ) ] , Ls ? ( t ) ? [ = ? i = 1 , j = 1 n , m ? ? I i ? ( t ) I j ? ( t ) ] , Lm?(t) {=d[Lm(t)]/dt} and Ls?(t) {=d[Ls(t)]/dt} is calculated in real time and plotted with the time. An etching end-point is identified from the plot of the one index with the time.Type: GrantFiled: February 2, 2007Date of Patent: September 23, 2008Assignee: MACRONIX International Co., Ltd.Inventor: Hong-Ji Lee