Abstract: Blixers, which are a relatively recent development, have not be studied as extensively as many older circuit designs. Here, a blixer is provided that improves linearity and reduces noise over other conventional blixer designs. To accomplish this, the blixer provided here uses a differential amplifier and/or a dummy path within its mixing circuit to perform noise reduction (and improve linearity).

Abstract: Coverage for a wireless network is improved using a frequency shifting scheme. A wireless signal in a frequency band is shifted to another band, and carried in the shifted band to another location where the signal is shifted back to the original frequency band. The frequency shifting may utilize frequency shifting schemes such as mixer/filter and heterodyne. The wireless signal can be frequency shifted by converting it to other representing signals (such as I/Q components) and forming the frequency-shifted signal from the representations. The transmission medium may use dedicated wiring or existing service wiring in a residence or building, including LAN, telephone, AC power and CATV wiring. The system may be enclosed as a stand-alone unit, housed in integrated form as part of a service outlet or as a snap-on/plug-in module.

Abstract: In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.

Abstract: A ZIF direct-conversion OFDM receiver capable of estimating and correcting an I/Q imbalance in a baseband signal. A complex down-conversion is performed on a received signal r(t). The received signal r(t) is divided into an In-phase signal (I) and Quadrature-phase signal (Q). An I/Q imbalance is introduced by the local oscillator such that the I/Q imbalance includes an amplitude imbalance factor (?) and phase imbalance factor (?). The I and Q signals are amplified, filtered and digitized. The digitized I and Q signals are processed via a Fast Fourier Transform (FFT). An I/Q compensation algorithm estimates the values of the amplitude imbalance factor (?) and, the phase imbalance factor (?) based on a time expectation calculation. The imbalance factors are applied to the baseband signal to recover the signal of interest x(t). The OFDM receiver outputs the signal of interest x(t) to an information display device.

Abstract: An improved double balanced mixer is provided which in one embodiment includes a first balun for receiving a first single input and providing a first balanced output having two ports, a second balun for receiving a second single input and providing a second balanced output having two ports, and a balanced mixer core responsive to the first and second balanced outputs to provide a mixed signal from the first and second single inputs. The first balun includes an RC network coupled between at least one of the ports of the first balanced output and one of ground and a common mode node of the first balun to improve the linearity of the double balanced mixer.

Abstract: A pixel clock generator includes a frequency divider 4 that generates a pixel clock PCLK based on a high frequency clock VCLK, a comparator 5 that calculates an error Lerr in the time obtained by integrating a cycle of the pixel clock PCLK for a target number RefN from a time when synchronization signals SPSYNC and EPSYNC are detected, a filter 6, and a frequency calculating unit 7 that sets a frequency dividing value M of the frequency divider 4. The filter 6 and the frequency calculating unit 7 calculate an average of a frequency of the pixel clock PCLK based on the error Lerr, determine a reference error value from the error Lerr in N-cycles, calculate offset values of the frequencies of N pieces of pixel clocks PCLK based on a difference between the reference error value and the error Lerr, and calculate the frequency dividing value M based on a result obtained by adding the circularly selected offset values and the average of the frequency of the pixel clock PCLK.

Abstract: One embodiment of the present invention provides a receiver for wireless communication. The receiver includes a group of band-pass filters (BPFs), a wideband amplifier coupled to the BPFs, and a tunable demodulator coupled to the wideband amplifier. A particular BPF is configured to filter RF signals at a particular frequency band. The wideband amplifier is configured to amplify the filtered RF signals. The tunable demodulator is configured to demodulate the amplified RF signals.

Abstract: In an oscillating apparatus, a detection unit detects a frequency offset between an input signal and a reference signal. A code generation unit specifies a relationship among a code having a predetermined number of bits, the frequency offset, and a voltage to be applied to a voltage-controlled oscillator by a DAC, in accordance with a frequency offset detection state of the detection unit. The code generation unit also generates a frequency offset correction code having a predetermined number of bits in accordance with the specified relationship. The DAC applies the voltage to the voltage-controlled oscillator, in accordance with the relationship described above and the code generated by the code generation unit. The voltage controlled oscillator outputs an oscillator signal having an oscillation frequency corresponding to the voltage applied by the DAC.

Abstract: A frequency translation filter includes a baseband filter circuit, a clock generator, and a switching circuit. The baseband filter circuit is operable to provide a baseband filter response. The clock generator is operable to generate multiple-phase clock signals at a desired frequency. The switching circuit is operable to frequency translate the baseband filter response of the baseband filter circuit to a high frequency filter response in accordance with the multiple-phase clock signals.

Abstract: A circuit includes first and second transconductance stages each having an input to receive a signal, and a current combiner circuit coupled to outputs of the first and second transconductance stages. The current combiner circuit forms a path from the first transconductance stage to (i) one of a plurality of output paths or (ii) multiple output paths of the output paths. The current combiner circuit severs the second transconductance stage from the output paths when the first transconductance stage forms a path to one of the output paths. The current combiner circuit forms a path from the second transconductance stage to the multiple output paths when the first transconductance stage forms a path to the multiple output paths. The current combiner circuit couples current from the first transconductance stage to (i) a first output path or a second output path or (ii) both the first and second output paths.

Abstract: A receiver for a wireless communication device provides a dual path receiver receiving first and second protocol-agnostic, uncorrelated receive signals simultaneously. The dual path receiver generating first and second offset IF signals from the simultaneously received first and second protocol-agnostic, uncorrelated receive signals. The receiver utilizes at least one converter for converting the first and second offset IF signals into at least one serial synchronous interface (SSI) signal representing the spectrum at IF. At least one processor receives the at least one SSI signal and applies parallel processing paths to demodulate the at least one SSI signal into separate baseband signals. The processor provides interference detection of, and level control for, the first and second offset IF signals.

Abstract: A wideband receiver for a wireless communication system and a method for controlling the same are provided. In the wideband receiver for a wireless communication system, a receive path includes a mixer for receiving a Radio Frequency (RF) signal having a frequency fSG and for converting the RF signal into an Intermediate Frequency (IF) signal having a frequency fIF by mixing the RF signal with a first local oscillation signal having a first local oscillation frequency fLO1, and at least one Phase Locked Loop (PLL) for providing the local oscillation signal to the mixer. A control block determines whether a half-IF signal having a center frequency of fSG?fIF/2 exists in the IF signal, and when the half-IF signal exists, controls the at least one PLL to generate a second local oscillation signal having a second local oscillation frequency fLO2 greater than the first local oscillation frequency fLO1.

Abstract: According to an embodiment, a frequency converting device is provided with a duty adjusting unit that generates a 1/N local signal, which is a local signal with a duty ratio of 1/N, when N is an integral number not smaller than 3 and an N-th high-frequency component included in the local signal is a target of inhibition. Further, this is provided with a mixer that outputs difference or sum between/of the 1/N local signal and an input signal.

Abstract: A system is for encoding information on a passive surface acoustic wave (SAW) device. The system includes a requesting unit configured to wirelessly transmit an impulse signal. The impulse signal is a signal that includes only a single pulse. A SAW device has an interdigital transducer (IDT) configured to physically store coded data. The SAW device is configured to receive the impulse signal. In response to receiving the impulse signal, the SAW device excites the IDT to generate a coded signal that includes the stored coded data and frequency components at a fundamental frequency.

Abstract: In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.

Abstract: A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Abstract: An information processing terminal system includes an information processing terminal (6); and a transmitting and receiving unit (5) which is attached to the information processing terminal. The transmitting and receiving unit (5) converts a reception wave signal from a network into a reception analog baseband signal. The transmitting and receiving unit (5) converts the reception analog baseband signal into a reception digital baseband signal in synchronization with a clock. The information processing terminal (6) converts the reception digital baseband signal into a reception data in synchronization with a clock, and a transmission data into a transmission digital baseband signal in synchronization with the clock. The transmitting and receiving unit (5) converts the transmission digital baseband signal into a transmission analog baseband signal in synchronization with the clock.

Abstract: A method and system is disclosed for designing a radio for down-converting RF signals to IF signals by sampling the signals in a round-robin sampling circuit and multiplying the samples by coefficients that are changed at a fixed rate equal to the rate of operation of each of the sampling circuits. The circuit is able to down-convert multiple channels simultaneously to adjacent positions in the IF band, while rejecting unwanted image signals. The method and system avoids the difficulty and cost of directly digitizing the RF signal, allowing each component to operate at a greatly reduced speed. The coefficients are selected to provide the desired transfer function while keeping the output signal centered at a desired frequency.

Abstract: Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Abstract: A sampling circuit and a receiver with which filter characteristics compatible with the reception of wideband signals can be realized with a high degree of freedom in the setting of the filter characteristics. More specifically, the sampling circuit is capable of removing adjacent interfering wave signals while keeping in-band deviation small. The sampling circuit is equipped with a discrete-time analog processing circuit group, wherein multiple discrete-time analog processing circuits are connected in parallel, a synthesizer that synthesizes the output signals from each of the circuit systems and outputs same, and a digital control unit that outputs control signals. Each of the discrete-time analog processing circuits is configured to include multiple rotate capacitor units, which each includes a main rotate capacitor and a sub-rotate capacitor, and only the main rotate capacitors share electric charge with a buffer capacitor included in the synthesizer.

Abstract: A receiver includes an oscillator for generating a local oscillator signal, a frequency converter for heterodyning a received signal of one frequency band or a plurality of frequency bands into an intermediate frequency (IF) signals with using the local oscillator signal, a filter connected to an output of the frequency converter and having a cut-off frequency changeable, an analog-digital (AD) converter connected to an output of the filter to convert an analog signal of one frequency band or a plurality of frequency bands into a digital signal, a pre-stage detector connected to an output of the AD converter or connected between the filter and the AD converter to detect a signal level, and a controller for controlling the cut-off frequency of the filter based on the signal level detected by the pre-stage detector.

Abstract: Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The receiver analog circuitry and the receiver digital circuitry are partitioned so that interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced.

Abstract: Methods and systems for impairment shifting may comprise receiving radio frequency (RF) signals in a receiver, downconverting the signals to baseband frequencies, and synchronizing the receiver to received signals. The frequency of a local oscillator (LO) may be adjusted to shift residual impairments to fall between desired baseband signals where they are least visible. The received RF signals may comprise analog, satellite, or cable, television signals. The LO frequency may be adjusted to configure the DC offset impairments to fall between luminance and chrominance harmonics. The LO frequency may be adjusted to configure I/Q imbalanced impairments from residual in-phase and quadrature mismatch of a picture carrier signal to fall about 300 kHz from a sound carrier signal in the analog television signals. The LO frequency may be adjusted to configure the I/Q imbalanced impairments from residual I/Q mismatch of a sound carrier signal to fall between luminance and chrominance harmonics.

Abstract: Systems and methods are disclosed for transmitting and receiving RF signals. An exemplary RF transceiver includes a signal generator, a frequency multiplier circuit, a receiver circuit, a transmitter circuit, and a switching device. The signal generator is configured to output a first signal and a second signal. The first signal comprises a local oscillator signal, and a frequency of the second signal is derived from a frequency of the first signal. The frequency multiplier circuit is configured to upconvert the output of the signal generator by frequency multiplication. The receiver circuit is configured to process a received signal using an upconverted first signal, and the transmitter circuit is configured to provide an upconverted second signal to a transmitter channel. The switching device is configured to provide the upconverted first signal to the receiver circuit and the upconverted second signal to the transmitter circuit.

Abstract: A filter circuit including first and second real filters of a zero-IF scheme. The first and second real filters receive an I component and a Q component separated from a reception signal, respectively; and a switch section for producing a complex filter by switchably connecting the first and second real filters through interconnection elements. The switch section further receiving a switching signal for connecting the first and second real filters, thereby switching from the zero-IF scheme to a low-IF scheme.

Abstract: Frequency translation and applications of same are described herein. Such applications include, but are not limited to, frequency down-conversion, frequency up-conversion, enhanced signal reception, unified down-conversion and filtering, and combinations and applications of same.

Abstract: Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.

Abstract: A current-mode wireless receiver includes a pre-processor to receive a voltage-mode input signal and output a current-mode pre-processed signal corresponding to the voltage-mode input signal, a mixer to perform frequency down-conversion upon the current-mode pre-processed signal to generate a current-mode frequency down-converted signal, and an amplifier to amplify the current-mode frequency down-converted signal to generate a current-mode output signal. A method of wireless reception is also disclosed.

Abstract: In an embodiment, a method and apparatus for downconverting a received RF signal in a wireless device where differential signals from an off-chip matching network may be input to a CGCS input stage of a mixer, which downconverts the signals to baseband or some intermediate frequency. The input stage includes a pair of NMOS transistors in a common-gate configuration and a pair of PMOS transistors in a common-source configuration. A potential advantage of the CGCS input stage over the existing CGO transconductance stage configuration is that by adding a common-source stage through the PMOS differential-pair, the transconductance gain is decoupled from the high Q matching network.

Abstract: Wireless communication is ubiquitous today and deployments are growing rapidly leading to increased interference, increasing conflicts, etc. As a result monitoring the wireless environment is increasingly important for regulators, service providers, Government agencies, enterprises etc. Such monitoring should be flexible in terms of the networks being monitored within the wireless environment but should also provide real-time monitoring to detect unauthorized transmitters, provide dynamic network management, etc. Accordingly, based upon embodiments of the invention, a broadband, real-time signal analyzer (RTSA) circuit that allows for the deployment of RTSA devices in a distributed environment wherein determination of policy breaches, network performance, regulatory compliance, etc. are locally determined and exploited directly in network management or communicated to the central server and network administrators for subsequent action.

Abstract: A device for double frequency transposition includes means for controlling the frequencies FOL1, FOL2 of a first and a second synthesizer, which are adapted to carry out the steps of (a) initializing the frequency FOL2 at a first given value FOL2,A; and (b) for a given pair of frequencies FRF, FFI2, determining the frequency FOL1 with the aid of the following relations: if FRF>FOL1 and FFI1<FOL2, FRF=FOL1+FOL2?FFI2??(5), if FRF>FOL1 and FFI1>FOL2, FRF=FOL1+FOL2+FFI2??(6), if FRF<FOL1 and FFI1>FOL2, FRF=FOL1?FOL2?FFI2??(7), if FRF<FOL1 and FFI1<FOL2, FRF=FOL1?FOL2+FFI2??(8); and (c) if the value obtained for FOL1 lies in a frequency band of lower bound A·FREF?B·X and upper bound A·FREF+B·X, where A is a strictly positive integer and X is a given parameter, modifying the frequency FOL2 to a second value FOL2,B determined so that the difference in absolute value between FOL2,A and FOL2,B satisfies the following two conditions: |FOL2,B?FOL2,A|>AFREF+2B·X |FOL2,B?FOL2,A|<AFREF

Abstract: The present invention discloses a signal polarization method, apparatus and system, and relates to the field of cellular network technologies. At the time of adjusting a polarization manner of a signal, an antenna does not need to be replaced, and a physical installation posture of the antenna does not need to be adjusted manually either. Therefore, a manual requirement and an operation cost are reduced, a workload, work risk and time are reduced, and a normal operation of a service of a cell is ensured. The signal polarization method provided in the embodiments of the present invention includes: receiving physical channel signals sent by a base transceiver station; determining a polarization manner of each physical channel signal; and polarizing, by adjusting at least one of an amplitude and a phase of each physical channel signal, the physical channel signals according to the polarization manner.

Abstract: GPS functionality is added to a wireless communication device in an efficient and cost effective manner. Disclosed is a wireless communications device that has a common mixer constructed to be used for a GPS signal and another signal, a common IF filter constructed to be used for a GPS signal and another signal, in addition to other cost effective embodiments.

Abstract: In an apparatus and method, time-varying signals are processed and encoded via a frequency domain linear prediction (FDLP) scheme to arrive at an all-pole model. Residual signals resulted from the scheme are estimated and transformed into a time domain signal. Through the process of heterodyning, the time domain signal is frequency shifted toward the baseband level as a downshifted carrier signal. Quantized values of the all-pole model and the frequency transform of the downshifted carrier signal are packetized as encoded signals suitable for transmission or storage. To reconstruct the time-varying signals, the encoded signals are decoded. The decoding process is basically the reverse of the encoding process.

Abstract: A single-phase down-converter includes a mixer and a local oscillator (LO) signal generator. The mixer is arranged to generate a mixer output signal by mixing a radio frequency (RF) signal and an LO signal. The LO signal generator is coupled to the mixer, and arranged to generate the LO signal with a frequency shifted from an RF carrier frequency by a specific intermediate frequency, wherein when image interference exists, the specific intermediate frequency makes the image interference translated to guard band(s) of channel(s).

Abstract: Provided are a direct sampling circuit and a receiver using a discrete time analog process and having a filter effect of a steep attenuation characteristic in a narrow-pass band without lowering a sampling rate. In a discrete time direct sampling circuit (13), the positive phase side and the inverse phase side are both sampled by a local signal for a differential current output of a differential voltage/current conversion unit (1011) and electric charge is accumulated in a charge sampling capacitor. The latest accumulated charge at the positive phase side and charge accumulated at the inverse phase side before a predetermined number of samples are combined with the charge accumulated in a history capacitor (1043) in the past. Thus, it is possible to realize equivalently high-degree FIR filter characteristic.

Abstract: Systems and methods for implementing an up-conversion mixer with signal processing are disclosed.

Abstract: A double frequency-conversion receiving circuit used for a radio-frequency SIM card, including a low-noise amplifier (01), a high-medium-frequency mixer (02), a low-medium-frequency mixer (03), a local oscillator (04), a quadrature I/Q circuit (05), and a low-medium-frequency processing circuit (07), characterized in that it also includes a frequency divider (06) that performs N frequency dividing to a high-local-oscillation signal generated by the local oscillator (04), wherein the divided low-local-oscillation signal is inputted into the quadrature I/Q circuit (05), the outputted I/Q local-oscillation signal is inputted into the low-medium-frequency mixer (03) to obtain, after mixing, a low-medium-frequency signal, and the low-medium-frequency signal is further processed by the low-medium-frequency processing circuit (07) to output the signal needed, which has gone through the double frequency-conversion.

Abstract: Systems and methods for implementing a down-conversion mixer with signal processing are disclosed.

Abstract: The disclosure is directed to a mobile communication device that includes automatic gain control (AGC) circuitry and operates in either a tracking mode or an acquisition mode. A received signal is sampled n times to calculate an energy estimate that is used to set the gain control values within the AGC circuitry. The value of n varies depending on whether the handset is operating in the acquisition mode or the tracking mode. Acquisition mode is typically considered to be the mode prior to coarse timing acquisition, also referred to as frame acquisition.

Abstract: A down-conversion frequency mixer includes: a radio frequency (RF) input unit disposed between a VDD line and a GND line and configured to receive an RF signal; an LO input unit configured to receive a carrier frequency (LO) from an internal frequency synthesizer; an intermediate frequency (IF) output unit disposed in parallel to the RF input unit between the VDD line and the GND line and configured to mix the RF signal with the LO signal and output an IF signal; a current generation unit configured to generate a stabilized current without being influenced with noise entered through the VDD line and the GND line; and a noise blocking unit disposed between the VDD line and the RF input unit, between the VDD line and the IF output unit, between the GND line and the RF input unit, and between the GND line and the LO input unit and configured to copy the current generated from the current generator and generate a stabilized current.

Abstract: A communication device according to the present invention which receives a reception signal, includes: an intermodulation oscillator that outputs a signal of a first frequency; an adding section that adds together the reception signal and the signal of the first frequency; an intermodulation wave generating section that generates an intermodulation wave signal from the reception signal and the signal of the first frequency that are added together; a local oscillator that outputs a local signal; a mixer that generates an intermediate frequency signal by mixing the local signal into the intermodulation wave signal; a bandpass filter that extracts a signal of a desired frequency from the intermediate frequency signal; a voltage level detection section that detects a voltage level of a desired signal; and a control section that causes the intermodulation oscillator to output the signal of the first frequency when the voltage level of the desired signal is greater than a saturation level of the receiving section,

Abstract: A low-noise block converter comprises a low-noise amplifier, a local oscillator, a mixer, an IF-amplifier and a regulator. The low-noise amplifier amplifies a high-band received signal. The local oscillator generates a local-frequency signal. The mixer transforms the high-band received signal into an intermediate-frequency signal by mixing the high-band received signal with the generated local-frequency signal. The IF-amplifier amplifies the intermediate-frequency signal. The regulator is connected to the IF-amplifier to provide a steady current (or voltage) to the local oscillator, the mixer and the low-noise amplifier.

Abstract: There are provided a sampling mixer, quadrature demodulator, and a wireless device capable of suppressing receiving sensitivity degradation caused by alias components or second-order distortion components. In the sampling mixer (101), a sampling switch (5) and another sampling switch (36) sample a reception signal based on a local signal with a predetermined frequency. A control signal generator (15) generates a control signal for controlling a filter operation. An in-phase mixer (2) and a reverse-phase mixer (3) perform, based on the control signal, filter processing on the sample signal obtained by the sampling switch (5). A delay controller (117) controls the phase difference between the local signal and the control signal according to a reception-desired frequency.

Abstract: Methods, systems, and apparatuses, and combinations and sub-combinations thereof, for down-converting an electromagnetic (EM) signal are described herein. Briefly stated, in embodiments the invention operates by receiving an EM signal and recursively operating on approximate half cycles (½, 1½, 2½, etc.) of the carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: An amplifying circuit includes a pair of MOS transistors; an amplifier that amplify a difference between potentials of differential output nodes coupled to drains of the pair of MOS transistors; cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current; and a controller that performs setting so that a potential of first one of the differential input signals is equal to a potential of another one of the differential input signals, that compares, before the inflow of the cancel current, potentials generated at differential output nodes when the difference between potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current.

Abstract: This invention is primarily a circuit structure of self-mixing receiver, and the methodology of circuit structure is described as follows. The first stage is a high input impedance voltage amplifier utilized to amplify the received RF carrier signal from the antenna. Besides, there are no any inductors required. The second stage is a multi-stage amplifier to amplify the output signal of first stage to rail-to-rail level, which is quite the same with supply voltage. The third stage is a mixer adopted to lower the signal frequency. The fourth stage is a digital output converter, which is proposed to demodulate the electric signals and convert the demodulated signal to digital signal.

Abstract: A difference between an output current signal (mos) of the mixing circuit (MC) and a current from a controlled current source (CCS) is conducted to an input of an operational amplifier (A). A control voltage (cv) for said current source is a voltage at the output of the operational amplifier (A) being filtered by a low-pass filter, whose limiting frequency equals a low frequency limit of the modulation signal in the received signal (rs). The method is speeded up in that the limiting frequency of the low-pass filter is increased by two to three orders of magnitude at the beginning and is gradually lowered to said value. A rather short time duration of the transient process is achieved so that the working point with a low voltage of the DC component and low-frequency components is set at least five times faster than so far.

Abstract: A signal receiving device is provided which can prevent the imbalance occurring between in-phase and quadrature signals. A polarity of a local oscillator output signal to be outputted from a local oscillator 13 is switched by a polarity switching unit 14 in a time division way. Each of signals outputted from the polarity switching unit 14 is frequency divided by a frequency divider 16. The frequency-divided local oscillation signal is supplied to a mixer 34. Frequency conversion of a receiving signal is performed by the mixer 34 which receives the signal and local oscillation signal to demodulate received data.

Abstract: Systems for dynamic reallocation of bandwidth and modulation protocols is provided. In one embodiment, a radio head interface module comprises: a transmit buffer adapted to receive a data stream from a signal processing module and store the data stream as a page of data samples having a page header; a transmit engine; a digital upconverter, the transmit engine adapted to transfer the page of data samples from the transmit buffer to the digital upconverter; a configuration management unit adapted to receive reconfiguration information from the signal processing module, the reconfiguration information including at least one of air interface protocol parameters and bandwidth allocation information; and a memory adapted with digital upconverter parameters. The configuration management unit is accesses the memory to lookup associated digital upconverter parameters based on the reconfiguration information.