Abstract: Embodiments of a radio frequency (RF) circuit provide translational filtering in accordance with an input impedance response that is an impedance image of a reactive circuit impedance response from a polyphase reactive circuit. The RF circuit may include a first mixer circuit that provides a first frequency offset for the impedance image and a second mixer circuit that provides an additional frequency offset. Accordingly, the second mixer circuit may allow for adjustments to a total frequency offset of the impedance image. The second mixer circuit may also be configured so that the impedance image rejects a negative frequency impedance response of the reactive circuit impedance response.

Abstract: Systems and methodologies are described that facilitate calibration techniques for a station in a wireless communication system that can be utilized to provide joint estimates for distortion introduced by in-phase and quadrature (I/Q) imbalance and mixing-product modulated images.

Abstract: A MIMO transceiver integrated circuit (IC) includes a plurality of multiple band direct conversion transmitter sections, a plurality of multiple band direct conversion receiver sections, and a local oscillation generation module. Each of the plurality of multiple band direct conversion transmitter sections includes a transmit baseband module and a multiple frequency band transmission module. Each of the plurality of multiple band direct conversion receiver sections includes a multiple frequency band reception module and a receiver baseband module. The local oscillation generation module is operably coupled to generate the first frequency band local oscillation when the multiple band MIMO transceiver IC is in a first mode and operably coupled to generate the second frequency band local oscillation when the multiple band MIMO transceiver IC is in a second mode.

Abstract: An RF signal receiving apparatus includes a first poly-phase filter, a second poly-phase filter, a first frequency-mixer module, a switch and a low-pass filter module. The first poly-phase filter receives an RF input signal and produces a filtered RF signal according to the received RF input signal. The first frequency-mixer module conducts frequency-mixing operation on a reduced-frequency signal and the filtered RF signal to produce a plurality of reduced-frequency RF signals. The switch receives and transmits the reduced-frequency RF input signal to a first channel or a second channel according to a selection signal. The second poly-phase filter receives the reduced-frequency RF signal transmitted by the second channel and filters the received signal.

Abstract: In a receiver, a synchronization circuit (MIX2, C1, R1, VCO) provides a set of oscillator signals (OSI, OSQ, OSX, OSY) that are synchronized with a carrier of an amplitude-modulated signal. The set of oscillator signals (OSI, OSQ, OSX, OSY) comprises a first amplitude-demodulation oscillator signal (OSX) and a second amplitude-demodulation oscillator signal (OSY) that differ in phase. A first amplitude-demodulation mixer (MIX3) mixes the first amplitude-demodulation oscillator signal (OSX) with the amplitude-modulated signal so as to obtain a first amplitude-demodulated signal (MO3). A second amplitude-demodulation mixer (MIX4) mixes the second amplitude-demodulation oscillator signal (OSY) with the amplitude-modulated signal so as to obtain a second amplitude-demodulated signal (MO4). A magnitude comparator (MDT1, MDT2, DDT) compares respective magnitudes (M+, M?) of the first amplitude-demodulated signal (MO3) and the second amplitude-demodulated signal.

Abstract: Embodiments of the present invention provide systems, devices and methods for modeling and correcting amplitude and quadrature phase errors generated within analog components of a receiver. A frequency-dependent correction method is employed that closely tracks the frequency dependent nature of the mismatch between the I and Q polyphase filter responses. In particular, digital correction is performed on a signal based on a modeled error function generated during a calibration of the receiver.

Abstract: According to one embodiment, a radio frequency receiver comprises a quadrature mixer configured to convert radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer comprises an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer comprises a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a plurality of quadrature pulsed clock signals and delayed versions of the quadrature pulsed clock signals. The quadrature pulsed clock signals and the delayed versions of the quadrature pulsed clock signals drive the mixer input switch transistors and the output switch transistors.

Abstract: A sampling circuit and a receiver with which filter characteristics compatible with the reception of wideband signals can be realized with a high degree of freedom in the setting of the filter characteristics. More specifically, the sampling circuit is capable of removing adjacent interfering wave signals while keeping in-band deviation small. The sampling circuit is equipped with a discrete-time analog processing circuit group, wherein multiple discrete-time analog processing circuits are connected in parallel, a synthesizer that synthesizes the output signals from each of the circuit systems and outputs same, and a digital control unit that outputs control signals. Each of the discrete-time analog processing circuits is configured to include multiple rotate capacitor units, which each includes a main rotate capacitor and a sub-rotate capacitor, and only the main rotate capacitors share electric charge with a buffer capacitor included in the synthesizer.

Abstract: In the receive subsystem, the analogue-to-digital converter (40) works on the output of the low-noise amplifier (33), at a chosen rate (F), which corresponds to a bandwidth sampling. The processing stages comprise a custom circuit (5), with * an input memory (510) arranged to contain N successive digital samples, renewed at the chosen rate in blocks of M samples, * a complex digital low-pass filtering function (511, 512), of chosen cut-off frequency, operating on the input memory to supply N filtered digital samples (515), * an M-periodic summing function (531) on the N filtered digital samples, supplying M filtered and summed digital samples (533), * an M?M discrete Fourier transform stage (55), operating on these M filtered and summed digital samples, the digital signals on the M outputs (559) of the Fourier transform representing M separate channels, of width defined by the cut-off frequency of the abovementioned low-pass filter.

Abstract: A communication device includes: demodulating means for demodulating a transmission signal from another communication device that performs noncontact communication; calculating means for performing at least one of addition and subtraction of a predetermined voltage according to a logical value of a demodulated signal obtained by demodulation by the demodulating means; determining means for determining a communication system of the transmission signal transmitted by the other communication device by comparing a calculation result of the calculating means at predetermined timing after a lapse of a predetermined time from the start of communication with a threshold voltage; and transmitting means for transmitting predetermined data to the other communication device in the communication system determined by the determining means among plural communication systems that the device itself can support.

Abstract: A frequency multiplier device comprises a first signal combiner having a first port for receiving a first input signal having a first frequency f1 and a second port for receiving a second input signal having a second frequency f2, the first signal combiner configured to provide an output signal having either a sum of the first frequency and second frequency or a difference of the first frequency and second frequency; and a frequency divider having a dividing ratio N, the frequency divider configured to output a divided signal, wherein the output signal from the first signal combiner is coupled to the frequency divider, the divided signal from the frequency divider is coupled to the second port of the first signal combiner, and the output signal from the first signal combiner has a frequency of (N/(N±1))×f1.

Abstract: A multiple band direct conversion radio frequency (RF) transceiver integrated circuit (IC) includes a multiple band direct conversion transmitter section, a multiple band direct conversion receiver section, and a local oscillation module. The multiple band direct conversion transmitter section includes a transmit baseband module and a multiple frequency band transmission module. The multiple band direct conversion receiver section includes a multiple frequency band reception module and a receiver baseband module. The local oscillation generation module is coupled to generate a first frequency band local oscillation when the multiple band direct conversion RF transceiver IC is in the first mode and coupled to generate a second frequency band local oscillation when the multiple band direct conversion RF transceiver IC is in the second mode.

Abstract: A method of detecting an on-channel signal and synchronizing signal detection with correcting for DC offset errors in a direct conversion receiver is presented. A received signal is digitized, and a state machine operates to detect the presence of an on-channel signal. If the signal is not detected, a mixed mode training sequence is initiated in which the DC offset errors in both an analog and digital received signal path are corrected. While training, processing of the digitized samples by a digital signal processor and a host controller is suspended (while they are put into battery save mode) and the gain provided to subsequently received signals is minimized. The DC offset correction circuitry is bypassed and put into battery save mode at predetermined periods when DC offset correction is not performed.

Abstract: A wireless communication unit (200) comprises a radio frequency (RF) receiver for receiving an RF signal and providing the received RF signal to an off-channel signal detector (218) and a quadrature down conversion mixer circuit comprising at least one dynamic matching mixer stage (226, 228, 250, 252). The off-channel signal detector (218) is arranged to detect whether an off-channel signal level of the received RF signal exceeds a threshold and, in response to determining that the received off-channel RF signal exceeds the threshold, the off-channel signal detector (218) deactivates the at least one dynamic matching mixer stage. Also described is a semiconductor that comprises a receiver, and a method of operation therefor.

Abstract: A receiver estimates I/Q imbalance in I and Q input signals using circuitry to separate different frequency components of the I and Q input signals, and estimation circuitry arranged to estimate I/Q imbalance at the different frequency bands. The separating of the bands may be carried out in the frequency domain, and may involve combining corresponding values representing corresponding negative and positive frequency bands, and converting the separated frequency domain representations to a time domain representation before the estimation. The estimated imbalance may be used to correct the I and Q signals at the different frequency bands.

Abstract: In the reception and demodulation of a communication signal with frequency hopping among a plurality of frequency bands, a demodulator is formed by a balance circuit. The demodulator performs frequency conversion by multiplying signals in_a and in_b, which are obtained by converting a received signal into differential signals, by local signals Lo—1a and Lo—1b with a frequency corresponding to a frequency band of the received signal, which are frequency-switched during a guard interval period of the received signal, in synchronization with a symbol of the received signal. Further, two output ends of the demodulator are charged/discharged through capacitors in synchronization with frequency switching of the local signal so that a voltage difference between the two output ends of the demodulator becomes a prescribed level.

Abstract: Receiver architectures and related methods are disclosed for high definition (HD) and digital radio FM broadcast receivers. The radio receiver architectures are configured to utilize multiple analog-to-digital converters (ADCs) to handle the digital radio spectrum and can be configured to modify a target IF frequencies depending upon the mode of operation of the receiver. For example, the receiver can include an analog FM reception mode and a digital FM reception mode for which different down-conversions are used for the same analog-plus-digital audio broadcast channel. If desired, the radio broadcast receivers disclosed can be configured so that they only receive digital FM radio content, for example, if the analog FM broadcast was of no interest and/or if the broadcast was all digital.

Abstract: A wireless receiver is provided that includes a multi-step gain-control low-noise amplifier (LNA) stage and a mixer stage. The LNA stage is operable to amplify at least one input signal to generate at least one LNA output. The mixer stage is directly coupled to the LNA stage (without an intervening external bandpass filter) and is operable to down-convert the LNA output to generate a mixer output.

Abstract: Disclosed is a binary signal modulator for minimizing deterioration of receiving performance caused by phase error. The binary signal modulator receives binary signals, and converts the binary signals into complex symbols according to a predetermined mapping relation. Here, the mapping relation is generated when a plurality of mapping symbols are arranged on a plurality of trajectories so that the distance between the mapping symbols is greater than or equal to a predetermined distance and the phase between the mapping symbols is greater than or equal to a predetermined angle from among the trajectories starting from a plurality of points on the complex plane, and a distance between the trajectories is greater than or equal to the minimum distance from among the distances between the points.

Abstract: A method of domain selection for routing control, applied to a communication system including a Circuit Switched (CS) network and an IP Multimedia Subsystem (IMS) includes: obtaining call status(es) of a user in any one or both of the CS network and the IMS; selecting a domain via which an incoming call is to be delivered according to the call status(es) upon receiving a routing decision query request from a routing decision query entity, and indicating the routing decision query entity to deliver the incoming call via the CS network or the IMS selected. The method provided by embodiments of the present invention selects the domain according to the call status(es) of the user in any one or both of the CS network and the IMS. Therefore, the problem that two calls are respectively delivered via the CS network and the IMS at the same time may be avoided.

Abstract: A programmable transmitter generates a frame preamble to train a receiver with respect to a communication link format that corresponds to a transmission mode wherein the transmission mode may comprise transmitting the communication link over one or more antennas. Generally, the invention includes generating a preamble with an arrangement that depends upon whether a Greenfield (high data rate) or mixed mode transmission is to occur and that depends upon a number of spatial streams that are to be generated. One format for high data rate transmission includes a short training sequence, a long training sequence and a signal field. The mixed mode transmission further includes a legacy prefix.

Abstract: A direct conversion radio frequency (RF) tuner includes a mixer generating I and Q quadrature components. A phase detection circuit generates a phase error measurement between the I quadrature component and the Q quadrature component. A phase correction circuit corrects a phase of the Q component based on the phase error measurement, and outputs a phase-corrected Q quadrature component. An I quadrature component gain control circuit receives the I quadrature component and outputting an amplitude corrected I quadrature component. A Q quadrature component gain control circuit receives the phase corrected Q quadrature component and outputs an amplitude corrected Q quadrature component.

Abstract: A receiver arrangement includes a single ended multiband feedback amplifier, at least one single ended input, differential output mixer arrangement including a main mixer and a trim mixer, and a mixer feedback loop circuit configured to receive differential output signals generated by the mixer arrangement. The mixer feedback loop circuit generates a feedback signal based on the received differential output signals and provides the feedback signal to the mixer arrangement to minimize DC-offset and second order intermodulation products. The single ended multiband feedback amplifier may include an input stage and a programmable resonance tank circuit connected to the input stage for suppressing downconverted noise from harmonics of the LO-frequency, and a configurable feedback net that shapes the frequency response of a feedback loop including the feedback net based on a band operation of the single ended multiband feedback amplifier.

Abstract: A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.

Abstract: A multiple frequency band hybrid receiver includes a plurality of input terminals to which different frequency band signals are respectively inputted; a plurality of mixers connected to the plurality of input terminals sequentially, receiving the different frequency band signals respectively, and down-converting frequencies of the received frequency band signals to predetermined frequencies; an output terminal outputting baseband signals. Each mixer receives a signal from an input terminal connected thereto or another mixer. One of the plurality of mixers receives the lowest frequency band signal, converts a frequency of the received signal to a baseband frequency, and provides a signal having the baseband frequency to the output terminal. The other mixers each down-convert a frequency of a received signal to a frequency band of a signal which is inputted into another mixer.

Abstract: There is provided a method that comprises identifying a parasitic signal transfer in a filter using a signal-directed graph; and adding compensation paths to the filter to reduce or eliminate the effect of the parasitic signal transfer A corresponding filter is provided which comprises a plurality of amplifier stages that generate one or more filter poles; at least one component coupled to at least one of the amplifier stages, the component causing a parasitic effect in the filter; and means for applying a compensation current to the at least one amplifier stage to reduce or eliminate the parasitic effect.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: A disdosed method tunes a signal from a channelized spectrum having a predetermined channel spacing. A signal of interest having a predetermined maximum bandwidth is mixed with a local oscillator signal, which has a frequency that is an integer multiple of the channel spacing or one-half of a channel spacing displaced from an integer multiple of the channel spacing. The local oscillator signal is selected to frequency translate the signal of interest to within a near-baseband passband whose lower edge is spaced from DC by at least about the maximum bandwidth of the signal of interest. Problems associated with 1/f noise, DC offsets, and self-mixing products are avoided or substantially diminished. Other methods and systems are also disclosed.

Abstract: A multiantenna receiving device is provided to make it possible to cope with both improvement in error rate characteristic and simplification in structure.

Abstract: Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

Abstract: A digital direct conversion receiving apparatus, including: a phase conversion unit to down-convert a Radio Frequency (RF) signal into a plurality of sample signals, and generate a certain phase difference among the plurality of sample signals when the RF signal is down-converted; and a variable complex gain unit to remove an image component from the plurality of sample signals using the generated phase difference.

Abstract: A mixer and calibration method thereof are provided. A direct conversion receiver comprises a differential loading pair utilizing at least one binary weighted resistor. The binary weighted resistor is adjustable to provide a resistance linear to a digital code, comprising a fixed resistor and an adjustable resistor cascaded to the fixed resistor in parallel. Every increment of the digital code induces an equal increment of the resistance. The magnitude of every incremental resistance is below a negligible ratio of the fixed resistor.

Abstract: A radio front end utilizes at least one band pass filter to pass only the appropriate frequency band. Once the desired frequency band has been isolated it is converted to a digital format in an analog to digital converter and a digital signal processing device interprets the signal.

Abstract: A radio communication apparatus using a direct conversion method capable of receiving a radio signal having a predetermined frequency band. The radio communication apparatus includes: a low-noise amplifier section including one or a plurality of low-noise amplifiers receiving input of a receiving signal having a predetermined frequency band; and a mixer section including in-phase and quadrature mixers demodulating an output of the low-noise amplifier into in-phase-component and quadrature-component signals, respectively, wherein the mixer section includes a capacitor in an input section, separates the in-phase component and the quadrature component by the capacitor, and supplies the components to the corresponding in-phase and quadrature mixers, respectively.

Abstract: A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.

Abstract: A programmable transmitter generates a frame preamble to train a receiver with respect to a communication link format that corresponds to a transmission mode wherein the transmission mode may comprise transmitting the communication link over one or more antennas. Generally, the invention includes generating a preamble with an arrangement that depends upon whether a Greenfield (high data rate) or mixed mode transmission is to occur and that depends upon a number of spatial streams that are to be generated. One format for high data rate transmission includes a short training sequence, a long training sequence and a signal field. The mixed mode transmission further includes a legacy prefix.

Abstract: A direct sampling tuner includes a low noise amplifier and an optional dynamically configurable band pass filter coupled to the low noise amplifier. The optional filter is configured to pass a selected band of channels. The tuner further includes a relatively high accuracy, multi-bit analog-to-digital converter (“ADC”) coupled to the LNA or to the optional dynamically configurable band pass filter. The ADC operates at greater than about twice a frequency of a sampled signal. The ADC directly samples the spectrum of the selected channels at the Nyquist rate, thus avoiding image problems presented by conventional tuners.

Abstract: Certain embodiments for an analog zero-IF interface for GSM receivers, where a receiver may receive RF signals and downconvert the RF signal to a VLIF signal in the analog domain. The VLIF signal may be further downconverted to a baseband signal in the analog domain. The baseband signal may be an analog signal. Aspects of the invention may comprise amplifying the received RF signal, mixing the amplified RF signal down to a VLIF signal, filtering the VLIF signal, amplifying the VLIF signal, mixing the filtered VLIF signal to a baseband signal, and filtering the baseband signal. The local oscillator signal to the mixer that may downconvert the RF signal to a VLIF signal may be an output of a programmable local oscillator, and may be one of a plurality of frequencies. The mixer that generates the baseband signal may be a harmonic-reject mixer.

Abstract: There are provided a direct sampling type wireless receiver and a method using the same that reduce nonlinearity and DC offset by using a multi-port network and a carrier frequency direct conversion method with a low sampling rate of a direct sampling method in a wireless communication receiver.

Abstract: Receiver architectures and related methods are disclosed for high definition (HD) and digital radio FM broadcast receivers. The radio receiver architectures are configured to utilize multiple analog-to-digital converters (ADCs) to handle the digital radio spectrum and can be configured to modify a target IF frequencies depending upon the mode of operation of the receiver. For example, the receiver can include an analog FM reception mode and a digital FM reception mode for which different down-conversions are used for the same analog-plus-digital audio broadcast channel. If desired, the radio broadcast receivers disclosed can be configured so that they only receive digital FM radio content, for example, if the analog FM broadcast was of no interest and/or if the broadcast was all digital.

Abstract: A passive, differential RF mixer reduces second order intermodulation interference while maintaining I/Q isolation via common mode feedback wherein the I and Q error signals in the feedback path are time multiplexing using a four-phase LO signal. An RF signal is received at a differential input having a center tap. The RF signal is mixed with an in-phase differential signal of the four-phase local oscillator signal in a differential mixer (I mixer). The RF signal is also mixed with a quadrature-phase differential signal Q components of the four-phase local oscillator signal in a differential mixer (Q mixer). The common mode levels of the I and Q differential mixer outputs are compared to a reference DC voltage to generate I and Q error signals. The I and Q error signals are time-multiplexed, and fed back to the RF input center tap.

Abstract: In the wireless communication base station sharing apparatus, a first signal combiner/distributor is connected to a main system duplexer through a first port, distributes a signal received through the first port to second and third ports, combines the signals received through the second and third ports according to the phases of the signals, and provides the combined signal through the first port or a fourth port. A second signal combiner/distributor is connected to a subsystem duplexer through a fifth port and the antenna through an eighth port, distributes a signal received through the fifth port to sixth and seventh ports, combines the signals received through the sixth and seventh ports according to the phases of the signals, and provides the combined signal through the fifth or eighth port. Variable filters are provided in signal paths between the first and second signal combiner/distributors.

Abstract: The present invention discloses a circuit for settling DC offset and controlling RC time-constant in a direct conversion receiver. The circuit includes a variable resistive unit for providing a continuously or non-continuously variable resistance in the direct conversion receiver. The variable resistive unit can provide the variable resistance by utilizing a controllable transistor or a plurality of resistors. Accordingly, the variable resistive unit can be coupled to a capacitor for constituting a high pass filter, which is capable of rapidly settling DC offset in a direct conversion receiver.

Abstract: A hybrid structure circuit for the cancellation of both Type-I and Type-II DC offsets. It comprises a static compensator in conjunction with a servo-loop feedback amplifier to suppress the undesired DC components present along the path of the base band after the direct conversion mixer. Two mixers are used to down convert a received RF signal directly to a base band signal with two components: in-phase and quadrature-phase. Both in-phase and quadrature-phase branches employ the same circuitry for DC offset cancellation. Miller effect is also utilized in the structure in order to implement the circuit on-chip.

Abstract: The mixed signal chip (10) takes analogue signals received at, for example, a mobile telephone and converts them to the digital domain for subsequent processing. Through use of sample rate adaption and adjustable filtering, the mixed signal chip can work on radio signals formatted according to different standards.

Abstract: To detect phase mismatches between in-phase and quadrature signals of a quadrature demodulator. The phase mismatches can be detected using the signals obtained by removing high frequency components of output of a multiplier by a low pass filter, the output being the product of the in-phase signals of which low frequency components are removed by a first high pass filter by the quadrature signals of which low frequency components are removed by a second high pass filter.

Abstract: A direct conversion multi-band TV tuner includes: a plurality of RF (radio frequency) paths for processing the RF signal and for generating a plurality of processed RF signals, respectively; and a TSC (tri-state chopper) based quadrature frequency converter for receiving one of said processed RF signals and converting the received processed RF signal into a in-phase baseband signal and a quadrature baseband signals; wherein the TSC based quadrature frequency converter operates in accordance with a first set of periodic three-state control signals and a second set of periodic three-state control signals that are approximately 90 degrees offset from the first set of periodic three-state control signals.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: A method and apparatus are provided for providing improved radio frequency (RF) receiver signal correction. For RF receiver circuitry (106) having receive path and a warmup period associated therewith and including at least one analog baseband gain control stage (218) having a gain associated therewith, the method includes the step of performing a DC correction calculation operation during the warmup period to derive a DC correction value having a first component and a second component for each of the at least one gain control stage (218). The DC correction calculation step includes the steps of performing a first closed loop correction (460) of a baseband path to derive the first component of the DC correction value and performing a second closed loop correction (462) of the receive path as a function of the (218) gain during the warmup period to derive the second component of the DC correction value.

Abstract: In an embodiment, a submillimeter wave heterodyne receiver includes a finline ortho-mode transducer comprising thin tapered metallic fins deposited on a thin dielectric substrate to separate a vertically polarized electromagnetic mode from a horizontally polarized electromagnetic mode. Other embodiments are described and claimed.