Abstract: An apparatus is disclosed for measuring, calculating, recording and monitoring significant system parameters for a local communication network of the type used in industrial automation applications. The apparatus is disclosed in the context of a network employing the DeviceNet protocol.

Abstract: A process and system for quality assurance. The process includes developing a high level quality assurance resource estimate and a high level quality assurance time estimate; producing a business analysis outline; and creating an acceptance test plan using an acceptance test plan template with the business analysis outline. The process further includes creating a plurality of test cases to be carried out during a test execution phase of the quality assurance process using the acceptance test plan; refining the high level quality assurance resource estimate and the high level quality assurance time estimate based on the acceptance test plan; executing each of the test cases in an acceptance test to produce a set of test results for each of the test cases; and evaluating the test results against the refined high level quality assurance resource estimate and the refined high level quality assurance time estimate.

Abstract: A method for determining the measure of control provided to a process by a control system. The determines process model parameters for a simple and complex model of the process and uses those parameters along with the value of the process variable and the final control element position to predict the off control data. The method also uses the process model parameters to determine the optimal tuning and then forecasts the optimal process performance from the predicted off control data and the determined optimal tuning.

Abstract: A method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. Any “bad” IC devices are discarded while remaining IC devices continue on to back-end testing.

Abstract: A defect examination apparatus detects defect locations for a plurality of to-be-inspected objects vertically and horizontally arranged according to a prescribed rule. A blob analysis section finds location coordinates for the plurality of to-be-inspected objects. Based on location coordinates found by this blob analysis section, a rotation angle calculation section finds a rotation angle for a horizontal series of the to-be-inspected objects against a horizontal line. The rotation angle calculation section also finds a rotation angle for a vertical series of the to-be-inspected objects against a vertical line. A pitch size calculation section finds vertical and horizontal pitch sizes for the plurality of to-be-inspected objects. A matrix number analysis section finds a matrix number for each to-be-inspected object based on a rotation angle found by the rotation angle calculation section and a pitch size found by the pitch size calculation section.

Abstract: A waveform generating apparatus capable of outputting a desired waveform is provided. Among delay data is selected a set pulse generating delay data depending on test logical data and waveform mode information. The delay data, a skew adjusting delay data, and a fraction data in each test cycle are computed to obtain an integer delay data and a fraction delay data, which are supplied to a counter delay circuit. From the counter delay circuit are outputted a set pulse generating effective flag for delaying a test period timing by a delay time corresponding to the integer delay data, and a fraction delay data related thereto. The effective flag is delayed based on the related fraction delay data to obtain a set pulse. Similarly with the set pulse, a reset pulse is obtained, thereby to set/reset an S-R flip-flop to output a desired waveform.

Abstract: Disclosed are methods and apparatus for determining whether to perform burn-in on a semiconductor product, such as a product wafer or product wafer lot. In general terms, test structures on the semiconductor product are inspected to extract yield information, such as defect densities. Since this yield information is related to the early or extrinsic instantaneous failure rate, one may then determine the instantaneous extrinsic failure rate for one or more failure mechanisms, such as electromigration, gate oxide breakdown, or hot carrier injection, based on this yield information. It is then determined whether to perform burn-in on the semiconductor product based on the determined instantaneous failure rate.

Abstract: A recording unit is incorporated into an electronic device to record an extent to which the electronic device is operated. In one embodiment, the recording unit is a code structure installed in a memory of the electronic device. The extent to which the electronic device has been operated can be interpreted based on information recorded on the electronic device by the recording unit. In one embodiment, the extent to which the electronic device has been operated is used to determine whether or not the electronic device is eligible for re-sale as a new product.

Abstract: A part measurement system includes a press machine, a part measurement sensor and a press controller. The press machine includes a lower die coupled to an upper die, wherein the lower die includes a top surface supporting a strip of material to be formed into a part after a stripper plate coupled to the upper die contacts the strip of material. The part measurement sensor is located in the lower die and measures a critical dimension of the part while the part is in the lower die. The press controller is coupled to the press machine and the sensor, and controller processes a measurement signal from the part measurement sensor of the critical dimension of the part, compares the measurement signal to a predetermined threshold value, and generates a command signal to the press machine to either reject or accept the part.

Abstract: The present invention relates to a tool for analyzing by priority a defect having a high possibility of causing an electrical failure when inspecting a particle and a pattern defect in a piece of work which constitutes an electronic device such as a semiconductor integrated circuit, and relates to a system therefor. On the basis of the result of comparison between defect information which is the result of inspection by an inspection tool and layout data stored in an auxiliary storage device, or on the basis of the result of reinspection by comparison between a defect and a wiring pattern as a background by an inspection processing operation unit, an object to be reviewed is selected using review conditions stored in the auxiliary storage device.

Abstract: A portable test meter is disclosed for measuring, calculating, recording and monitoring significant system parameters for a local communication network of the type used in industrial automation applications. The meter is disclosed in the context of a network employing the DeviceNet protocol. For each network parameter of interest, a rotary switch selects a desired one for display. An auto search mode selectable by the operator, increments through selected network parameters and compares measured or calculated values against stored data representing acceptable, marginal, or unacceptable conditions, and an associated visual indicia is displayed for each unacceptable or margin condition detected.

Abstract: A production control system provides real-time monitoring of process parameters in an automated production line that manufactures contact lenses, the line and having a plurality of process stations with each process station having one or more process control devices that control production operations at each respective process station and generates production parameter data therefrom. The system includes a line monitor device for receiving an externally generated production order including a lot number, product type, and quantity, and further coordinates manufacturing processes at each of the plurality of process stations, and tracks order production. A plurality of cell monitor devices retrieves the production data from one or more process control devices and processes the data to ensure that production parameters are within predefined limits.

Abstract: An exemplary embodiment is a method and system for electronic recycle inventory tracking corresponding to a product on a production line. The system includes a processor integrated with the production line for identifying the product, determining whether the product is rejected, assigning a first destination to the product if the product is not rejected and generating tracking data based on the first destination, determining whether the product is to be recycled based on determining whether the product is rejected and assigning a second destination to the product based on said determining whether the product is to be recycled and generating tracking data based on the second destination. A network is connected to the processor, and a user system is coupled to the network. A database is coupled to the processor for storing data relating to the product.

Abstract: A computerized system for analyzing information associated with a process unit. A database contains historical information relating to previously compiled information. A secure input receives criteria from a restricted source. A computer mathematically determines a limit based upon the criteria. An open input receives the information associated with the process unit from multiple test locations. A compiler selectively adds to the database of historical information the information. The computer also selects at least a portion of the information based upon selection criteria. In addition, the computer manipulates the selected information based upon manipulation criteria. The manipulated information is compared against the limit. An output indicates a first disposition of the process unit when the manipulated information violates the limit. The output indicates a second disposition of the process unit when the manipulated information does not violate the limit.

Abstract: This method for detecting and classifying a scratch on a semiconductor wafer, in accordance with the invention, first defines a coordinate system on the wafer. The method creates a list of failed cells according to coordinates corresponding to the cell failures on the wafer. The number of failed cells, in total, is determined. Through calculating the standard deviation of the failed cells at a plurality of different angles, based on the list of failed cells and the total number of failed cells, a determination is made as to whether the wafer has a potential scratch. Plotting the standard deviations versus the number of failed cells and comparing that point to other known points determines the presence of a scratch. The steps of detecting and classifying scratches occurring on wafers may be performed by a computer.

Abstract: A method and apparatus evaluates the runability of a photomask inspection tool that inspects plural sets of die, each die having a standard simulated industrial device feature at plural technology nodes. A technology node size is determined for each feature at which inspection by the tool provides no false detection of faults. A sensitivity module included on a photomask test plate along with a runability module allows determination of inspection tool sensitivity and runability in a single test sequence.

Abstract: The start up performance of an ultrasonic system under zero load conditions is improved by setting a phase set point in a frequency control loop such that, at start up under zero load conditions, the phase set point intersects a point on a phase-frequency response curve which has a low positive slope. This intersection point on the phase-frequency response curve changes as the load is increased and the system Q is decreased. The controller “seeks” a target 0° impedance phase angle. The frequency of the ultrasonic generator is set to an off-resonance frequency which is lower than the resonance of any known hand piece/blade combination. In order for the drive voltage to not exceed the physical limit of the system, the drive current is set to a low level. The drive frequency is then smoothly increased in steps until the target 0° impedance phase delta is located.

Abstract: In one embodiment, a method and apparatus is provided for data stackification for run-to-run control. A process run of semiconductor devices is processed. A manufacturing tag associated with the process run of semiconductor devices is recorded. Metrology data relating to the processed semiconductor devices is then acquired. The present invention calls for performing a metrology data stackification process upon the metrology data using the manufacturing tag for organizing and stacking the metrology data. The present invention provides for modifying at least one control parameter based upon the stacked metrology data.

Abstract: Methods and devices for detecting and predicting parameter deviations and isolating failure modes in systems that are subject to failure. In a preferred embodiment, methods are provided for use with engines, including aircraft, automobile, and industrial combustion engines. However, numerous other applications are contemplated. Such engines may be described as having monitor points having current parameter values, where the monitor points may correspond to single physical sensors or to virtual or inferred monitor points having parameter values derived from multiple sensors. Acceptable ranges, limits, and values for each of the monitor point parameters may be provided for use with the present invention. Parameters lying outside of the acceptable ranges may be said to be in deviation. Ambiguity groups, including one or more failure modes or physical causes of the parameter deviations may also be provided.

Abstract: A method and system for monitoring process parameters associated with a manufacturing or testing process. The system includes: at least one machine which is used in the manufacturing or testing process; at least one sensing device, coupled to the at least one machine, for measuring a process parameter associated with the at least one machine; and a controller, coupled to the at least one sensing device, for receiving and storing measured data from the at least one sensing device. The method includes the acts of: measuring a value of a process parameter associated with a machine used in the manufacturing or testing process; converting the measured value of the process parameter into a digital data signal having a specified data format; transmitting the digital data signal to a controller; and storing the digital data signal in a database.

Abstract: An assembly line reliably produces articles assembled from at least two components by measuring critical dimensions of components destined to be assembled together as one particular article. A specified testable condition is predicted for the particular article by solving a regression equation previously ascertained from other assembled and tested articles having components with known critical dimensions. If the predicted testable condition is unsatisfactory, a rejection operation is performed so that any unacceptable article is prevented from being assembled or from being used.

Abstract: The present invention provides for a method and an apparatus for performing dynamic sampling of a production line. A first plurality of semiconductor wafers are processed. A minimum sampling rate of semiconductor wafers is calculated. Wafers from the first plurality of the semiconductor wafers are selected and analyzed at the calculated sampling rate. The performance of the processing of the first plurality of semiconductor wafers is quantified, based upon the analyzed wafers. A dynamic sampling process is performed based upon the quantification of the performance of the processing of semiconductor wafers.

Abstract: A failure analysis device is provided which can realize automatic light emission analysis even when the tested chips have logic LSIs etc. fabricated therein. A comparator (11) compares individual Iddq values (I1) to (In) sequentially provided from a probe card (3) with a threshold (Ith1) provided from a main control unit (7). An abnormality occurrence vector specifying unit (8) receives data (D2) about the results of comparison from the comparator (11) and specifies an abnormality occurrence vector or vectors from among a plurality of test vectors (TB1) to (TBn) on the basis of the data (D2). More specifically, the abnormality occurrence vector specifying unit (8) specifies the test vector as the abnormality occurrence vector when the corresponding detected Iddq value is larger than the threshold (Ith1).

Abstract: An exemplary embodiment is a method and system for electronic recycle inventory tracking corresponding to a product on a production line. The system includes a processor integrated with the production line for identifying the product, determining whether the product is rejected, assigning a first destination to the product if the product is not rejected and generating tracking data based on the first destination, determining whether the product is to be recycled based on determining whether the product is rejected and assigning a second destination to the product based on said determining whether the product is to be recycled and generating tracking data based on the second destination. A network is connected to the processor, and a user system is coupled to the network. A database is coupled to the processor for storing data relating to the product.

Abstract: A method and apparatus for providing communication between a defect source identifier and a tool data collection and control system. The defect source identifier collects wafer data until a defect is identified. Upon identification of a defect, a request is sent to the tool data collection and control system to request data of the tool parameters at the time the defect occurred. The tool data collection and control system retrieves the tool parameters and communicates them to the defect source identifier through a network. The tool parameters are processed by the defect source identifier to extract certain wafer data. The selected wafer data is communicated to the tool data collection and control system and is used to execute a prediction model to predict failure possible of the tool elements.

Abstract: A method of utilizing Fast Chip Erase to screen endurance rejects. Multiple sectors in a device are selected and a time necessary to program all cells in the sectors is monitored and if the monitored time exceeds a first time, the device fails. A time necessary to erase all the cells without any overerased cells is monitored and if the time exceeds a second time, the device fails. A time necessary to correct overerased cells is monitored and if the time exceeds a third time, the device fails. The total time from erase until overerase correction is achieved is monitored and if the total time exceeds a fourth time, the device fails. The total time to determine erasability is monitored and if this time exceeds a fifth time, the device fails.

Abstract: A method of analyzing and classifying defects on semiconductor wafers during a semiconductor manufacturing process using a comparator die selector system wherein an automatic defect classification review tool compares defects on a die location with an identical location on an identical die. The automatic defect classification review tool locates identical die with information from the comparator die selector system.

Abstract: An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These “bad” IC devices are discarded, and the remaining IC devices continue on to back-end testing.

Abstract: In the sampling inspection managing system of the present invention, for each processing step, a setting is made on a processing flow table as to whether the processing step concerned is a step for determining the sampling inspection frequency of a specific inspection step, and for a processing step which is set as “being a step of determining the sampling inspection frequency”, the inspection frequency of the specific inspection step is set on a sampling frequency setting table for every kind of product to be processed. Further, for the processing step, the processing number of lots is counted for every kind of product on a count table, and on the basis of the processing number thus counted, a judgment is made as to whether each lot is a lot to be inspected in the specific inspection step, and the judgment result is stored as information for the lot in a lot table.

Abstract: A method of designing human clinical drug trials in which the drug under study is administered to a defined population of test patients who have demonstrated a predisposition to responding to the study drug by virtue of their having one or more genes that have independently been determined to be associated with the desired response.

Abstract: Random components for each characteristic amount of a paper type to be examined are extracted on the basis of characteristic amounts of the paper type which are read from a plurality of portions on the paper type and reference data previously found with respect to the plurality of portions. Dirt components for each of the plurality of portions on the paper type to be examined are presumed on the basis of the extracted random components for each characteristic amount and a predetermined forecast model of the dirt components. The truth of the paper type to be examined is judged on the basis of the presumed dirt components and the extracted random components.

Abstract: A manufacturing process for establishing optimal operating limits, which are a percentage of a specified or blue-print tolerance, for the critical characteristics of manufactured products. The process begins a selection step for establishing an operating range based upon a percentage of tolerance for the critical characteristics of the manufactured product. The next step of the process is the manufacturing step including; making a determination as to whether the manufacturing apparatus is capable of operating within the proposed operating range, evaluating the fitness of the materials, manufacturing the products within the proposed operating range, and measuring the critical characteristics of the manufactured products. The process is audited to verify that product critical characteristics are maintained within the operating range. Any products whose critical characteristics are not within the operating range is rejected and is not offered for sale to customers in the relevant market.

Abstract: A statistical method of monitoring the yield of a gate oxide layer. A voltage is applied to first test keys and second test keys to build curves showing relationship between failure distribution and charge density, wherein each of the first test keys has a first oxide area and each of the second test keys has a second oxide area. A yield of the first test keys and a yield of the second test keys up to a charge density can be obtained. The yields of the first test keys and the second test keys have a relationship as an equation of area. To obtain a yield of small test keys, a yield and area of large test keys are imported into an equation. According to operating the equation, the yield of a small gate oxide is obtained.

Abstract: A method and system to enable extended testing of computer system drives that allows concurrent processing of input/output requests directed at the physical drive being tested, the computer system having a plurality of drives, a drive testing program stored in the computer's memory, and a drive exchange program stored in the computer's memory. The drive exchange program includes the steps of a) copying information and writes from a drive to be tested to a spare drive, b) logically replacing the drive to be tested with the spare drive, c) interfacing with the drive testing program, and d) allowing the drive testing program to test the drive to be tested.

Abstract: Random components for each characteristic amount of a paper type to be examined are extracted on the basis of characteristic amounts of the paper type which are read from a plurality of portions on the paper type and reference data previously found with respect to the plurality of portions. Dirt components for each of the plurality of portions on the paper type to be examined are presumed on the basis of the extracted random components for each characteristic amount and a predetermined forecast model of the dirt components. The truth of the paper type to be examined is judged on the basis of the presumed dirt components and the extracted random components.

Abstract: A test control system for controlling overall test procedures which processes test data generated from the final test process and analyzes bin category results. The control system uses testers for testing electrical characteristics of IC devices, a host computer for processing data transmitted from the testers and for creating a number of database structures, and distributed computers for monitoring the test progress and analyzing the test results using the database structures stored in the host computer. A control method using the control system includes the steps of: performing a final test as a lot; monitoring the status of the final test progress while storing test data during the final test; determining if the final test is completed; performing a lot decision after the final test is completed based on bin category limits; and displaying the lot decision result and storing the test data.

Abstract: An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These “bad” IC devices are discarded, and the remaining IC devices continue on to back-end testing.

Abstract: A quality management system (S100) comprises a data processing unit (11), a processed-data judgment unit (12) receiving an output from the data processing unit (11), a sampling unit (13) receiving an output from the processed-data judgment unit (12), a file making unit (14) receiving an output from the sampling unit (13), a data processing unit (15) receiving an output from an observation unit (20) and a processed-data judgment unit (16) receiving an output from the data processing unit (15). The system (S100) having this constitution allows reduction in labor and time from finding of a defect to recognition of occurrence of abnormal condition and improvement in accuracy of fatality rate of the defect.

Abstract: In a manufacturing line having a plurality of production jobs performed on a plurality of production units in a plurality of processing areas, a method and related system for selecting a number of production units to be sent to a designated process area other than the plurality of processing areas.

Abstract: Random components for each characteristic amount of a paper type to be examined are extracted on the basis of characteristic amounts of the paper type which are read from a plurality of portions on the paper type and reference data previously found with respect to the plurality of portions. Dirt components for each of the plurality of portions on the paper type to be examined are presumed on the basis of the extracted random components for each characteristic amount and a predetermined forecast model of the dirt components. The truth of the paper type to be examined is judged on the basis of the presumed dirt components and the extracted random components.

Abstract: A test procedure or test station for testing products, especially products completed on an assembly line type production process, performing the following steps: First, testing a parameter of a product with a first testing device using a first input signal to produce a first test result. Second, testing the same parameter of the product with a second testing device using a second input signal that is independent of the first input signal to produce a second test result. Third, deriving a differential value from the test results obtained by the testing devices. Fourth, determining the conformance of the testing station from the differential value and outputting an error message when the differential value deviates from a predetermined range. Fifth, repeating above steps for at least one other parameter.

Abstract: A method of manufacturing semiconductor wafers using a simulation tool to determine a set of predicted wafer electrical test parameters. The set of predicted wafer electrical test parameters are compared with wafer electrical test specifications tabulated for each process during the manufacturing process. During the comparison, it is determined whether the predicted wafer electrical test parameters are within the specifications for the process and circuit simulations are then conducted using the predicted wafer electrical test parameters. Device performance is predicted from the circuit simulations and the disposition of the wafer lot is determined utilizing tabulated from a disposition performance table.

Abstract: The present invention includes an electrical utility meter operable to measure power consumption. The method detects and compensates for one or more wiring errors that affects the power consumption measurement of the electrical utility meter. The method includes the steps of: obtaining measured phase angle data for a plurality of phases in a polyphase electrical system; periodically performing one or more diagnostic tests using the measured phase angle data to determine whether a wiring error is present, automatically adjusting the operation of the electrical utility meter to effect a compensation for the wiring error, said compensation increasing an accuracy of power consumption measurement of the electrical utility meter. The meter is operable to detect and compensate for wiring errors including polarity errors and cross phasing errors. According to another method of the present invention, the meter is operable to determine automatically the service type to which it is connected.

Abstract: Disclosed is a method and arrangement for use in an electrical utility meter, the electrical utility meter operable to be connected to a plurality of electrical service types. The arrangement is operable to identify a present service type, the present service type being one of the plurality of electrical service types to which the electrical utility meter is connected. The arrangement comprises: conversion circuit for obtaining measured voltage magnitude and phase angle data for a plurality of phases in a polyphase electrical system; a memory; and a processor connected to said memory and said conversion circuit. The processor is operable to execute programming steps stored in the memory to receive the measured voltage magnitude and phase angle data from the conversion circuit and identify the present electrical service type based on the measured voltage magnitude and phase angle data.

Abstract: A processing result storage device stores data on the results of an etching apparatus having processed a product. An apparatus property storage device stores data which indicate the property of the etching apparatus as processing property data. A process stability judgment device judges the stability of a step based on the processing result data stored in the processing result storage device and the apparatus property data stored in the apparatus property storage device. When the process stability judgment device has judged the step to be stable, the processing rate automatic calculation device calculates an etching rate. On the other hand, when the process stability judgment device has judged the step to be unstable, the processing rate recalculation device calculates an etching rate, based on the results of the etching apparatus having actually etched. The processing requirement determination device determines the etching requirements from the calculated etching rate.

Abstract: A wafer testing rig includes a stand, a first contact component, a second contact component and a biasing device. The first contact component is mounted to the stand. The second contact component is mounted to the stand for movement towards and away from the first contact component. The first and second contact components are shaped so that a wafer, when located between the contact components, is deflected into a dome shape when the second contact component is moved towards the first contact component. The biasing device is operable to move the second contact component towards and away from the first contact component. An electrical tester is provided to test the wafer.

Abstract: An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These "bad" IC devices are discarded, and the remaining IC devices continue on to back-end testing.

Abstract: A test control system for controlling overall test procedures which processes test data generated from the final test process and analyzes bin category results. The control system uses testers for testing electrical characteristics of IC devices, a host computer for processing data transmitted from the testers and for creating a number of database structures, and distributed computers for monitoring the test progress and analyzing the test results using the database structures stored in the host computer. A control method using the control system includes the steps of: performing a final test as a lot; monitoring the status of the final test progress while storing test data during the final test; determining if the final test is completed; performing a lot decision after the final test is completed based on bin category limits; and displaying the lot decision result and storing the test data.

Abstract: A method, system, and program storage device are disclosed for generating with a computer a current confidence level from accumulated runtime and failure data of a product subjected to product reliability testing. The current confidence level may be generated from time to time during testing and prior to verifying the product has met its reliability goal with a sufficient level of confidence to provide a quantified risk assessment of whether the product will ultimately meet this reliability goal. In effect, the preferred embodiments of the invention provide quantitative tools for measuring quality goals. As schedule goals are also quantitative in nature, the decision of whether to release a product in view of scheduling and quality concerns typically becomes more of a data-driven risk assessment decision.

Abstract: An article inspection apparatus is capable of inspecting an article which cannot be sorted out by image processing or a diagnostic process that employs energy to be transmitted through the article. A hitting sound is generated by a hitting sound generating device when an article is hit, and is detected by a sound detecting device and analyzed by a detected-sound analyzer. The analyzed result is converted into a pattern by a detected-sound pattern generator, and the pattern is matched with registered reference patterns from a reference pattern registering device by a pattern matching device. Based on the result of matching, the article is sorted out by an article sorting device. It is possible to detect the material of a container, such as cans of aluminum and iron which are identical in shape and size to each other. It is also possible to check the amount of a substance in a container that cannot directly be seen, or inspect baked articles for pores contained therein.