Power System Patents (Class 703/18)
  • Patent number: 7376541
    Abstract: A pin-based memory power modeling method using arc-based characterization includes steps as follows. All power arcs of a memory model are identified and characterized. A power arc is selected from the identified and characterized power arcs. Output bus switching power is computed by removing overlapping power using the selected power arc, and a temporary value for various input ramp times and output loads is derived. Output pin power for the selected power arc is calculated using the temporary value and a ratio of a number of output bits switching over an entire bus width. Switching power for the selected power arc is calculated by a power estimation tool based on port activity and an input intrinsic power value.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: May 20, 2008
    Assignee: LSI Logic Corporation
    Inventors: Jia-Lih J. Chen, Naveen Gupta, Ghasi R. Agrawal
  • Patent number: 7366649
    Abstract: A method for generating and evaluating a table model for circuit simulation in N dimensions employing mathematical expressions for modeling a device. The table model uses an unstructured N-dimensional grid for approximating the expressions.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: April 29, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Gang Peter Fang
  • Patent number: 7363208
    Abstract: A process for deriving a power transfer function of a circuit. The power transfer function can be used to represent the real time power consumption of a circuit based on the status of the inputs. In one embodiment, the power transfer function is derived from frequency domain analysis of signals applied to the inputs of a circuit during tests of the circuit. In one embodiment, the inputs of the circuit are grouped in groups based on a commonality of power consumption of the signals. The inputs may be grouped by clustering squared coherencies associated with the inputs. The transfer function may be implemented in a power monitoring circuit having inputs coupled to the inputs of the circuit to provide a real time estimation of power consumption of the circuit.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: April 22, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Lipeng Cao
  • Patent number: 7356383
    Abstract: Methods and systems for operating combined cycle electrical generating plants is provided. The method includes simulating the electrical power plant performance, simulating the steam utilizing process plant performance, parameterizing plant equipment and plant performance using the power plant and process plant simulation results, and solving parameterized simultaneous equations and constraints with an objective function to determine parameter settings that facilitate enhancing an efficiency of the combined cycle electrical generating/steam-utilizing process plant.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: April 8, 2008
    Assignee: General Electric Company
    Inventors: Peter Anton Pechtl, Martin Posch, Bijan Davari, Marco Robert Dieleman
  • Patent number: 7356411
    Abstract: A method for interpreting transient electromagnetic survey data includes measuring transient response of a medium over a plurality of switching events. The measured transient response to a first one of the current switching events is modeled. Transient response to the model for at least one current switching event prior in time to the at least a first current switching event is calculated. The calculated transient response is summed with the first event measured response and the sum is compared to the electromagnetic survey measurements. The model is adjusted and the calculating summed transient responses is repeated until a difference between the summed calculated responses and the survey measurements falls below a selected threshold.
    Type: Grant
    Filed: July 1, 2006
    Date of Patent: April 8, 2008
    Assignee: KJT Enterprises, Inc.
    Inventors: Charles H. Stoyer, Kurt M. Strack
  • Patent number: 7353155
    Abstract: Transmission line macromodels can be classified into main categories of delay-extraction and rational approximation. The exponential solution of the Telegrapher's Equation is used to create a system and method that enable a time-domain circuit simulator to automatically select the most appropriate macromodel for a given transmission line structure.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventor: Ibrahim M. Elfadel
  • Patent number: 7353469
    Abstract: It is an object of the present invention to provide a semiconductor device design method and program that can rapidly improve power supply noise characteristics and reduce the noise sufficiently without being restricted in design and noise solution. A step of performing frequency analysis on a power supply distribution network model creates a power supply distribution network model based on electric characteristics obtained in accordance with specifications (maximum allowable drop value of power supply voltage, power supply current value, operating frequency, etc.) of the semiconductor device and performs frequency analysis on this power supply distribution network model. A step of performing frequency analysis based on an operating current waveform analyzes power supply current characteristics based on an operating current waveform obtained in accordance with the specification.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: April 1, 2008
    Assignee: Fujitsu Limited
    Inventor: Yasushige Ogawa
  • Patent number: 7349835
    Abstract: A method, system and computer program product for generating and verifying the correctness of isolation logic modules in design of integrated circuits (ICs). The method disclosed generates an isolation logic module for each power domain specified by a user, instantiates the generated module in a pre-determined wakeup domain, and then simulates shutdown conditions to ensure the correctness of the generated isolation logic module. The isolation logic is generated based on user-defined voltage constraints.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: March 25, 2008
    Assignee: Atrenta, Inc.
    Inventors: Bhanu Kapoor, Debabrata Bagchi, Sanjay Churiwala
  • Patent number: 7343276
    Abstract: A computer readable medium includes computer executable code stored thereon, the code for estimating power consumption of an integrated circuit, comprising code for simulating logic of basic and mega cells of the integrated circuit, code for estimating a current consumed by the mega cells by obtaining logic states for each mega cell, determining an average operation frequency for each logic state, and determining an alternating current component and a direct current component for each logic state to calculate said current consumed by the mega cells for estimating a first value of electric power consumed by said mega cells based on said logic simulations and pre-established power consumption data, code for estimating a current consumed by the basic cells for estimating a second value of electric power consumed by said basic cells based on said logic simulations and pre-established power consumption data and code for combining said first and second values to obtain the power consumption of the integrated circui
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: March 11, 2008
    Assignee: Ricoh Company, Ltd.
    Inventors: Yasutaka Tsukamoto, Hidetaka Minami
  • Patent number: 7340387
    Abstract: A control rod driving simulator has a control rod driving unit having a plurality of coil members vertically mounted therein, a control rod mounted vertically movably through the centers of the coil members, a cart having a reserve tank storing cooling water, a cooling fan for air-cooling the coil members and a control unit for controlling an operation of the cooling fan, a box containing a part of the control rod and a checking unit for checking the vertical movement of the control rod. When the simulator is connected to an actual control rod driving mechanism and a wave profile of current flowing in the coil members of the control rod driving unit is measured, a same wave profile of current as when it is connected to an actual control rod driving mechanism provided to a reactor core can be obtained.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: March 4, 2008
    Assignee: Doosan Heavy Industries & Construction Co., Ltd.
    Inventors: Chae-Ho Nam, Jung-Surk Sur, Chang-Ho Cho
  • Publication number: 20080040091
    Abstract: A method of simulating a semiconductor integrated circuit (IC) at gate level includes providing a net list including information about a variable power source and a variable ground source, providing a circuit model including the variable power source and the variable ground source, and simulating the net list by using the circuit model at gate level.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 14, 2008
    Inventors: Tak-Yung Kim, Sun-Yung Jang, Hyoung-Soo Song
  • Publication number: 20080021692
    Abstract: A power estimation system uses a hardware accelerated simulator to advance simulation to a point of interest for power estimation. The hardware accelerated simulator generates a checkpoint file, which is then used by a software simulator to initiate simulation of the processor design model for power estimation. An on-the-fly power estimator provides power calculations in memory. Thus, the power estimation system described herein isolates instruction sequences to determine portions of software code that may consume excess power or generate noise and to provide a more accurate power estimate on the fly.
    Type: Application
    Filed: July 21, 2006
    Publication date: January 24, 2008
    Inventors: Rajat Chaudhry, Sang H. Dhong, Gilles Gervais, Danny J. Klema
  • Patent number: 7319946
    Abstract: New Frequency dependent RLC extraction and modeling for on chip integrity and noise verification employs: A) 2D scan line algorithm for the collection of adjacent signal and power conductor coordinates; B) In core pair-wise frequency Dependent RL extraction; C) In core equivalent circuit synthesis; D) caching and partitioning RL extraction techniques for run time efficiency; and E) Techniques for synthesizing stable circuits to represent frequency dependent RL circuits for non-mono tonic R12.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: January 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Bowen, Alina Deutsch, Gerard V. Kopcsay, Byron L. Krauter, Barry J. Rubin, Howard H. Smith, David J. Widiger
  • Patent number: 7315804
    Abstract: A car engineering assist system and method establish a master data and set a computer-generated virtual car model to represent at least a portion of a product design specification (PDS) of a test car. A real time simulator performs computer simulation of a test module using the car model, which has been set to represent at least the portion of the PDS of the test car, to produce a simulation result. A logic unit performs conformity assessment of the test module based on the simulation result and the master data.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: January 1, 2008
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Osamu Sato, Takeshi Katayama, Hirokazu Matano, Kouji Imai, Haruki Saito
  • Patent number: 7310572
    Abstract: A control method includes modeling a power generation apparatus, monitoring the generation of a total amount power from the power generation apparatus, monitoring internal consumption of power for a power generation apparatus, acquiring a power generation requirement for a first selected time period of a power generation apparatus to meet a power contract, and projecting an amount of total power needed over a diminishing time varying prediction horizon based on the model, the power generation requirement and the internal consumption.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: December 18, 2007
    Assignee: Honeywell International Inc.
    Inventors: Vladimir Havlena, Jiri Findejs
  • Patent number: 7305639
    Abstract: A method, an apparatus and computer instructions are provided for specifying multiple voltage domains of a signal and macros in a processor chip and validating physical implementation and interconnections of the signal and macros. A set of attributes is provided for designs to define multiple voltage domains of a signal and macros in a processor chip. A first validation mechanism is then provided to validate that no electrical or logical errors created by logical connections between macros as defined by the set of attributes. A translation mechanism is provided to translate logical voltage description to a physical netlist for designers to connect powers to macros and signals. A second validation mechanism is provided to validate physical implementation adhere to designers' intent according to the set of attributes defined in the logical design.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Michael Stephen Floyd, Joshua David Friedrich, Elspeth Anne Huston, Wolfgang Roesner, Rick John Weiss
  • Patent number: 7305335
    Abstract: Disclosed is a permanent recloser simulator feature for use in a single-pole trip capable recloser control. The permanent recloser simulator feature includes a first logic circuit capable of enabling and disabling operation of the permanent recloser simulator feature in response to receipt of a binary logic signal, and a second logic circuit coupled to the first logic circuit where the second logic circuit is configured to provide an indication of a status of a first pole to a logic engine of the single-pole trip capable recloser control. The permanent recloser simulator feature may further include a third logic circuit associated with a second pole, and a fourth logic circuit associated with a third pole where both are coupled to the first logic circuit. Disabling means of the first logic circuit allow the first, second, third and fourth logic circuit to permanently reside in logic of the recloser control.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: December 4, 2007
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventor: James T. (Ted) Warren
  • Publication number: 20070271081
    Abstract: In general the invention is directed to systems and methods to identify conductors that may be used as part of a power transmission line system. In one embodiment, the invention is directed to a computer-implemented method of evaluating an electric conductor for an overhead power transmission line, comprising: receiving requirements data defining requirements for an overhead power transmission line; receiving conductor data that define at least two conductors to be evaluated; after receiving conductor data for the plurality of conductors to be evaluated, automatically modeling expected operating performance for at least two conductors using conductor assessment software running on a computer, wherein modeling at least comprises, for at least one of the conductors to be evaluated, calculating the conductor's maximum ampacity within the constraints defined by the requirements data; and, based on the modeling, identifying at least one conductor that meets the requirements for the power transmission line.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 22, 2007
    Inventors: Douglas E. Johnson, Elisa J. Collins, Anton F. Jachim
  • Patent number: 7286971
    Abstract: A method for visualizing and efficiently making comparisons of communication system performance utilizing predicted performance, measured performance, or other performance data sets is described. A system permits visualizing the comparisons of system performance data in three-dimensions using fluctuating elevation, shape, and/or color within a three-dimensional computer drawing database consisting of one or more multi-level buildings, terrain, flora, and additional static and dynamic obstacles (e.g., automobiles, people, filing cabinets, etc.). The method enables a design engineer to visually compare the performance of wireless communication systems as a three-dimensional region of fluctuating elevation, color, or other aesthetic characteristics with fully selectable display parameters, overlaid with the three-dimensional site-specific computer model for which the design was carried out.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: October 23, 2007
    Assignee: Wireless Valley Communications, Inc.
    Inventors: Theodore Rappaport, Roger Skidmore, Brian Gold
  • Patent number: 7277841
    Abstract: An adaptive subgridding method for power/ground plane simulations. The method includes superimposing a grid of cells onto a circuit plane. For each cell, the method may determine a fill ratio representing the amount of area in a given cell that overlaps with the circuit plane. For each cell having a fill ratio that is less than a predetermined upper limit or a predetermined lower limit the cell may be divided into a plurality of subcells. The method may then determine the fill ratio for each of the subcells. As with the original cells, each of the subcells having a fill ratio less than the predetermined upper limit and greater than the predetermined lower limit may be further subdivided into additional subcells. The loop may repeat itself until a predetermined integer value is reached, wherein the integer value indicates the number of times a cell may be subdivided.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: October 2, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Istvan Novak, Jason R. Miller, Eric L. Blomberg, Deborah Foltz, Kenneth Laird
  • Patent number: 7249331
    Abstract: A method for estimating power dissipated by processor core processing a workload includes analyzing a reference test case to generate a reference workload characteristic, analyzing an actual workload to generate an actual workload characteristic, performing a power analysis for the reference test case to establish a reference power dissipation value and estimating an actual workload power dissipation value responsive to the actual and reference workload characteristics and the reference power dissipation value.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: July 24, 2007
    Assignee: International Business Machines Corporation
    Inventors: Pradip Bose, Tejas S. Karkhanis, Srinivasan Ramani, Malcolm Scott Ware, Ken Vu
  • Patent number: 7243006
    Abstract: A control system and method selects a switch configuration for a power circuit having N binary switches, based in part on a finite state machine. The control system includes an embedded simulator, and present and next state contemplators. The various switch states of the power circuit are modeled by the finite state machine such that at any time, the power circuit switches are in a Present State and there are a plurality of Next States which are one or more switch transitions away from the Present State. The embedded simulator estimates the operating conditions of the load based on measured operational characteristics and the Present State. The present state contemplator determines, based on the operating conditions, whether a switch state transition should be contemplated. If so, the next state contemplator determines the optimal next state based on performance criteria and sends a state switch command to the power circuit.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: July 10, 2007
    Assignee: Zetacon Corporation
    Inventor: Michael J. Richards
  • Patent number: 7243054
    Abstract: A network which includes electromagnetic components, such as a wireless communications system, is designed, optimized, modified and/or saved or exported to another applications program using a graphical interface. A display may present a graphical rendering of performance characteristics in a site specific manner showing elements such as walls, doors, windows, furniture, people, foliage, and terrain. The locations where performance characteristic information are presented can be automatically selected and adjusted to present more or less information. The display can be viewed at multiple perspectives, and the viewing angle can be adjusted. In one embodiment, the display can graphically present information related to two different performance characteristics.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: July 10, 2007
    Assignee: Wireless Valley Communications, Inc.
    Inventors: Theodore S. Rappaport, Roger R. Skidmore
  • Patent number: 7236920
    Abstract: A system for delivering power to a device in a specified voltage range is disclosed. The system includes a power delivery network, characterized by a response function, to deliver power to the device. A current computation unit stores values representing a sequence of current amplitudes drawn by the device on successive clock cycles, and provides them to a current to voltage computation unit. The current to voltage computation unit filters the current amplitudes according to coefficients derived from the response function to provide an estimate of the voltage seen by the device. Operation of the device is adjusted if the estimated voltage falls outside the specified range.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: June 26, 2007
    Assignee: Intel Corporation
    Inventors: Edward T. Grochowski, David Sager, Vivek Tiwari, Ian Young, David J. Ayers
  • Patent number: 7231280
    Abstract: A dynamic power control system for controlling power utilization on a local level in a power sub-network of a power grid is presented. The power sub-network is configured with switchable power nodes, each having a switch element that operates to switch coupling and uncoupling of first and second subsets of power lines in the sub-network. A sub-network controller monitors utility information that is associated with one of a plurality of switch state configurations of the respective switch states of the switchable power nodes in the power sub-network, and effects the switch states of the switchable power nodes to comply with the switch state configuration associated with the received utility information.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: June 12, 2007
    Assignee: Costa Enterprises, L.L.C.
    Inventor: Brian Costa
  • Patent number: 7231281
    Abstract: A dynamic power control system for controlling power utilization on a local level in a power sub-network of a power grid is presented. The power sub-network is configured with switchable power nodes, each having an associated priority level and each having a switch element that operates to switch coupling and uncoupling of first and second subsets of power lines in the sub-network. A sub-network controller monitors utility information that is associated with one of a plurality of system priority levels each of which is associated with one of a plurality of switch state configurations of the respective switch states of the switchable power nodes in the power sub-network, and effects the switch states of the switchable power nodes to comply with the switch state configuration associated with the received utility information.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: June 12, 2007
    Assignee: Costa Enterprises, L.L.C.
    Inventor: Brian Costa
  • Patent number: 7222061
    Abstract: In the method, a set of limits applicable to a test rod pattern design are defined, and a sequence strategy for positioning one or more subsets of the test rod pattern design is established. Reactor operation on a subset of the test rod pattern design, which may be a subset of fuel bundles in a reactor core for example, is simulated to produce a plurality of simulated results. The simulated results are compared against the limits, and data from the comparison is provided to indicate whether any of the limits were violated by the test rod pattern design during the simulation. A designer or engineer may use the data to determine which operator parameters need to be adjusted (e.g., control blade notch positions for example) in order to create a derivative rod pattern design for simulation, and eventually perfect a rod pattern design for a particular core.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: May 22, 2007
    Assignee: Global Nuclear Fuel - Americas, LLC
    Inventors: William Earl Russell, II, David Joseph Kropaczek, Steven Barry Sutton, Christian Carlos Oyarzun, William Charles Cline, Carey Reid Merritt
  • Patent number: 7191113
    Abstract: A method and system for short-circuit current modeling in CMOS circuit provides improved accuracy for logic gate power dissipation models in computer-based verification and design tools. The model determines the short circuit current for each complementary pair within a CMOS circuit. Input and output voltage waveforms provided from results of a timing analysis are used to model the behavior one device of the complementary pair. The device is selected as the limiting device (the device transitioning to an “off state) from the direction of the logic transition being modeled, which is also the device that is not charging or discharging the output load. Therefore, the current through the selected device can be determined from the input and output waveforms and is equal to the short-circuit current prior to the saturation of the selected device.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: March 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Emrah Acar, Ravishankar Arunachalam, Sani Richard Nassif
  • Patent number: 7177783
    Abstract: The invention allows the inclusion of cross-talk coupling and other noise in circuit simulation by considering a resultant glitch in more detail than just its peak value. A set of parameters represents the noise, with an exemplary embodiment using a triangle approximation to a glitch based on a set of three parameters: the peak voltage value, the leading edge slope and the trailing edge slope. These values are then used as the input stimulus to a given cell instance in the network in which the resulting propagated noise values, also in a triangle approximation, are determined by a simulation. The results can be stored as a library so that, given the parameters of the input noise and the particular cell, a simulation can determine the propagated noise through a look-up process. To reduce the space requirements of the library, the dimensionality of the look-up tables can be reduced through the introduction of a set of auxiliary functions to offset error from this reduction.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: February 13, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Lifeng Wu, Jianlin Wei, I-Hsien Chen
  • Patent number: 7158919
    Abstract: A remote monitoring system including a sub-system, local to a nuclear power plant and a remote sub-system at an operations base. Process data is collected manually by a hand-held computer and automatically by instrumentation on the power plant. The data collected is stored on a storage device before being transmitted via a communication link to a remote computer. The remote computer runs data analysis and diagnostic simulations on the process data from the power plant to predict future events.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: January 2, 2007
    Assignee: Rolls-Royce plc
    Inventors: Gary S Wright, John P Shoesmith
  • Patent number: 7152025
    Abstract: A method is provided to automatically identify noise events in a channel of a communication system comprising the steps of: receiving an input signal from the channel; determining the mean energy of the input signal; determining the recent energy of the input signal; identifying a beginning of the noise event when the recent energy is greater than the product of the mean energy and a predefined first threshold; identifying an end of a noise event when the recent energy is less that the product of the mean energy and a predefined second threshold; and providing for output the beginning of the noise event and the end of the noise event. Other systems and methods are disclosed.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Itay Lusky, Daniel Wajcer, Yosef Bendel, Yigal Bitran, Naftali Sommer, Ofir Shalvi, Zvi Reznic, Ariel Yagil, Eli Haim
  • Patent number: 7149637
    Abstract: The detection of electromechanical oscillations in power systems and the estimation of their frequency and damping parameters are based on a linear time-varying model. The parameters of the linear model are on-line adapted by means of Kalman filtering techniques to optimally approximate the measured signal representing the behavior of the power system based on a quadratic criterion. The estimated model parameters are then the basis for the calculation of parameters of the oscillations. Adaptive algorithms are based on a recursive calculation of the estimated parameter vector for each time-step based on the new value of the measured signal and the old values of the estimated parameters.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: December 12, 2006
    Assignee: ABB Research Ltd
    Inventors: Petr Korba, Mats Larsson, Christian Rehtanz
  • Patent number: 7146303
    Abstract: A technique for incorporating power information in a register transfer level design involves defining a module representing an integrated circuit block having its own power grid. The integrated circuit block, when in a power off mode effectuated by a deactivation of a clock signal to the integrated circuit, uses a device dependent on a power grid of an adjoining integrated circuit block to preserve output information from the integrated circuit block to the adjoining integrated circuit block.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: December 5, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Aninda Roy, Vipul Parikh
  • Patent number: 7138878
    Abstract: A semiconductor integrated circuit is provided in which power consumption of each functional block can be determined. The semiconductor integrated circuit comprises: first through third signal processing circuits each operating in synchronization with first through third externally supplied clock signals; first through third counters each counting first through third clock signals; a bus interface circuit outputting a plurality of count values that the first through third counters counted; a clock enable signal generating circuit to generate first through third clock enable signals each controlling the supply of the first through third clock signals to the first through third signal processing circuits; and a counter control circuit supplying a plurality of counter reset signals and a plurality of counter enable signals for resetting and operating the first through third counters, respectively.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: November 21, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Atsushi Obinata
  • Patent number: 7110932
    Abstract: A method and circuit arrangement for determining performance of a digital circuit to a critical degree by the transit time of signals of the longest signal path, also called the critical path. Since the signal transit time is influenced by the operating voltage, by regulating the operating voltage, to compensate for the effects caused by temperature and process fluctuations on the signal transit time in the digital circuit. In particular, the operating voltage can be regulated as a function of the signal transit time in such a way that a required minimum operating frequency can always be achieved. To determine signal transit time, the digital circuit has associated with it a number of replicas of the critical path in the digital circuit upon which the signal transit time is determined. In order to determine the transit time, the signal path replicas are exposed to the same operating conditions as the digital circuit.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: September 19, 2006
    Assignee: Infineon Technologies AG.
    Inventors: Joerg Berthold, Henning Lorch
  • Patent number: 7110930
    Abstract: A method, system and program product for creating a simplified equivalent model for an IC that can be used for detailed analysis. The equivalent model takes into consideration the effects of all the I/O placement regardless of the non-uniformity of I/O placement. The equivalent model is generated, in part, by partitioning the IC into simulation windows and converting I/Os within each simulation window to a current source having the same current change rate, and then running a simulation on this intermediate model. A current change rate observed for a simulation window is then used to convert back to actual I/Os to create the equivalent model. The equivalent model can be simulated using conventional software, e.g., SPICE, for more detailed analysis such as signal integrity, timing of I/Os and noise.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 19, 2006
    Assignee: International Business Machines Corporation
    Inventors: Charles S. Chiu, Umberto Garofano, James E. Jasmin
  • Patent number: 7107197
    Abstract: A wiring harness design is analyzed and module data is created automatically and stored for a plurality of harness modules representing wire and component element requirements for those modules, the modules being capable of assembly in selected combinations to create a complete harness.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 12, 2006
    Assignee: Mentor Graphics Corporation
    Inventor: Arthur Edward Shropshire
  • Patent number: 7099721
    Abstract: A development tool (2) includes a plurality of measuring tools (71) to (76) and an industrial process simulation device (60). The simulation device (60) simulates a whole industrial scale bioprocess in order to obtain acceptable operating parameters for the industrial scale bioprocess. The measuring tools (71) to (76) enable various significant properties of the biomaterial to be measured and evaluated using only a small test quantity of the biomaterial.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: August 29, 2006
    Assignee: University College London
    Inventors: Peter Dunnill, Mike Hoare, Nigel Titchener-Hooker
  • Patent number: 7096165
    Abstract: A network map is determined, either in the operating direction from the feed circuit to the load in the load circuit, or backward on the basis of the loads in the load circuit to the data for the feed circuit. The feed circuit and the load circuit are coupled to a virtual interface, at which secondary distribution panels can be interconnected. The schematic procedure, in conjunction with appropriate computation rules and visualization in a network map that is obtained, allows the configuration process to be carried out even by those who are unskilled.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: August 22, 2006
    Assignee: Siemens Aktiengesellschaft
    Inventors: Norbert Pantenburg, Thomas-M Stutzer
  • Patent number: 7096175
    Abstract: A method, device and computer program product for the prediction of the stability of an electric power network, where the method is executed after a fault or contingency has occurred, and comprises the steps of (a) during a time interval in which the network is in a transient condition, determining for at least one load connected to the electric power network, at least one parameter describing an estimated steady state behavior of the load, (b) executing a load flow calculation for the electric power network using the least one parameter describing the estimated steady state behavior the at least one load, (c) determining, if the load flow calculation indicates stability has a solution, that a future stability of the electrical power network exists, or, if the load flow calculation indicates instability does not have a solution, that a future stability of the electrical power network does not exist.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: August 22, 2006
    Assignee: ABB Research LTD
    Inventors: Christian Rehtanz, Valentin Bürgler, Joachim Bertsch
  • Patent number: 7085702
    Abstract: Method and system for modeling and automatically generating an embedded system from a system-level environment. A plurality of user-selectable system-level design objects are provided in the system-level environment. Each system-level design object is defined by a system-level function and is selectable by a system-level designer. A plurality of hardware-level design objects are also provided. Each hardware-level design object is configured to generate a hardware definition of a hardware-level function. Each system-level design object maps to one or more hardware-level design objects. A processor design object is provided which defines a processor. In response to selections made by the designer, a system-level design is instantiated in a system-level design file. The system-level design includes user-selected ones of the system-level and processor design objects.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: August 1, 2006
    Assignee: Xilinx, Inc.
    Inventors: L. James Hwang, Jeffrey D. Stroomer
  • Patent number: 7085700
    Abstract: An improved method for debugging of analog and mixed signal behavioral models during simulation using Newton-Raphson iteration replay. The method according to the invention has substantially modified the prior art solution by limiting the interactive debugging steps in a replay of the last iteration of the accepted timepoints. Using this method, the user only interacts with the simulation during the iteration replay, and only for the accepted solution points. If the user is single stepping through this simulation, the simulator enters interactive mode at each statement during the replay. Similarly, if not single stepping, but a breakpoint has been triggered, the simulator enters the interactive mode at the appropriate statement to honor the breakpoint. While the iteration replay is performed, the system of equations does not need to be solved again. Instead, the solution vector is reinstated from the known solution of the last iteration.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: August 1, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventors: Donald J. O'Riordan, Richard Trihy
  • Patent number: 7079998
    Abstract: A method for analyzing power noise and method for reducing the same are disclosed, wherein the present invention is utilized in an IC design process. First, a DC analysis is performed with a related IC design by utilizing computer aided design (CAD) software and circuit simulation software for obtaining a power network model of the IC design. Then, the power network model is defined as being composed of a plurality of unit blocks. After analysis, the quantity and type, etc., of components connected electrically to each of the unit blocks are recognized and are regarded as component reference data of each of the unit blocks. Afterwards, according to the component reference data of each of the unit blocks, the voltage drop (IR drop) occurring in operation for each of the unit blocks is evaluated and obtained by utilizing an equivalent circuit constructed by components that are connected electrically to each of the unit blocks.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: July 18, 2006
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Hao-Luen Tien, Shang-Yi Chen, Ming-Huan Lu, Chun-An Tu
  • Patent number: 7069195
    Abstract: A method of designing a small-sized, self-shielding magnetic field gradient coil assembly that is for use in an NMR spectrometer, provides high approximation accuracy, is simple in structure, and has a large inside diameter. The gradient coil assembly consists of tightly wound inner and outer coils. The designing process starts with setting or resetting the number of the inner coils and the number of turns of each inner coil. Their positions are optimized such that the magnetic field gradient strength falls within a tolerable range under shielded condition. Then, the number of the outer coils and the number of turns of each outer coil are set. The Fourier components of a current distribution necessary for the outer coils are calculated.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: June 27, 2006
    Assignee: JEOL Ltd.
    Inventor: Kenichi Hasegawa
  • Patent number: 7069162
    Abstract: Constant components and rotation fundamental mode components on the slide plane between a rotor and a stator are derived from a magnetic field distribution at a predetermined time. The analysis space is divided into a rotor space and a stator space. A fundamental mode on the slide plane is rotated by a rotation angle of a rotation magnetic field corresponding to a time-step width. A solution obtained in this state is added to the constant components. By using the addition result as the boundary conditions on the slide plane, non-linear magnetic field analysis is performed by taking into consideration the magnetic saturation in the stator space. The rotation fundamental mode on the slide mode is rotated by an angle obtained by subtracting the rotation angle of the rotor from the rotation angle of the rotation magnetic field corresponding to the time-step width.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: June 27, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Kenji Miyata
  • Patent number: 7054795
    Abstract: A method for optimizing the segment lengths of a segmented transmission line, comprising the steps of modeling the electrical performance of the segmented transmission line, and evaluating the model for incremental changes in electrical performance, selecting a set of segment lengths which meets a set of predefined optimization criteria. The predefined optimization criteria is, for example, minimum peak VSWR.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: May 30, 2006
    Assignee: MYAT Inc.
    Inventor: Donald Aves
  • Patent number: 7050866
    Abstract: A method for providing independent static and dynamic models in a prediction, control and optimization environment utilizes an independent static model (20) and an independent dynamic model (22). The static model (20) is a rigorous predictive model that is trained over a wide range of data, whereas the dynamic model (22) is trained over a narrow range of data. The gain K of the static model (20) is utilized to scale the gain k of the dynamic model (22). The forced dynamic portion of the model (22) referred to as the bi variables are scaled by the ratio of the gains K and k. The bi have a direct effect on the gain of a dynamic model (22). This is facilitated by a coefficient modification block (40). Thereafter, the difference between the new value input to the static model (20) and the prior steady-state value is utilized as an input to the dynamic model (22). The predicted dynamic output is then summed with the previous steady-state value to provide a predicted value Y.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: May 23, 2006
    Assignee: Pavilion Technologies, Inc.
    Inventors: Gregory D. Martin, Eugene Boe, Stephen Piche, James David Keeler, Douglas Timmer, Mark Gerules, John P. Havener
  • Patent number: 7039575
    Abstract: A network-based method for facilitating a selection of at least one power generating facility, using a network-based system including a server and at least one device connected to the server via a network is disclosed. The method includes identifying assumptions to evaluate a power generating facility, receiving power plant facility information, and computing performance metrics of the facility based on received information and the identified assumptions. Other embodiments of the invention utilize a System, a Computer Program, an Apparatus, or a Computer for determining a value for one or more power generating facilities based on pre-determined assumptions that are developed from historical experience.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 2, 2006
    Assignee: GE Capital Services Structured Finance Group, Inc.
    Inventor: Mark Anthony Juneau
  • Patent number: 7035785
    Abstract: A system for delivering power to a device in a specified voltage range is disclosed. The system includes a power delivery network, characterized by a response function, to deliver power to the device. A current computation unit stores values representing a sequence of current amplitudes drawn by the device on successive clock cycles, and provides them to a current to voltage computation unit. The current to voltage computation unit filters the current amplitudes according to coefficients derived from the response function to provide an estimate of the voltage seen by the device. Operation of the device is adjusted if the estimated voltage falls outside the specified range.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: April 25, 2006
    Assignee: Intel Corporation
    Inventors: Edward T. Grochowski, David Sager, Vivek Tiwari, Ian Young, David J. Ayers
  • Patent number: 7013254
    Abstract: A low-complexity, high accuracy model of a CPU power distribution system has been developed. The model includes models of multiple power converters that input to a board model. The board model then inputs to a package model. Finally, the package model inputs to a chip model. The model provides a high degree of accuracy with an acceptable simulation time.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Brian W. Amick