Abstract: A method of evaluating noise immunity of a semiconductor device is provided. An actual circuit including the semiconductor device is represented by an equivalent circuit which has a target equivalent circuit, a noise source equivalent circuit, and an external equivalent circuit connected in parallel. The target equivalent circuit represents the semiconductor device. The noise source equivalent circuit represents a noise source outside the semiconductor device, and supplies noise to the target equivalent circuit. The external equivalent circuit represents a circuit outside the semiconductor device. The noise immunity is evaluated based on a voltage or current which arises in the target equivalent circuit by the noise. In this way, the immunity of the semiconductor device against extraneous noise can be evaluated in consideration of the effects of the circuitry outside the semiconductor device.

Abstract: In a model analyzing method for analyzing power supply noise of a current model, a feedthrough current model is formed based on AC characteristics, a driver model is formed based on DC characteristics and AC characteristics, a mesh model is formed, and the power supply noise is analyzed by arranging the feedthrough current model and the driver model in the mesh model.

Abstract: A power state selection system and method are described to receive a representation of a network processing load associated with a plurality of network access devices, to select a power state based on the representation, and to assert a power state selection signal corresponding to the selected power state.

Abstract: A method for analyzing and designing structures with structural aliasing. The concept of structural aliasing applies in one embodiment of the present invention to structural systems which are cyclically symmetric. In analyzing and designing structural systems such as wheel assemblies of gas turbine engines, it is possible to group the discrete components so as to aliasingly couple particular ordered excitations and harmonic families. With structural aliasing, it is possible to couple the ordered excitations and harmonic families such that resonant response of the wheel assembly does not occur within the operating range of the engine, and also to have the resonant vibratory mode excited in such a manner that the drive coupling of the wheel dampens the wheel assembly.

Abstract: A method for determining the desired decoupling components for stabilizing the electrical impedance in the power distribution system of an electrical interconnecting apparatus, including a method for measuring the ESR for an electrical device, a method for determining a number of desired decoupling components for a power distribution system, and a method for placing the desired decoupling components in the power distribution system. The method creates a model of the power distribution system based upon an M×N grid for both the power plane and the ground plane. The model receives input from a user and from a database of various characteristics for a plurality of decoupling components. The method determines a target impedance over a desired frequency range. The method selects decoupling components. The method determines a number for each of the decoupling components chosen. The method places current sources in the model at spatial locations corresponding to physical locations of active components.

Abstract: A system and method which reduce power consumption of a domino circuit. An initial phase assignment for outputs of the domino circuit is generated. A final phase assignment that reduces power consumption of the domino circuit is determined. The final phase assignment is selected from at least one additional phase assignment. The power consumption of domino circuits can be reduced by utilizing the methods and systems disclosed.

Abstract: A power management and control system having a dynamic data exchange (DDE) server simulator for simulating supervisory management and control of electrical distribution systems is presented. The DDE server simulator is an alternative DDE server which simulates device values rather than acquiring data from real devices. The DDE server simulator generates and calculates device data from user generated electrical property profiles and updates DDE compliant clients. The DDE server simulator accepts the actual topics and item names and power profiles are user configurable with an option to apply white noise to the data, which provides true-to-life values to the user. These simulated measured values are used to calculate derived parameters and pre-set arrays provide wave form data in the proper format. Device events and trips can be interjected by the user and properly interpreted by the simulator. The data is passed to the clients via DDE.

Abstract: In one embodiment, the present invention provides a method for estimating the maximum power consumed in a microprocessor or other architecture, at an architectural level, prior to implementation. A functional model represents the architecture at a high level of abstraction. In one embodiment, the model is written in SystemC. In one embodiment, power consumption is expressed power weights, derived by reference to architecture technology. In one embodiment, a method of estimating power consumption prior to implementation operates by modeling a benchmark, compiling it into an instruction stream, assigning power weights for each stage of each architectural function, running the model in a maximum power consumption mode, and summarizing the resulting power consumption. In one embodiment, a PERL script compiler is used. In one embodiment, the power weights are calculated corresponding to the characteristic architecture technology. In one embodiment, a power virus program runs the model in the maximum power mode.

Abstract: The method according to the invention is based on a configuration model of a part of an electrical power distribution network, describing a totality of possible configurations of appliances. The configuration model is used to systematically produce (2) all the possible configurations which satisfy a predetermined set of functional requirements, in which case each possible configuration may have at least one associated characteristic value, and a solution configuration is defined which optimizes this characteristic value.

Abstract: A computer program product for simulating the performance of an electrical power system. The computer program product consists of a computer-readable medium containing an electrical power system model module, an input module and a simulation engine. The electrical power system model module contains one or more electrical power system models consisting of interrelated blocks and connections. The blocks represent elements comprising electrical circuits, electromechanical devices, and measurement devices, and the relationships between said blocks and said connections in said model are read-only with respect to an end user. The input module is operable on a computer to allow an end user to specify at least one characteristic for at least one said block in said model. The simulation engine is operable on a computer to simulate the performance of an electrical power system represented by the model using the specified block characteristics.

Abstract: A power consumption calculating apparatus includes a power consumption library unit storing a power consumption consumed in at least one logical primitive of a logic circuit at a time of transiting a state of the logical primitive in correspondence with an identifier provided for a combination of input signal states and a load capacitance; a logic circuit information storing unit storing information of a structure for the logical primitive and of a connection state between the logical primitives; a capacitance storing unit storing information for the load capacitance estimated in response to the logic circuit information; an input signal type storing unit storing information of input signal type in the logic circuit; a logical simulation unit carrying out a logical simulation with use of the logic circuit information and the input signal type information to determine state-transited information with the identifier used; and a power consumption calculating unit collecting the identifier obtained from a result

Abstract: A system and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model. In one embodiment, a method for determining the decoupling capacitors for a power distribution system includes creating a model of the power distribution system using circuit simulation software, such as SPICE. The power distribution system model includes a plurality of cells interconnected at predetermined nodes. The method then selects one or more decoupling capacitors for the power distribution system. The decoupling capacitors are represented in the power distribution system model by a capacitor model, which is a mathematical model of an electrical circuit. The electrical circuit upon which the capacitor model is based is a ladder circuit. Following the selecting of the decoupling capacitors, the power distribution system model is update based on the selections, and operation of the power distribution system is then simulated.

Abstract: A system and method for modeling the power consumed by a logic cell in a computer controlled power estimation process estimating the power consumed for an integrated circuit represented by logic cells and connections between cells. The present invention models power consumption within a logic cell associated with a particular designated pin (output, internal, or bidirectional) based on which input (or internal or bidirectional) pin transitioned causing the designated pin to transition. This is referred to as path dependent power modeling. A different power consumption value can be provided for each different modeled transition. The logic cells and the power consumption model for them are stored in a logic cell “library” within the computer system. Path dependent power modeling of the present invention allows library designers to specify a different set of power values depending on which pin transition (e.g., input pin) caused the designated pin to transition.

Abstract: The present invention relates to a logic simulation method, in which a signal is switched between two logic states to simulate a transition of a real signal. The method comprises the step of inserting between the two logic states of the signal an intermediate state for a time interval indicative of the slope of the transition of the real signal.

Abstract: A low-complexity, high accuracy model of a CPU power distribution system has been developed. The model includes models of multiple power converters that input to a board model. The board model then inputs to a package model. Finally, the package model inputs to a chip model. The model provides a high degree of accuracy with an acceptable simulation time.

Abstract: Characteristics of a plasma contained in a reaction chamber of a plasma reactor are determined by first computing plasma characteristics for each of a plurality of cross-sections of the reaction chamber, and then generating a generalized model of the plasma from the computed plasma characteristics for the plurality of cross-sections, for example, by averaging the computed plasma characteristics for the cross-sections. The plasma reactor may comprise a plurality of magnets that move with respect to the reaction chamber, such as in a dipole ring magnet (DRM) plasma reactor, and each of the plurality of cross-sections may include an axis of rotation about which the magnets rotate. Plasma characteristics for each the cross-sections of the reaction chamber may be computed by computing electron density and temperature using a Monte Carlo computational procedure and computing ion and neutral species transmission phenomena from a plasma dynamics simulation, e.g.

Abstract: An activity-support instructional system includes: (1) operation monitor and control means (A) for entering process condition signals from plural pieces of equipment constituting a plant on an identifying means basis uniquely provided on each piece of the equipment to monitor and control each piece of equipment; (2) a computer-assisted instructional system unit (B) having instructional information entered and configured therein, the instructional information being related to the above equipment and other equipment to be used in general plants; and (3) mediating means (C1) which links individual pieces of equipment monitored and controlled by the operation monitor and control means (A) with the instructional information of the computer-assisted instructional system unit (B), the information being related to the individual pieces of equipment on the basis of the identifying means, and which is capable of selecting, unarchiving and displaying necessary instructional information on the individual piece of equipme

Abstract: A model-based method for designing an oscillation damping device and an installation having such an oscillation damping device are provided. Oscillation damping devices for turbogenerators in gas and/or steam power plants serve the purpose of reducing power oscillations which occur. Such a device can be designed on the basis of a model. A physical linear model is used and a differentiating effect is taken into account when designing for improving a damping response, thus ensuring that an output signal of the oscillation damping device is zero in a steady state.

Abstract: There is disclosed and claimed herein apparatus and a method for testing an electronic circuit breaker having separable contacts and arc fault and/or ground fault interrupting capability responsive to differential currents in the line and neutral conductors, wherein the circuit breaker under test is connected in a test circuit, comprising the steps of: supplying operating power to the source terminals of the circuit breaker wherein the test circuit provides for connecting the neutral conductor source terminal to a ground in the test circuit; coupling testing signals from a test generator in the test circuit to the neutral conductor load terminal of the circuit breaker; and monitoring the condition of the separable contacts in the circuit breaker during the supply of testing signals to the neutral conductor load terminal.

Abstract: A multi-mode modular pulse-width-modulator capable of outputting low-speed and high-speed control signals is presented. The operation of the modulator is determined by parameters that are stored within the modulator and provide for high-speed updating and control capability in response to changes in voltage or current. In one mode, an update and control signal is generated based on timing parametric data stored in a local memory. In a second mode, an update and control signal is generated based on timing parametric data that provided by an external input device. Furthermore, control variables are also stored locally which control the position of switches, which alter signal paths within the modulator.

Abstract: A system and method for designing a low power ASIC using weighted net toggle information. In particular, the system and method includes a simulation system that executes a set of application test suites that is representative of the code that will likely run on the ASIC and weights each of the applications. The weighted net toggle information can then be evaluated and utilized to modify the ASIC design.

Abstract: A system and method for using a computer system to determine the desired decoupling components for stabilizing the electrical impedance in the power distribution system of an electrical interconnecting apparatus, including a method for measuring the ESR for an electrical device, a method for determining a number of desired decoupling components for a power distribution system, and a method for placing the desired decoupling components in the power distribution system. The method creates a model of the power distribution system based upon an M×N grid for both the power plane and the ground plane. The model receives input from a user and from a database of various characteristics for a plurality of decoupling components. The method determines a target impedance over a desired frequency range. The method selects decoupling components. The method determines a number for each of the decoupling components chosen.

Abstract: A unique transistor model and methods for analyzing the model are disclosed. The transistor model of the present invention is simple and requires specification of a minimal number of parameters to simulate transistor operation. Three analysis methods are disclosed, each having unique circumstances for application A first method is premised on sampling all waveforms in the circuit and determining the operating point of the transistor. The first method assumes an input of an arbitrary periodic waveform. The first method is very flexible and may be used with a wide range of models other than the disclosed model. A second and a third method are premised on input and output waveform clipping. The second method assumes a single tone input into the transistor. The third method is a combination of features from the first and second methods. The third method is computationally efficient and assumes an arbitrary periodic input waveform.

Abstract: A system and method of adjusting the logic synthesis process of the design of an integrated circuit takes into account the interaction between the IC core logic circuitry, the on-chip power supply circuitry, and the package power supply circuitry. In IC package/circuit technology combinations that have been employed in previous IC designs, the associated package and on-chip power supply circuit designs are stable and well-defined, thus allowing the generating of simulation models for those power supply circuits. Those models are used to identify resonant frequencies and other characteristics of the power supply circuitry. By using the identity of the power supply resonant frequencies and the power supply models themselves, design constraints are developed that are supplied as input, either directly or indirectly, to the logic synthesis process to avoid incompatibilities of a periodic and non-periodic nature between the IC core logic and the power supply circuitry.

Abstract: One embodiment of the invention provides an electric power generation system. The system includes an electric power generator. A second electric meter is connected to the power generator and an electric power consumer. The second meter measures electric power generated by the power generation system. A first electric meter is connected to an electric power distribution line. The power line supplies electric power from an electric grid and receives surplus power from the power generator. Thus, the first meter measures a net electric power provided to the electric power consumer through the electric power line.

Abstract: Electronic evaluation means are provided within the electronic circuit so as to deliver an indication of the operating conditions of the electronic circuit, which indication is used to adjust the power supply voltage to a minimum value at which said electronic circuit can still operate correctly.

Abstract: An apparatus and method for determining power consumption in logic devices including mixed static and dynamic logic blocks is implemented. Input logical signals are tagged as having dynamical behavior or static behavior, and the power consumption of the logic block determined according to the behavior of the input signal. If an input signal has dynamic behavior, an output signal making a transition in response thereto will make two transitions per clock cycle, and the per cycle power consumption of the logic block is accordingly weighted. In another embodiment, a Boolean behavior signal is calculated for each block from clock phase tags and “one cycle per cycle” circuit level simulations. The per cycle power consumption of each logic block receives a weight in response to the Boolean behavior signal, according the behavior of the block characterized thereby.

Abstract: A logic circuit determines the power consumption of a semiconductor integrated device by taking into consideration the variation of the rate of operation. A control signal (TEST) is applied to each control signal input port (Tin) of flip-flop circuits of flip-flop circuit groups and a logic gate circuit having a plurality of input ports A and B in a combined circuit group. If the control signal (TEST) is low, both the flip-flop circuits and the logic gate circuit operate normally. However, if the control signal (TEST) is high, each of them performs the power consumption test. Regardless of the value of input signals applied to input ports D1 and D2 of the flip-flop circuits, the flip-flop circuits are controlled to have a repetitive output signal of high and low levels at ports Q1 and Q2, in synchronism with a clock signal.

Abstract: A method, system and computer program product for automatically determining optimal design parameters of a subsystem to meet design constraints. The subsystem comprises a plurality of circuits. The optimal design parameters are determined by performing a parameter-delay curve optimization of the subsystem design parameters. Specifically, an embodiment of the present invention provides a method and/or computer program product for determining optimal values for the design parameters of a circuit block, which result in optimally assigned delay targets for datapath blocks at the minimum power/area point. The problem/solution space is extended to solve the problem of figuring out the best possible implementation, for example, static vs dynamic, for each datapath block. Based on parameter functions, which relate to the design parameters for circuits in the circuit block, the design parameters are optimized to satisfy the design constraints.

Abstract: Power consumption of an LSI chip is estimated at the beginning stage of the designing without using the HDL description. An I/O part power of a new designing LSI chip is calculated by an equation with using the outside specifications required by the application of the LSI chip. An I/O part power of an original LSI chip is calculated by the outside specifications, the core circuitry part power of the original LSI chip is calculated by subtracting this calculated I/O part power of the original LSI chip from the known total power of the original LSI chip, and converting the voltage and process and frequency, the core circuitry part power of the new designing LSI chip is calculated.

Abstract: A method for assessing the reliability of an electrical power distribution system begins with identifying each element of the electrical power distribution system, and establishing characteristic data for each of these elements. The characteristic data at least identifies one operating characteristic of the element and further identifies interconnections of that element to other elements in the system. Next, at least one “minimum cut” is determined separating a first system element from a second system element, e.g., a power source from a load. The minimum cut is at least based upon the interconnection data. At least one third element is then identified, located on the minimum cut, and the reliability may then be assessed by evaluating the characteristic data of the at least one third element.

Abstract: A method for power net analysis of integrated circuits is provided. A circuit simulator determines current values for integrated circuit devices at specified supply voltages. A power net simulator uses the current values to calculate characteristics of the power net. The characteristics include voltage drop, current density and ground bounce. A layout representation of the power net is shown on a computer display along with the user-specified characteristics.

Abstract: A test system for functionally testing disk drives over a wide range of power conditions. The system simulates the power conditions using a computer controlled system architecture featuring several major components. The first of these components is a computer enhanced with features allowing the computer to communicate with disk drives having either IDE or Small Computer System Interface (SCSI) formats. The computer communicates with a second component termed the programmable power supply (PPS) and a third component having simulation circuitry termed universal power simulator, or UPS. The computer uses a combination of hardware and software to create simulated power conditions which are used to test the disk drives for correct operation and to glean out defective drives. The UPS is responsive to control signals from the host computer and the PPS and sends simulated power signals to the disk drives under test.

Abstract: The present invention includes methods of increasing the power handling capability of a power line. One method of the present invention includes providing a conductor configured to transmit energy intermediate plural locations; supporting the conductor at a plurality of positions intermediate the locations, the supporting at a plurality of positions defining a plurality of spans of the conductor; creating a model of the conductor; identifying a critical span; altering the modelled conductor responsive to the identifying; and analyzing the modelled an conductor following the altering.

Abstract: A method is disclosed including a software routine for simulating and designing an electrical power distribution system, wherein the assembly of terminal blocks or modules is displayed on a computer screen as being mounted on a mounting rail. More particularly, instead of being illustrated graphically, the terminal blocks and modules are displayed in the form of a data structure constructed from a plurality of virtual token elements mounted on a support rail.

Abstract: The invention refers to a device for monitoring the application of a neutral electrode in unipolar HF surgery, having an impedance sensor with a resonant circuit comprising a secondary coil of a transformer and HF input capacitors of preferably two partial electrode surfaces. The impedance sensor detects the transient impedances of two partial electrode surfaces connected in series with the patient's tissues by application of a patient auxiliary current and is moderated by the transition impedances. The invention is characterized in that the resonant circuit is excited by alternating voltages of variable frequencies in the range of a resonant frequency, and in that a peak value detector is provided which detects an alternating voltage peak value at the resonant frequency. The disclosed device excites the resonant circuit in such a manner that a faultless measurement of the transition impedance at the level of the patient's tissues is made possible.

Abstract: Disclosed is a power decoupling circuit generating system and method capable of easily generating a power decoupling circuit for each device such as an LSI. On the basis of information regarding parameters of generating a power decoupling circuit held in a capacitor parts library and a line calculation parameter file, a power decoupling circuit of a &pgr;-type low pass filter construction having first and second decoupling capacitors to be added to a power supply terminal of a device as a target from which high frequency noise is prevented from being passed to a power plane and a power line corresponding to an inductance is automatically generated by a power decoupling circuit generating unit, thereby making calculation for generating the power decoupling circuit unnecessary.

Abstract: A system and method for modeling power consumed by a logic cell in a estimation process over an integrated circuit, represented by logic cells and connections between cells, using a three dimensional power modeling table (3-D power table). The 3-D power table utilizes dual output capacitance indices and a single input transition time (which can be a weighted average input transition time) index. Each 3-D power table of the present invention includes a set of index reference points for the first output capacitance index, a set of index reference points for the second output capacitance index, a set of index reference points for the input transition time, and a set of power reference points that correspond to the above index reference points. For a given set of values input for: (1) the first output capacitance index; (2) the second output capacitance index; and (3) the input transition time index, linear interpolation is performed across the three indices to arrive at the given output power consumption value.

Abstract: A simulation model for a digital system comprises a number of functional units, interconnected by a number of interface units for transmitting messages between the functional units. Each interface unit includes a mechanism for automatically composing and decomposing messages into higher and lower levels of design. The interface thus provides a general mechanism which allows units at any level to communicate with units at any other level, for mixed-level modelling.

Abstract: A system and method are described for providing state dependent power consumption characterization data for a logic cell and for minimizing characterization time in a computer controlled power estimation process. The present invention identifies power-equivalent states of the logic cell, and selects one of the power-equivalent states to be characterized. Characterization data produced is then shared among other power-equivalent states. In one embodiment of the present invention, power-equivalent states of a cell are identified by a transition pattern of the inputs and output of the logic cell. Particularly, transitions which result in similar input and output transition patterns are considered power-equivalent states. Because only a single simulation run is carried out for a plurality of power-equivalent states, simulation time is saved significantly.

Abstract: A method and apparatus is described which enables a user to analyze an electrical design utilizing a computer. The elements of the electrical design are described at a register transfer level. Embodiments of the invention are described which allow the user to enter the elements described at the register transfer level and estimate the power consumption of portions or all of the electrical design.

Abstract: In an illustrative embodiment, the AC power line network simulator includes an enclosure for containing elements of the system. An AC coupling network coupled to the network simulator implements the functions relating to a particular simulation. A distribution panel connected to a power feed distributes power and includes outgoing circuits and circuit breakers for protecting the outgoing circuits. A plurality of outlets are connected to the breakers of the panel. Through the use of the simulator, with the AC coupling network, simulation of an AC power line network, such as measuring electrical signals, recording electrical signals, simulating electrical signals and inserting electrical signals, can be easily performed. The measured, recorded, simulated and inserted signals correspond to electrical characteristics of elements found in an AC power line network, and can be stored for later analysis. In addition, once simulation information has been stored, it can be reproduced as desired.

Abstract: A computer implemented method for simulating a resistive circuit, including a plurality of macro circuits that are arranged hierarchically. The method includes the steps of reading a netlist description of the resistive circuit and recursively traversing the resistive circuit starting from terminal nodes of a macro circuit at a highest level of hierarchy using precharacterizations of each of the plurality of macro circuits to determine node voltages and branch currents of the resistive circuit.

Abstract: A power simulation system comprises a tracing unit for receiving an instruction sequence of an object program and generating trace information of the object program, a stall information detecting unit for receiving the trace information generated by the tracing unit and then detecting stall information of the object program, and a power consumption calculating unit for calculating a power consumption value required for the object program based on a power consumption library with regard to the stall information by use of the stall information detected by the stall information detecting unit, whereby power information with regard to stall can be obtained.

Abstract: A process (20) and design tool (62) are presented for the accurate prediction of design parameters (42) for components (38) of an integrated circuit (22) during the early stages of the design of that integrated circuit (22). These predicted design parameters (42) include pin count parameters (50), propagation delay parameters (52), layout area parameters (54), dynamic power parameters (56), static power parameters (58), and total power parameters (60). With these parameters, the designer interactively modifies the design prior to the layout and prototyping of the integrated circuit (22). The dynamic power parameters (56) and total power parameters (60) may be repetitively predicted with differing input items to establish a power usage pattern for the integrated circuit (22).

Abstract: In a delay-power-source-coefficient determining step, a drain saturation current in a P-channel MOSFET is calculated on the basis of specified operating power-source voltage data and of saturation-current parameters such as the mobility of carriers and the thickness of a gate oxide film based on said specified operating power-source voltage data. Thereafter, a ratio of a drain saturation current in the P-channel MOSFET when a reference power-source voltage is applied thereto to the drain saturation current in the P-channel MOSFET when an operating power-source voltage is applied thereto, thereby determining a delay power-source coefficient. Next, in an effective-delay calculating step, effective-delay calculating means multiplies a delay time when the reference power-source voltage calculated by the delay calculating means is applied thereto by the delay power-source coefficient calculated by delay-power-source-coefficient determining means to determine a delay time at the operating power-source voltage.

Abstract: In a circuit simulation method, circuit information of an electronic circuit to be simulated is inputted, and whether or not a linear circuit element circuit included in the electronic circuit is passive, is discriminated. For this discrimination, an inductance matrix of the electronic circuit is prepared, and, before a circuit analysis by a circuit simulator, whether or not the inductance matrix is a positive definite is discriminated by obtaining and checking the value of minor determinants of the matrix, and by determining that the circuit is passive if the values of the diagonal items in the matrix are positive definites, and that the circuit is not passive if at least one of the values of the diagonal items in the matrix is not a positive definite. In the latter case, from information of the minor determinants, additional information indicating a cause for non-passivity is derived and outputted.

Abstract: A synchronous machine simulator and a method of simulation convert real three-phase instantaneous voltage values into spiral vectors and calculate a positive-sequence component current based on the conversion results, to obtain real instantaneous values of a three phase current flowing in the synchronous machine.