Power System Patents (Class 703/18)
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Patent number: 7006962Abstract: A method and system for predicting delay of a multi-million gate sub-micron ASIC design is disclosed. The method and system include automatically partitioning a netlist into at least two logic cones, and running respective instances of a delay prediction application on the logic cones on at least two computers in parallel.Type: GrantFiled: November 29, 2001Date of Patent: February 28, 2006Assignee: LSI Logic CorporationInventors: Saket Goyal, Santhanakrishnan Raman, Prabhakaran Krishnamurthy, Prasad Subbarao, Manjunatha Gowda
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Patent number: 7000214Abstract: A method for designing an integrated circuit having multiple voltage domains, including: (a) generating a logical integrated circuit design from information contained in a high-level design file, the high-level design file defining global connection declarations and voltage domain connection declarations; (b) synthesizing the logical integrated circuit design into a synthesized integrated circuit design based upon the logical integrated circuit design, information in a preferred components file and information in a voltage domain definition file; (c) generating a noise model from the synthesized integrated circuit design based on information in the voltage domain definition file and a design constraint file; and (d) simulating the noise model against constraints in the design constraint file and constraints in a circuit level profile file to determine if the synthesized integrated circuit design meets predetermined noise simulation targets.Type: GrantFiled: November 19, 2003Date of Patent: February 14, 2006Assignee: International Business Machines CorporationInventors: Joseph A. Iadanza, Raminderpal Singh, Sebastian T. Ventrone, Ivan L. Wemple
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Patent number: 6996511Abstract: A two-dimensional mesh is generated on a plane perpendicular to the rotation axis. At this time, a ring-shaped gap is provided between the rotor and the stator, and portions facing the ring-shaped gap are equally divided into the same number of parts. An initial three-dimensional mesh is generated by joining together a plurality of two-dimensional meshes in the direction of the rotation axis while rotating the two-dimensional meshes. A boundary surface is formed in a cylindrical gap composed of a stack of the ring-shaped gaps, and a three-dimensional mesh is generated by filling the cylindrical gap with a plurality of polyhedrons, including polyhedrons comprising each of surface elements constituting the stator-side mesh surface, rotor-side mesh surface and boundary surface as one face.Type: GrantFiled: September 6, 2002Date of Patent: February 7, 2006Assignee: The Japan Research Institute, LimitedInventors: Koji Tani, Tetsuo Ogawa
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Patent number: 6961690Abstract: The present invention provides a method and mechanism for simulating complex digital circuits using hybrid control and data flow representations. Specifically, the invention provides a method of controlling the simulation of a digital circuit in such a way that desired functions are annotated for subsequent analysis. A hardware design code describing the digital circuit is converted to an assignment decision diagram (ADD) representation that is then annotated with one or more control nodes that are used for maintaining control flow through a simulator. In this way, one or more break points are created that allow the simulator to stop at associated points in the simulation.Type: GrantFiled: March 24, 1999Date of Patent: November 1, 2005Assignee: Altera CorporationInventors: David Karchmer, Daniel S. Stellenberg
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Patent number: 6952648Abstract: Systems and methods for determining a power disruption index indicative that provides subscribers with a forecast of weather conditions that are likely to cause interruptions to power distributions systems within their specific areas of service. The Power Disruption Index (PDI), is a calculation of a number of forecast weather parameters including severe thunderstorm probabilities and intensities, wind speeds, wind gusts, and snowfall and ice accretion. The index combines each of these input parameters with a specific weighting based on the forecast intensity of each of the parameters, along with alert threshold criteria provided by each client utility. The output PDI is a forecast of local weather conditions for a specific local service area or power distribution network.Type: GrantFiled: December 22, 2003Date of Patent: October 4, 2005Assignee: WSI CorporationInventors: James Lee Menard, Stephen Anthony Massa, John Gerard Bosse, Paul Douglas Drewniak
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Patent number: 6937971Abstract: A system and method for determining the desired decoupling components for a power distribution system having a voltage regulator module. The system may employ a mathematical model of a voltage regulator circuit, such as a switching voltage regulator. The mathematical model may be a SPICE model, or a circuit model in another format. The method may include simulating the operation of the power distribution system to obtain a estimate of the bulk capacitance required for effective decoupling. For digital systems, the method may include a cycle-by-cycle simulation of the power distribution system, wherein the simulation occurs over a number of clock cycles. The performance of the power distribution system may then be analyzed for each simulated clock cycle. The simulation may also include analyzing the transient responses and loop stability of the power distribution.Type: GrantFiled: July 25, 2000Date of Patent: August 30, 2005Assignee: Sun Microsystems, Inc.Inventors: Larry D. Smith, Raymond E. Anderson, Tanmoy Roy
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Patent number: 6931369Abstract: A method and apparatus for thermally simulating a circuit over a network is provided. Techniques are provided for designing a circuit that satisfies user-specified functional requirements received over a network. Based on the specified requirements, components and a topology for constructing the circuit are automatically determined. The components determined during this operation have operational values such that, when the components are arranged according to the topology to form the circuit, the circuit satisfies the user-specified functional requirements. One or more web pages that identify the components are then delivered to the browser over the network. The component and topology information may be used to generate a schematic diagram that is delivered in a web page to the user over the network. The user may thermally simulate the designed circuit. Many characteristics of the board may be adjusted to provide an accurate thermal simulation.Type: GrantFiled: May 1, 2001Date of Patent: August 16, 2005Assignee: National Semiconductor CorporationInventors: Jeffrey Robert Perry, Martin Garrison, Rex L. Allison, III, Richard Levin, Phil Gibson, Vandana A. Sojrani, Khang Nguyen, Wanda Carol Garrett, John D. Perzow
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Patent number: 6925429Abstract: An electric wiring simulation device 1 of the present invention includes an input device 2; a display 5; a characteristics information data base 4 storing parts information on parts and wirings, discharge characteristics of a power supply, current-prearcing time characteristics of protecting parts and current-smoke time characteristics of the wirings; an assigned path searching unit 11 searching an assigned path between a short-circuit point and the power supply on a test object circuit; a current value calculating unit 12 calculating a resistance value on the assigned path based on the parts information, and calculating a short-circuit value based on the resistance value and the discharge characteristics of the power supply; and a judging unit 13 judging whether or nor each protecting part is fused or etch wiring smokes based on the current-smoke time characteristics and the current-prearcing time characteristics, at unit time intervals.Type: GrantFiled: July 3, 2001Date of Patent: August 2, 2005Assignee: Yazaki CorporationInventor: Yasuo Iimori
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Patent number: 6922661Abstract: The process is intended to optimize the operation of a digital protection system for protecting sets of busbars in the power station and uses a basic schematic of the electrical configuration of the power station obtained from information on the type of components used in the power station, and on the possible connections and accesses to said components. The information is assigned to management units of the digital protection system, said management units comprising peripheral measurement units and at least one centralization unit. A topological compilation process is implemented to provide a compiled schematic topology, and to provide a compiled assignment topology of the components in the power station and of their connections to the management units. A partial graph, whose structure depends on the type of information searched for and the status of each component of the power station, is obtained for each peripheral unit.Type: GrantFiled: November 16, 2001Date of Patent: July 26, 2005Assignee: AlstomInventor: Jean-Jacques Carrillo
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Patent number: 6901565Abstract: A system for analyzing the power consumption of a behavior description of an electrical design includes a structural element library including a set of technology-independent structural macro elements, a macro power model module providing macro power models for one or more of the structural macro elements in the structural element library, and a power estimation module providing a power consumption value of the electrical design using a netlist of interconnected components representative of the electrical design, and the macro power models. The macro power models are associated with corresponding power models in a user-specified gate-level power model library. The power analysis system enables behavior level or RTL power analysis using a user-specified gate-level cell power model library containing arc-based or pin-based power model descriptions or both.Type: GrantFiled: May 27, 2003Date of Patent: May 31, 2005Assignee: Sequence Design, Inc.Inventor: Serguei A. Sokolov
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Patent number: 6895373Abstract: A system and method provide a computer-based automated tool for quickly and efficiently designing utility stations. One example of such a utility station is a unit substation. The tool includes a database of user-selective predrawn symbols that are associated with a pre-defined and stored station template. Each of the respective symbols have associated therewith attributes that are computer recognizable as being attributes associated with the respective symbols, and may be combined into a list, when the symbols are selected for use with the station. The tool presents a graphical rendering of the symbols arranged on the station, after the respective symbols have been identified.Type: GrantFiled: October 30, 2001Date of Patent: May 17, 2005Assignee: Public Service Company of New MexicoInventors: Gathen Garcia, Gene Wolf, Chris Hickman
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Patent number: 6885915Abstract: The method according to the invention is based on a configuration model of a part of an electrical power distribution network, describing a totality of possible configurations of appliances. The configuration model is used to systematically produce (2) all the possible configurations which satisfy a predetermined set of functional requirements, in which case each possible configuration may have at least one associated characteristic value, and a solution configuration is defined which optimizes this characteristic value. It is thus possible to produce an optimum configuration automatically, without any need for expert knowledge about the appliances used in the configuration. In one preferred embodiment of the invention, a simulation model for simulation of a technical response of the solution configuration is produced automatically (3).Type: GrantFiled: June 5, 2002Date of Patent: April 26, 2005Assignee: ABB Research LTDInventors: Christian Rehtanz, Dirk Westermann, Peter Bosshart
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Patent number: 6871172Abstract: Method and apparatus for determining power dissipation for an integrated circuit using computer simulation is described. More particularly, the integrated circuit is divided into cells, and one or more nodes are identified within each of the cells. A capacitive load value is ascribed to each of the nodes, and code is generated to track charges in state of each of the nodes. A total for changes in state for each node is divided by simulation time to determine a switching frequency. Using switching frequency, capacitive load and source voltage, dynamic power dissipation for each node may be determined. By summing dynamic power dissipation for all said nodes, total dynamic power dissipation may be determined.Type: GrantFiled: January 22, 2001Date of Patent: March 22, 2005Assignee: Xilinx, Inc.Inventor: Lester Sanders
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Patent number: 6868374Abstract: A method and system for testing the compliance of a distribution of I/O circuits in a semiconductor chip with voltage (IR) and electromigration (EM) limits. Maximum and average currents for the I/O circuits are calculated. A resistance model for the power distribution network of the chip is created, and the I/O circuit currents are indexed to corresponding nodes in the resistance model. Average current demand of the logic circuitry of the chip is also calculated and indexed to nodes in the resistance model. The resistance model with indexed currents is then solved to determine voltages at the nodes. The voltages are checked for compliance with IR and EM limits, and a report is produced. If violations of the IR and EM limits are detected, the placement of the I/O circuits in the power distribution network may be revised to bring the design into compliance with IR and EM requirements.Type: GrantFiled: October 3, 2000Date of Patent: March 15, 2005Assignee: International Business Machines CorporationInventors: Gary S. Ditlow, Robert A. Proctor
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Patent number: 6865526Abstract: A method for reducing power consumption by using power estimation data obtained from at the gate-level for a core's representative input stimuli data (instructions), and propagating the power estimation data to a higher (object-oriented) system-level model, which is parameterizable and executable. Depending on the kind of cores, various parameterizable look-up table techniques are used to facilitate self-analyzing core models. As a result, the method is faster than gate-level power estimation techniques and power-related system-level design decisions.Type: GrantFiled: January 24, 2000Date of Patent: March 8, 2005Assignees: University of California-Riverside, NEC CorporationInventors: Jörg Henkel, Tony Givargis, Frank Vahid
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Patent number: 6856148Abstract: A method for evaluating a power distribution network for a circuit has steps of creating a circuit model of the circuit in which all wires and transistors are represented as circuit elements, with the model comprising a plurality of nodes. A DC power analysis is performed on the circuit model to determine voltage drops at a plurality of the nodes.Type: GrantFiled: March 8, 2002Date of Patent: February 15, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventor: Paul Robert Bodenstab
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Patent number: 6850878Abstract: A system and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model. In one embodiment, a method for determining the decoupling capacitors for a power distribution system includes creating a model of the power distribution system using circuit simulation software, such as SPICE. The power distribution system model includes a plurality of cells interconnected at predetermined nodes. The method then selects one or more decoupling capacitors for the power distribution system. The decoupling capacitors are represented in the power distribution system model by a capacitor model, which is a mathematical model of an electrical circuit. The electrical circuit upon which the capacitor model is based is a ladder circuit. Following the selecting of the decoupling capacitors, the power distribution system model is update based on the selections, and operation of the power distribution system is then simulated.Type: GrantFiled: April 24, 2001Date of Patent: February 1, 2005Assignee: Sun Microsystems, Inc.Inventors: Larry D. Smith, David Hockanson
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Patent number: 6842727Abstract: A technique for effectively attenuating EMI noise, which is generated from the electric power system of semiconductor devices, is described. In accordance with the technique, a power supply netlist with an additional electric current source(s) is generated by adding block power supply current waveform data, as extracted from test vector data and a block netlist, to the power supply netlist as extracted from the layout data of the circuit under analysis. A circuit simulation of the power supply netlist with an additional electric current source(s) is then performed in order to calculate power supply current/voltage waveform data. Furthermore, current/voltage spectral data is calculated by the Fourier transformation of the power supply current/voltage waveform data followed by displaying the current/voltage spectral data as the result of the Fourier transformation.Type: GrantFiled: December 3, 1999Date of Patent: January 11, 2005Assignee: Kabushiki Kaisha ToshibaInventor: Sachio Hayashi
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Publication number: 20040267513Abstract: A design for a high or medium voltage power transmission network is created automatically. The network comprises a plurality of subsystems that are classifiable as switchgear, transformers, transmission lines, or network controllers such as compensators, where each subsystem comprises a plurality of components, where components exist in different embodiments having different technical and economical characteristics, and where the design comprises, for each subsystem, a selection of components such that the subsystem satisfies given technical and financial criteria.Type: ApplicationFiled: August 14, 2003Publication date: December 30, 2004Applicant: ABB Technology AGInventors: Dirk Westermann, Antonio Carvalho, Paula Rios, Marta Lacorte, Mohamed Rahmani, Peter Bosshart
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Patent number: 6832180Abstract: A method for minimizing noise in an integrated circuit is described, the method including choosing a net to be analyzed, determining that the total path length of conductive paths coupled to a driver within the net exceed a maximum acceptable length for that given driver according to the minimum acceptable noise levels for that given net, and inserting at least one buffer within the net at a position which is within the maximum acceptable length for conductive paths coupled to the driver.Type: GrantFiled: October 29, 1999Date of Patent: December 14, 2004Assignee: Sun Microsystems, Inc.Inventors: Massimo Sutera, Alan Smith
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Publication number: 20040243376Abstract: One embodiment of the present invention is a method for estimating a power requirement of a circuit design that includes steps of: (a) selecting a set of targeted Energy Arcs and/or Power Arcs; (b) creating one or more circuit states using the set of targeted Energy Arcs and/or Power Arcs; (c) back-tracing the one or more circuit states over one or more simulation clock cycles to form a start circuit state and a stimulus segment; (d) simulating the stimulus segment in forward time progression and determining which Event Arcs in Energy Arcs and/or which Condition Arcs in Power Arcs are satisfied at each stimulus clock cycle; and (e) recording data at each stimulus clock cycle that is utilized to estimate the power requirement.Type: ApplicationFiled: June 2, 2003Publication date: December 2, 2004Applicant: V-Cube Technology Corp.Inventor: Maddumage D. G. Karunaratne
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Publication number: 20040243377Abstract: A method for determining a power flow in a distribution network includes the step of determining an admittance matrix for a circuit that includes a floating transformer in an electrical power distribution system. The admittance matrix includes an admittance of a fictitious shunt connected between a non-grounded winding of the floating transformer and ground. The method also includes the step of obtaining real time power measurements from a portion of the electrical power distribution system including the floating load transformer. The method further includes solving the power flow using the admittance matrix and the real time power measurements.Type: ApplicationFiled: December 18, 2003Publication date: December 2, 2004Inventor: Ilya Roytelman
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Publication number: 20040236560Abstract: An indication of power for one or more units of a circuit design are determined based on functional verification data. The functional verification data can be generated for input vectors applied to a representation of the circuit design to functionally verify operation of the design.Type: ApplicationFiled: May 23, 2003Publication date: November 25, 2004Inventor: Thomas W. Chen
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Publication number: 20040236559Abstract: An indication of power associated with one or more power consuming units of is determined based on simulation data. The simulation data can be generated over a plurality of testcases. A Bayesian-based statistical model utilizes the simulation data to estimate a parameter indicative of power associated with the one or more power consuming units. A corresponding indication of power is computed based on the estimated parameter.Type: ApplicationFiled: May 23, 2003Publication date: November 25, 2004Inventor: Thomas W. Chen
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Publication number: 20040225486Abstract: A system for generating a resultant model for a particular generation or transmission power system is described, illustrated and claimed. The system involves a new and novel method that combines scenarios and their probabilities to estimate the areas of possible congestion, the expected values of congestion contracts, locational marginal prices, and scenario specific generation and transmission expansion plans as well as other relevant outcomes. One embodiment of the present invention is a model that develops multiple generation and transmission scenarios.Type: ApplicationFiled: May 8, 2003Publication date: November 11, 2004Inventors: Vance Condary Mullis, Nader Shariat Moharari
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Publication number: 20040225487Abstract: A power supply noise analysis model generator models power supply layers in circuit boards, and includes: a CAD data obtaining section that obtains CAD data; a CAD data conversion section that converts CAD data into data suitable for noise analysis; a power supply pair extraction section that extracts a power supply pair; a mesh division section that divides a power supply pair region into meshes; a ripple processing section that arranges ripples as wave fronts of electromagnetic waves radiated into the power supply pair region from elements thereon; a node layout section that positions plural nodes on the power supply pair region; a node region determination section that determines node regions; an LRC determination section that determines L, R and C connecting the nodes; a power supply layer model generation section that generates a power supply layer model; and a power supply noise analysis model generation section that generates a power supply noise analysis model.Type: ApplicationFiled: February 26, 2004Publication date: November 11, 2004Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Iwakura, Toshiaki Sato, Kazuyoshi Kanei, Hitoshi Chida, Kotaro Nimura
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Patent number: 6813597Abstract: Method and apparatus for the synthesis of electronic circuits and, more particuarly, to the synthesis of analog circuitry and mixed digital and analog circuitry, and related to the reuse of circuit designer knowledge for the simulation of mixed analog and digital circuitry to determine data points and to curve fit the data points to determine a polynomial equation that closely approximates simulated circuit performance, and related to the parameterization of circuit features with respect to circuit performance.Type: GrantFiled: June 8, 2000Date of Patent: November 2, 2004Assignee: Cadence Design Systems, Inc.Inventor: Michael J. Demler
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Patent number: 6801885Abstract: A method of evaluating a containment building design includes the steps of assembling a first database of test results; selecting models (algorithms) for the design to be evaluated; comparing a first set of test results of the model to test results in the first database of test results; establishing uncertainty boundaries for the first set of test results of the model; assembling a second database of test results; determining whether the test results of the second database are within the uncertainty boundaries of the model; and evaluating an actual or proposed containment building design based upon the model when test results of the second database are within the uncertainty boundary.Type: GrantFiled: October 3, 2000Date of Patent: October 5, 2004Assignee: Westinghouse Electric Company LLCInventor: Robert E. Henry
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Publication number: 20040186703Abstract: A system and method for estimating power consumption of at least a portion of an integrated circuit (IC). The IC is segmented into a hierarchical sub-block level structure such that within each sub-block and between sub-blocks of the same level, power consumption components are identified so that the power consumption for each sub-block may be estimated based on an application of probabilistic activity profiles associated with the power consumption components.Type: ApplicationFiled: March 20, 2003Publication date: September 23, 2004Inventor: Rajakrishnan Radjassamy
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Publication number: 20040176940Abstract: The invention relates to a data processing device, a method and a computer programme for computer-aided substation tendering. Conventional substation tenders rely on by-hand selection of components representing not-preengineered, not-reusable substation parts. Such tenders are inaccurate and time-consuming. In this disclosure a module (2) represents a reusable preengineered substation part and is indexed according to an intuitive multiple-index categorisation system (12), has a standardized name (14) for designating all its related files and for encoding its function in an intuitively understandable, and has a module-descriptor (3) providing standardised information (4-10) to application routines for cost calculation (1a), technical data accumulation (1d), graphics accumulation (1b) and tender text accumulation (1c).Type: ApplicationFiled: February 26, 2004Publication date: September 9, 2004Applicant: ABB Technology AGInventors: Peter Bosshart, Martin Steiger, Gerardus Kieboom, Bruno Buri, Hans-Peter Landert
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Publication number: 20040172232Abstract: A technique for incorporating power information in a register transfer level design involves defining a module representing an integrated circuit block having its own power grid. The integrated circuit block, when in a power off mode effectuated by a deactivation of a clock signal to the integrated circuit, uses a device dependent on a power grid of an adjoining integrated circuit block to preserve output information from the integrated circuit block to the adjoining integrated circuit block.Type: ApplicationFiled: February 28, 2003Publication date: September 2, 2004Inventors: Aninda Roy, Vipul Parikh
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Patent number: 6785633Abstract: A method of determining performance impact of individual components of a power plant on overall thermal performance of the power plant, the method including (a) designing a first thermal model of the power plant using original specification data of the power plant; (b) developing a second thermal model of the power plant from measured performance data of each component of the power plant; and (c) determining the performance impact of a selected component of the power plant on the overall thermal performance of the power plant by substituting design performance data of the selected component in the first thermal model with its measured performance data.Type: GrantFiled: December 28, 2001Date of Patent: August 31, 2004Assignee: General Electric CompanyInventors: John Jacob Patanian, Jason Darrold Gayton
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Publication number: 20040158449Abstract: A system in which a voltage regulator controls the die voltage rather than the socket voltage of a microprocessor is disclosed. The voltage regulator's response time is decreased due to the larger transient of the die voltage, relative to the socket voltage. The variation in socket resistance is no longer a factor affecting voltage and power loss margins. The system is implemented with minimal cost, as the die voltage is already available for use during testing.Type: ApplicationFiled: February 6, 2003Publication date: August 12, 2004Applicant: INTEL CORPORATIONInventor: Henry W. Koertzen
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Patent number: 6775597Abstract: A Security-Constrained Optimal Power Flow (SCOPF) process employing a quadratic programming (QP) primal-dual interior point (IP) solution method. The IP method efficiently solves practical SCOPF problems involving large numbers of contingencies and controls in preventive and preventive/corrective operating modes. An EMS system is described incorporating the inventive SCOPF process. The SCOPF process can be used in a variety of additional arrangements including a locational marginal pricing scheme and a power transmission rights auction system. An infeasibility detection method is also described.Type: GrantFiled: March 19, 1999Date of Patent: August 10, 2004Assignee: Siemens Power Transmission & DistributionInventors: Petar Ristanovic, Oladiran Obadina, Muhamed Aganagic
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Publication number: 20040153303Abstract: A method and system for efficiently simulating an electric power transmission network is disclosed. In the method, a parameterized value is assigned to an element in the network that is present during any time interval of a simulation test period. If an element in the network has changed from a preceding time interval, the network of the preceding time interval is updated by changing the parameterized value for the changed element, and the updated network is simulated. If any element in the network has not changed from the network of the preceding time interval, the network is simulated based on the network of the preceding time interval.Type: ApplicationFiled: December 23, 2003Publication date: August 5, 2004Inventors: Le Tang, Xiaoming Feng
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Patent number: 6772405Abstract: Method and apparatus for an insertable block tile is described. More particularly, a reserved area in an integrated circuit layout is removed, and terminated conductive line information is extracted from a layout database affected by the removal. The terminated conductive line information is used to create extensions or pins of the conductive lines terminated, as well as to identify signals associated with those terminated conductive lines. These physical or layout names and coordinates are mapped and then translated to logic names and coordinates for placement and routing to create the insertable block tile.Type: GrantFiled: June 13, 2002Date of Patent: August 3, 2004Assignee: Xilinx, Inc.Inventors: Andy H. Gan, Nigel G. Herron
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Patent number: 6754616Abstract: A method of simulating the electrical behavior of an ideal transformer. The representation of the ideal transformer is frequency independent and can be used to simulate the behavior of an ideal transformer over the frequency range from DC to infinity. In one embodiment, the ideal transformer is represented as having an input sub-circuit and an output sub-circuit. Each sub-circuit includes a resistor connected in parallel across a current controlled current source. The input current, output current, current sources, and resistances are scaled by a scaling factor representing the turns ratio between the primary and secondary windings of a physical transformer. In the present invention, the current sources are responsible for the current scaling and the resistors are responsible for the impedance scaling. The circuit elements of the representation may be used as the basis for generating a set of input parameters for a circuit emulation program.Type: GrantFiled: January 31, 2000Date of Patent: June 22, 2004Assignee: Fujitsu LimitedInventors: Bidyut K. Sen, James C. Parker, Richard L. Wheeler
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Patent number: 6748572Abstract: Disclosed are a suitable power supply network analyzing method which executes power supply network analysis of a large-scale circuit in a short period of time with fewer computer hardware resources, a computer program which executes the power supply network analyzing method, a storage medium and a power supply network analyzing apparatus. An entire net list is extracted by converting circuit elements to current sources and dividing power supply lines into resistor elements, based on design information and physical information. Next, a portion of the power supply network which includes the current sources and in which the resistor elements are connected in series is selected. A partial net list is extracted to execute circuit compression by allocating the current sources to circuit elements in the selected portion. Then, the compressed net list is set in the entire net list to simplify the entire net list and power supply network analysis is performed.Type: GrantFiled: February 5, 2002Date of Patent: June 8, 2004Assignee: Fujitsu LimitedInventor: Eiji Fujine
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Patent number: 6738677Abstract: A method for providing independent static and dynamic models in a prediction, control and optimization environment utilizes an independent static model (20) and an independent dynamic model (22). The static model (20) is a rigorous predictive model that is trained over a wide range of data, whereas the dynamic model (22) is trained over a narrow range of data. The gain K of the static model (20) is utilized to scale the gain k of the dynamic model (22). The forced dynamic portion of the model (22) referred to as the bi variables are scaled by the ratio of the gains K and k. The bi have a direct effect on the gain of a dynamic model (22). This is facilitated by a coefficient modification block (40). Thereafter, the difference between the new value input to the static model (20) and the prior steady-state value is utilized as an input to the dynamic model (22). The predicted dynamic output is then summed with the previous steady-state value to provide a predicted value Y.Type: GrantFiled: November 22, 2002Date of Patent: May 18, 2004Assignee: Pavilion Technologies, Inc.Inventors: Gregory D. Martin, Eugene Boe, Stephen Piche, James David Keeler, Douglas Timmer, Mark Gerules, John P. Havener
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Patent number: 6735744Abstract: A method of creating models for power estimation of a circuit comprising generating an input space for the circuit. The input space is separated into multiple power modes corresponding to regions that display similar power behavior. Separate power models are generated for each of said multiple power modes. A power mode identification function is created that selects an appropriate power model from the separate power models based on the present and past values of the circuit inputs.Type: GrantFiled: December 13, 2001Date of Patent: May 11, 2004Assignee: NEC CorporationInventors: Anand Raghunathan, Ganesh Lakshminarayana, Nachiketh Potlapally, Michael S. Hsiao, Srimat T. Chakradhar
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Publication number: 20040088151Abstract: Stimulation signals (22) are applied to a first circuit model (20) and the power behaviour of the circuit being modelled is determined from the behaviour of the first circuit model (20). In parallel, the same stimulation signals (22) are applied to a second circuit model (26) and the state variable changes within that second circuit model are calculated. The calculated power behaviour and the calculated state variable changes are then applied as training data inputs to a self learning power model, such as a neural network (28), which learns the relationship between state variable changes between the second model (26) and power behaviour of the circuit being simulated. In this way, a detailed first circuit model (20) may be used to calculate power behaviour and to train a separate power model (28, 30) which once trained can be publicly released without having to release sensitive information within the first circuit model (20).Type: ApplicationFiled: November 4, 2002Publication date: May 6, 2004Inventors: John Mark Burton, Syed Samin Ishtiaq
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Publication number: 20040083087Abstract: In a method, computer program and data processing system for simulating an electrical power transmission network, a representation of the transmission network represents a power transmission section of the network linking a pair of buses, an internal network section (1) connected to said pair of buses and an external network section (2) comprising at least one adjoining network that is connected to the internal network section (1). A composite network section that comprises both the external and the internal network section is represented by a Ward equivalent circuit (6).Type: ApplicationFiled: October 14, 2003Publication date: April 29, 2004Applicant: ABB Research LtdInventors: Christian Rehtanz, Dirk Westermann
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Patent number: 6711533Abstract: The delay time control entails a static term and a corrective term and a current sampling time, the control calculated at the preceding sampling time is applied and the control intended to be applied at the following sampling time is determined. The determination of the following control is made from the working point of the generator, estimated at the following time.Type: GrantFiled: February 14, 2000Date of Patent: March 23, 2004Assignee: GE Medical Systems, SAInventors: Nicolas Aymard, Jérôme Boichot, Emmanuel Godoy
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Patent number: 6711509Abstract: An on-board self test system for an electrical power monitoring device includes a test signal circuit in an electronic circuit of the monitoring device, and responsive to a programmable test input signal for producing an analog signal simulating an electrical power waveform, and a programmable memory in an electronic circuit of the monitoring device and operatively coupled with the test signal circuit for storing and reproducing upon command, one or more of the programmable test input signals.Type: GrantFiled: September 20, 2001Date of Patent: March 23, 2004Assignee: Square D CompanyInventor: Ronald J. Bilas
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Patent number: 6691065Abstract: In order to provide an operation and maintenance planning aiding system for a power generation installation which prepares an operation plan for a plurality of power generation units by making use of actual plant data and based on a total judgement including a variety of circumstances of the machine and apparatus or the parts thereof in the power generation units, in the system the plurality of power generation units 41, 42, 51 and 52, a power supply command center 3 and a service center 1 are arranged and connected via a communication network 6, the service center 1 obtains the plant data via the communication network 6 from the plurality of power generation units 41, 42, 51 and 52, calculates in real time a power generation efficiency of a concerned power generation unit for every plurality of power generation units 41, 42 51 and 52 by making use of the obtained plant data and design data of the concerned power generation unit and prepares an operation and maintenance plan for each of the power generation uType: GrantFiled: August 15, 2002Date of Patent: February 10, 2004Assignee: Hitachi, Ltd.Inventors: Yoshiharu Hayashi, Hidekazu Fujimura, Masao Furukawa, Katsuhito Shimizu, Yasushi Hayasaka
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Patent number: 6691079Abstract: A method for determining test coverage of an original high level language description which represents an electrical circuit by the data of at least one dump file exported by a simulation program, the original high level description having at least one executable assignment statement which models the circuit, the at least one executable assignment statement having a left side and a right side separated by an assignment operator, the left side being a variable, and the right side being an expression which has a set of at least one variable and at least one logic operator, the expression on the right side, when evaluated, determining a value to be assigned to the variable on the left side, the data of the dump file consisting of the values of all the variables of the originals high level language description between a simulation start time instant and a simulation end time instant the method comprising: a description importing step for importing the original high level language description to form a design dataType: GrantFiled: May 28, 1999Date of Patent: February 10, 2004Inventors: Ming-chih Lai, Hsing-ming Juan
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Publication number: 20040015340Abstract: Each of connection data 11, . . . , or 15, of the downstream side of a socket 1, . . . , or 5 or a panel board 6, 7, or 8 in a power supply direction, is generated in a tap 16, a UPS 25 and 35, or a terminal 24 or 34, and each of the connection data is transmitted to a electrical system wiring diagram generating terminal 36. Then, a wiring diagram is generated, based on connecting information 91 of the upstream side, which is registered in the generating terminal 36, and the plural connection data of the downstream sides.Type: ApplicationFiled: April 14, 2003Publication date: January 22, 2004Inventors: Hirokazu Kadoi, Fujitaka Togashi, Akinori Miyazaki, Kazuhiko Takano
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Publication number: 20040006438Abstract: A power management system for a selective deposition modeling apparatus for maintaining the power consumption of the apparatus within the limits of conventional power available in most all office environments. The apparatus has a plurality of power drawing components, each component having a activation power rating wherein the accumulative total of all the power ratings exceeds a baseline power consumption value for the apparatus. The system prevents a baseline power consumption value from being exceeded by determining which components can be activated while leaving others inactivated.Type: ApplicationFiled: July 2, 2002Publication date: January 8, 2004Applicant: 3D Systems, Inc.Inventors: Mark Hastert, Arvind Chari
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Publication number: 20030200010Abstract: A system for on-line dynamic screening of contingencies comprising postulated disturbances which an electric power system may experience, the system comprising a dynamic contingency screening program for evaluating a plurality of contingencies with a plurality of contingency classifiers based on the method of finding the controlling unstable equilibrium point of the power system known as the boundary of stability region based controlling unstable equilibrium point method by sequentially applying the contingencies to a network islanding problem classifier, S.E.Type: ApplicationFiled: April 22, 2003Publication date: October 23, 2003Inventors: Hsiao-Dong Chiang, Atsushi Kurita, Hiroshi Okamoto, Ryuya Tanabe, Yasuyuki Tada, Kaoru Koyanagi, Yicheng Zhou
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Patent number: 6629044Abstract: An apparatus and method for analyzing an apparatus, typically an electrical distribution system is provided. The apparatus and method is particularly useful for analyzing selective electrical distribution systems. The apparatus is generally a software system including a solver system for generating an output from an input presented to the solver system. The input is a mathematical representation of at least a portion of the electrical distribution system. In one embodiment, the input is presented to a model within the solver system. The model represents at least a portion of the electrical distribution system. The software system is capable of interfacing output data from one or more models with additional models for analyzing generally how devices within an electrical distribution system behave under certain conditions.Type: GrantFiled: March 17, 2000Date of Patent: September 30, 2003Assignee: General Electric CompanyInventors: Thomas F. Papallo, Jr., Sriram Ramakrishnan, Ahmed Elasser