Abstract: A system, apparatus, and method for emulating the operation of a peripheral device of a computer. An adapter for communicating keyboard data to a computer via a data link and for communicating display data from the computer to an external device. The adapter eliminates the need for the peripheral device to be directly connected to the computer by enabling the computer to operate without the peripheral device while still receiving or generating the data normally processed by the peripheral device. The adapter presents itself to the computer as if the adapter were the emulated peripheral device. Thus, the operation of the adapter is transparent to the computer. A remote user can access the computer, via the adapter, by communicating keyboard data generated by the user on a keyboard at a remote location. The adapter communicates display data to the user at the remote location, so that the user can monitor the operation and output of the computer.

Abstract: The invention configures an asynchronous system to emulate a synchronous system. When an application initiates a synchronous transaction, the synchronous transaction is received by a synchronous interface. The synchronous interface, in turn, simulates a synchronous system while performing an asynchronous transaction. In one embodiment, the synchronous emulation ensures that the asynchronous transaction is completed within a configurable maximum time duration. If the asynchronous transaction has not been completed with within the defined maximum time duration, the synchronous emulation notifies the application that the desired data is not available. In another embodiment, the synchronous eumlation re-executes failed asynchronous transactions.

Abstract: An emulator system solving a problem of conventional emulator systems by recognizing a task execution history. In conventional systems, it was necessary for a microcomputer to incorporate a specific task for storing in a memory an identification number and switching time of a task to be executed next in a program to be debugged. The novel emulator system includes a first detector for detecting a write cycle of a microcomputer in which the identification number of a task to be executed next is recorded. A second detector detects the start cycle and end cycle of an interrupt. A measurement memory stores the timing of the write cycle and the timing of the start cycle and end cycle of the interrupt.

Abstract: A computer system including a memory model of a memory circuit. The computer system comprises a processor coupled to receive and manipulate the memory model, and a memory including the memory model. The memory model includes: a number of address bits corresponding to a number of address bits of the memory circuit; a number of data bits corresponding to a number of data bits of the memory circuit; and a memory type parameter corresponding to a type of the memory circuit.