Abstract: A method for emulating one or more file system functions is provided. On a first processing device, a request is received. The request comprises a first data indicating a first file that a file system resident on the first processing device does not support. In an emulation library a second data for emulation of the first file is located. A response based upon the first and second data is formed.

Abstract: What is disclosed is a method of creating and distributing works of art that takes advantage of the possibilities of duplication and distribution offered by modern computing and telecommunication, while preserving the rights of the authors. Unique versions of a work of art are generated from a source variable work of art such that each unique version is perceptibly different from all other unique versions of the work of art. Unique versions can then be distributed to specific users so that specific unique versions are associated with specific unique versions. In the event a unique version is improperly shared, the user associated with the improperly shared unique version can be identified.

Abstract: An apparatus for facilitating development of an application for a wireless-connected device including a module have a plurality of development tools for use in the creation of the application and an emulator of the wireless-connected device integrated with the module. An additional emulator for an additional wireless-connected device is also included. The module may be included in an Integrated Development Environment.

Abstract: A component, system and method for simulation of a PCI device's memory-mapped I/O register(s) are provided. The PCI simulation component has an initialization component, a configuration space simulator and a memory-mapped I/O space simulator. The initialization component can claim an amount of memory by modifying the amount of memory that an operating system has available to it. The initialization component further identifies to the operating system that at least some of the claimed memory resides on a PCI bus. The configuration space simulator causes the operating system to accept that the simulated PCI device is present in the system. The memory-mapped I/O space simulator simulates device and can comprise can comprise a thread that monitors the simulated memory-mapped I/O registers for a change in order to simulate behavior of the simulated PCI device.

Abstract: A system and method of validating an application includes receiving the application and determining a set of accessed classes that are accessed by the application. The set of accessed classes are compared to a set of authorized classes to determine if one or more unauthorized classes are included in the set of accessed classes. And, validating only the applications that do not access unauthorized classes.

Abstract: A computer system and method of managing a logical partition on a logically-partitioned multi-user computer utilize a handheld computer with a plug-in console emulation module to emulate a console through which various system administrations operations may be performed. The handheld computer is coupled to an adapter on a logically-partitioned computer via a plug-in module coupled to the handheld computer and connected to the adapter via a cable. The handheld computer is configured to emulate a console for a logical partition in the partitioned computer using program code resident in the plug-in module. The plug-in module may incorporate a network interface configured to receive a network connector, a memory, and program code resident in the memory and configured to control the handheld computer to perform the desired console emulation.

Abstract: A method and apparatus for creating run-time reconfigurable cores using a core template package. The core template package provides an object-oriented application programming interface for specifying run-time reconfigurable (RTR) electronic circuit designs in a RTR application program. A run-time parameterizable (RTP) core library includes a plurality of predefined RTP core classes that implement selected functions in an electronic circuit design when invoked from an RTR application program. An RTP core template package includes a plurality of template classes. Each template class has a predefined set of method interfaces and fields. The RTP core template package further includes an RTP core template class that includes methods for building, connecting and traversing a hierarchy of RTP core objects based on the template classes and the predefined RTP core classes.

Abstract: An interface to one or more hardware devices includes a configuration library and objects to model the hardware. Software programs using the interface need not understand how to communicate with the hardware. Instead, the software programs may communicate with the interface. In turn, the interface communicates with the hardware. The software may be written when the hardware implementation features are unknown.

Abstract: A general-purpose electronic device, a method of controlling the same, and an information processing system are provided. This electronic device has a function of automatically installing its driver in the information processing system. The driver is stored in the electronic device. The electronic device includes a first device and a second device in which the driver of the first device is stored. The first and second devices generate transactions on a common interface for external connection. The operation of the second device is started before the operation of the first device, and a means is employed to make the driver readable from the second device through the common interface.

Abstract: A real time functional replicator (10) of a specific integrated circuit comprised of a processing unit and peripherals in order to perform specific digital and/or analog functions controlled by specific software, this specific integrated circuit being designed to be incorporated into a specified application board.

Abstract: An improved interface between a host computer and a tape drive emulation system includes software interfaces for communicating control, configuration, and policy data and a hardware interface for providing redundancy and fan-out between the main controller and host channels.

Abstract: A method of trace data compression receives trace data on a first port and a second port stores a prior data value. If trace data is received on only one port, then that trace data is transmitted as an indication of matching and non-matching sections between the current trace data and the stored data value and the non-matching sections of the current trace data on the one port. If trace data is received on both ports, then the first port trace data is transmitted relative to the prior stored value and the second port trace data is transmitted relative to the first port trace data. The stored prior data is reset to zero upon each initiation or termination of trace data on either port. The stored prior value is set to the second port value or the first port value if no second port value is received.

Abstract: There are included the steps of receiving an operation input for defining a plurality of setting information pieces on a disk subsystem as a command by one operation, storing the defined setting information as a file, and sending the file to the disk subsystem.

Abstract: Methods and apparatus for creating microcode-implemented peripheral devices for a microcontroller core formed in a monolithic integrated circuit. The microcontroller core has a control store for storing microcode instructions; execution circuitry operable to execute microcode instructions from the control store; and means for loading a suite of one or more microcode-device modules defining an optional peripheral device, the optional peripheral device being implemented by microcode instructions executed by the execution circuitry in accordance with the definition provided by the microcode-device modules.

Abstract: A method and apparatus to provide pre-boot security and legacy hardware and environment support for a computing system having an extensible firmware architecture is described. A virtual machine monitor is employed to provide the virtualization of system state for the purposes of running legacy compatibility code or protecting key data and code regions for safety and security. An application may be given access to a subset of the system resources, and access to portions of the memory map not designated for updates would trap (program interrupt) to the VMM. A VMM pre-boot policy agent may then protect state and unload any problematic software.

Abstract: The present invention is a Control System Architecture (CSA) for a multi-component armament system. The CSA provides dynamic reconfiguration of multiple nodes (e.g. a component, a subsystem, or a virtual simulation) in a Simulation-Emulation-Stimulation (SES) environment utilizing redundant client-server bus configuration of the nodes in a hierarchical model. The CSA provides for ease of configuration of nodes for any specific application, automated system reconfiguration capabilities to detect and bypass failed nodes or re-group available remaining nodes in the event of degraded mode operation, and expansion and/or downsizing of nodes without requiring a modification to the overall system architecture.

Abstract: Systems and methods utilizing virtual input/output (VIO) modules in PLDS. One or more VIO modules are embedded in a PLD along with the user circuit to be controlled and monitored. The VIO module includes a control module that acts as a virtual input module for the user circuit, and can optionally include a status module that acts as a virtual output module for the user circuit. A bi-directional data interface is provided between the user circuit and the VIO modules, and between the VIO modules and a communication module. The communication module is coupled through input/output pads of the PLD to an external communication link, and hence to a host computer in which resides software that controls the communication link. Thus, by interfacing with the host computer, a user can control the user circuit via the control modules and monitor output signals from the user circuit via the status modules.

Abstract: The present invention is directed to an advanced storage controller that is capable of providing parallel processing capabilities to a host processing system connected storage system to increase performance, functionality and reliability of the entire computing system. The advanced storage controller comprises at least one input interface and at least one output interface, a host device simulation component, a cache device component, a physical device component and a management component. Such an advanced storage controller further, includes one or more processor elements and storage elements, which may be shared by the components or dedicated to one component. Additionally, the advanced storage controller is scalable by the static or dynamic addition of components, processors and/or memory.

Abstract: An emulation parameter indicative of a data processing operation performed by a data processor is exported from the data processor. The parameter value is provided as a plurality of digital bits. After determining that the bits of a first group within the plurality of bits all have the same bit value and that a predetermined bit within a second group of the plurality of bits has a bit value equal to the bit value of the bits of the first group, only the second group of bits is output from the data processor without outputting the first group of bits.

Abstract: A method for emulating the functionality of VGA hardware, wherein the emulator program of the present invention maintains a set of tables that permits the emulator program to branch to a function customized for both the instruction and the operating mode of the VGA hardware. When the customized function has already been generated, the emulator will automatically dispatch directly into the customized function. If an instruction is executed at a time when the VGA operating mode has changed, the addresses of the customized functions are loaded from a second table. If a customized function is not present, a customized function is generated and the tables are updated to point to the addresses of the newly created customized function. As the VGA hardware is switching among operating modes, a customized function is not generated until such time when an actual instruction is executed for the VGA hardware.

Abstract: Methods and apparatus are provided for automatically loading drivers on computers for devices coupled to a communication medium such as an IEEE 1394 serial bus. Operating systems running on the computers detect when a device is connected to the communication medium. The operating systems then determine whether one of the drivers stored in memory on the device will enable the computers to utilize the device. The operating systems will then load the appropriate drivers for their respective computers and allow access to the device. If none of the drivers on the memory are suitable for a particular computer, then its operating system will prompt a user to manually insert a computer-readable medium containing the appropriate drivers. Thus, the present invention provides methods and apparatus for automatically loading device drivers.

Abstract: A system and method for connecting an electronic device to a network running at a higher speed that includes a computer for receiving data packets from the network and storing the received data packets in a first buffer. The computer next transmits the received data packets to the electronic equipment at a slower speed. The computer also receives data packets from the electronic device, and stores the data packets received from the electronic device in a second buffer. The computer then transmits the data packets received from the electronic device to the network at a higher speed.

Abstract: Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.

Abstract: A communication device for a target integrated circuit chip having a digital processor, an on-chip emulator for controlling the digital processor and for collecting operation data from the digital processor for communicating to off-chip circuitry, and a target on-chip universal serial bus interface connected to the on-chip emulator, the communication device including an Ethernet port, an universal serial bus port and a further integrated circuit chip having on-chip universal serial bus interface, the on-chip Ethernet interface being connected to the Ethernet port, the interfaces being connected to the processing circuitry for translating between Ethernet protocol data on an Ethernet bus connected to the Ethernet port and universal serial bus data for the target on-chip universal serial bus interface.

Abstract: A method for verifying the design of a disk controller circuit to be incorporated into a targeted hard disk drive system having a read/write channel and a head actuator may include steps of emulating reading and writing of data in the read/write channel based upon a model of the read/write channel, emulating a behavior of the head actuator during track seek and track following operations based upon an electromechanical model of the head actuator, providing a disk controller design base for defining integrated circuit elements comprising the disk controller circuit and providing a controller environment to support execution and debug of firmware for operating the disk controller circuit. A plurality of disk functions may be carried out at a time-scaled rate according to a script. The plurality of disk functions includes interaction of at least the read/write model, the electromechanical model, the disk controller design base and the controller environment.

Abstract: A computer software product is used to create applications for enabling a dialogue between a human and a computer. The software product provides a programming tool that insulates software developers from time-consuming, technically-challenging programming tasks by enabling the developer to specify generalized instructions to a Dialogue Flow Interpreter, which invokes functions to implement a speech application, automatically populating a library with dialogue objects that are available to other applications. The speech applications created through the DFI may be implemented as COM (component object model) objects, and so the applications can be easily integrated into a variety of different platforms. In addition, “translator” object classes are provided to handle specific types of data, such as currency, numeric data, dates, times, string variables, etc. These translator object classes have utility either as part of the DFI library or as a sub-library separate from dialogue implementation.

Abstract: Applications software can be rapidly tested and developed for a multi-processor chip even though the hardware of new processors of the multi-processor chip is not yet available. This can be accomplished by executing software simulations of the new processor designs and corresponding applications software either on a previously designed processor that is hardware on the multi-processor chip or on a workstation development platform. The execution of the previously designed processor is typically much faster than the execution on a simulator running on a personal workstation development platform, and therefore the execution time is quicker. Furthermore, the processor simulation and application software can be configured to take advantage of the platform most appropriate for execution and avoid simulation of portions of the new processors that are not necessary for testing the applications software.

Abstract: A system, method and apparatus are described for delivering software to a terminal 1. Before software is delivered, an emulator 51 is invoked to validate the operation of the new software in conjunction with the existing terminal configuration. The invention is particularly suitable to the delivery of so-called thin terminal implementations by manufacturers to which users subsequently add their desired software.

Abstract: An object of the present invention is to shorten a transfer time when a virtual tape volume is used on another computer. A system A incorporating a virtual tape unit is connected to a system B at a remote place via a network. A virtual tape transfer processing unit of the present invention inputs and outputs a virtual tape volume of the system A between virtual tape management information and a virtual tape file. The virtual tape file is copied using a copy function between magnetic disk drives so as to be asynchronous to the systems. An input/output request conversion part allows a tape using task of the system B to use the virtual tape file as a magnetic tape file.

Abstract: A system and method for allowing user access to software applications, data storage and retrieval, and electronic mail and messaging services in a networked computing environment are provided. The need for software installation, upgrade, and version control, and the need for certain hardware upgrades are eliminated by providing software and data storage and retrieval to a user or to groups of users from a remote terminal server via a networked computing environment. Software applications, data and electronic mail and messaging services are stored, maintained and operated at a remote terminal server and are provided to the user over the Internet or over an intranet of an organization such as a company or educational institution. Data is stored and secured at a remote file server, and web operations are provided by a remote web server. The backend of the system, including the terminal servers, file servers and web servers is managed and secured by a domain controller.

Abstract: A read-write hard disk drive is emulated using a hard disk drive image file on a protected medium such as a CD-ROM, a written disk sector database, and file system filters. A file system filter intercepts file I/O requests from the operating system. Initial read requests are serviced from the hard disk drive image file. Write operations are directed to a database, such as in RAM. Subsequent read requests for previously written data are serviced from the database. Another file system filter monitors attempts to alter the file access attributes, and prevents pre-existing read-only files on the emulated drive from being written or deleted. The maximum size of the written disk sector database is the sum of sectors on the hard disk drive image file allocated to read-write files and free space. The emulated read-write hard disk drive allows for the execution of programs requiring a read-write native media.

Abstract: A method for testing server machine performance is described. A client-emulating server machine has a collection of live data maps for a plurality of transactions for a chosen computing application. A server is in communication with the workstation. The workstation transmits a processing load, including a plurality of the maps for the plurality of transactions, to the server as it executes the computing load. The server measures one or more performance criteria as it executes the load. The performance criteria can include the average response time for a transaction within a load, and the proportion of server CPU time taken by each transaction of the load. By varying the processing load generated by the workstation and assessing the measured performance criteria, it is possible to determine whether the server has satisfactory capacity.

Abstract: An evaluation system and method for computer products that uses a unified diagnostics platform having a switching multiplexor to generate a plurality of computer systems and computer environments. The evaluation system of the present invention includes a unified diagnostics platform that facilitates a variety of different computer systems by connecting computer peripherals, processors and operating systems. The switching multiplexor may be a plurality of switches allowing multiple combinations and configurations of devices connected to the unified diagnostics platform. The switching multiplexor is controlled using a controller that may be a hardware or a software selector. The evaluation method of the present invention includes a method for evaluating a computer product on a plurality of computer systems using the unified diagnostics platform.

Abstract: A method of creating a prototype data processing system, by configuring a hardware development chip (HDC) according to user-defined settings, building user-defined logic adapted to function with the configured development chip, and allowing for the re-configuration of the HDC and user-defined logic after debugging. The HDC has several data processing macros including a processor core macro, a ROM emulation macro, a memory macro, and a bus macro. The macros may be configured by a configuration pin block which is connected to external configuration pins on the HDC. Customer logic is built using a field programmable gate array, which is interconnected with external ports of the HDC. The HDC and customer logic are verified using a debug port on the HDC, which is connected to a debug workstation. The invention allows a user to easily and quickly debug an application-specific integrated circuit (ASIC) design with a unique version of selected processor cores.

Abstract: An Improved Method for Communication with Real-time Remote Devices over Wide-area Communications Networks is disclosed. Also disclosed is a method and system that provides the remote device with local (non-networked) control for Time-Dependent-Responses, while limiting those communications transmitted over the network to those of the Non-Time-Dependent type. The method and device provide a local emulation of the controlling computer to the remote device, and a local emulation of the remote device to the controlling computer and any other devices monitoring the remote device. The emulations may be provided within either the computer and device themselves (as software), or within discrete, stand-alone devices (“remoting devices”). The emulations can compensate for communications delays and or errors by maintaining a calculated image of the remote device or controlling computer.

Abstract: A mobile apparatus for configuring, testing or providing portable electronic devices for accessing an on-board system of a mobile platform provides a single convenient location for ensuring proper configuration. Portable electronic devices pre-configured for connection to the on-board system are easily tested and re-configured if needed. Further, external components, such as PC cards or disk drives may be provided for configuring the portable electronic devices for accessing the on-board system. Entire portable electronic devices having limited components also may be provided for accessing the on-board system.

Abstract: Disclosed is a virtual-space providing apparatus, which is connected to a user terminal via a network, and which provides the user terminal with various kinds of services through a three-dimensional virtual space created in the network, the virtual-space providing apparatus includes a virtual room providing server for imitating a real room of a user using the user terminal, and for providing the virtual room, which can be browsed using the user terminal connected via the network, on the three-dimensional virtual space; virtual store providing server for providing the user terminal connected via the network with the virtual store, the virtual store selling virtual commodities imitating real commodities, on the three-dimensional virtual space; and a benefit-information transmitting medium, wherein, when the user purchases a virtual commodity in the virtual store provided by the virtual store providing server using the user terminal, benefit information showing benefit of purchasing the virtual commodity is tran

Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.

Abstract: A bridge board connects a TMS470 processor evaluation module and a TMS320C54XX processor evaluation module. The bridge board performs translation of signal formats on both of the boards and also synchronizes the signal formats on both boards so that both boards are able to operate together. With this bridge board, and its specific connections to both of the evaluation modules, a single workstation, preferably connected to the TMS470 module is able to not only control the TMS470 module but also the TMS320 module. Software for the TMS320 can be loaded from the workstation through the TMS470 module, through the bridge board and into the TMS320 module. The software in both of the evaluation modules can then operate and interact with each other through the bridge board.

Abstract: There is disclosed a method of communicating with an integrated circuit chip having plural components thereon, the components including digital processing circuitry and an on-chip emulator connected to the digital processing circuitry for initiating command and control sequences for the digital processing circuitry in response to externally applied signals or in response to detected states of the digital processing circuitry.

Abstract: A regionally time multiplexed emulation system includes an emulator for emulating a circuit design. The emulator includes a plurality of reconfigurable logic devices with buffered I/O pins and reconfigurable logic elements. The reconfigurable logic devices are reconfigurable to emulate a circuit design using at least one user clock to clock the logic elements and at least one signal routing clock to time multiplex the routing of emulation signals between the reconfigurable logic devices, with the at least one signal routing clock being independent of the at least one user clock.

Abstract: Disclosed is a method and apparatus for emulating a fiber channel port. A controller is provided according to the invention that includes a fabric port and a virtual N port. The controller is adapted to buffer incoming data and convert an N port address provided with the data by a host computer to an instruction to the picker to couple the disk drive corresponding to the requested N port address to the virtual N port.

Abstract: A hardware module for incorporating an electronic unit into an ad-hoc network has a unit to operate a Java virtual machine which supports Java RMI and Jini. The hardware module has at least one interface to a communications interface on the electronic unit. Jini services are generated with interface stubs for the hardware of the electronic unit. The hardware module has at least one interface to a local area network.

Abstract: A system for handling checks is provided that includes a sorter operable to retrieve MICR data from a plurality of checks. An emulator is coupled to the sorter. The emulator is operable to access the MICR data, to generate a process buffer based on the MICR data, and to generate a plurality of feature instructions for each check based on the process buffer. A communication engine is coupled between the emulator and a check processing system. The communication engine is operable to communicate between the emulator and the check processing system in real-time. The check processing system is operable to receive the process buffer from the emulator through the communication engine. The emulator is further operable to communicate the feature instructions to the sorter. The sorter is further operable to process the checks based on the feature instructions.

Abstract: A system and method for bulk transfer to and from the SRAMs in which a starting memory address is latched and is then incremented every clock cycle to generate a new memory address. The addresses are decoded and memory requests are pipelined to the SRAM memory, one every clock cycle. When the memory controller detects transfer of the boundary of a predetermined number of clock cycles or words (e.g. 64 words or four clock cycles) the burst mode of data transfer is stopped and the memory controller waits for a “done” signal before resuming another cycle of the burst transfer mode. The memory controller on detecting a request on this address boundary first does a memory refresh followed by a requested operation; e.g. a continuation of the transfer operation.

Abstract: A method and apparatus in a data processing system for mimicking a device attached to a bus. Signaling is detected on the bus indicating a request to access the device. The bus is then monitored for a response by the device. If a selected period of time passes without a response being made by the device, a response suitable to indicate the presence of the device is sent onto the bus.

Abstract: A virtual disk subsystem and method for providing a virtual local drive are disclosed. The virtual disk subsystem includes a channel bridge, such as an Advanced Technology Attachment (ATA) bridge, that receives disk commands from a disk controller, as well as a disk emulator in communication with the channel bridge and a network interface. The disk emulator includes control logic that receives disk commands from the disk controller via the channel bridge and, in response, retrieves data from a remote data storage device and forwards the data to the disk controller, such that the disk controller perceives the remote data storage device as a local device. In an exemplary embodiment, the virtual disk subsystem allows a standard operating system (OS) in a data processing system to function as if the data processing system included the emulated drive.

Abstract: An implementation framework, including methodologies and the architecture, for a real-time traffic emulation for packet switched networks. The framework uses extended finite state machines to model the traffic flows that are to be emulated. A simple yet flexible FMS-based scripting language is proposed to describe these flows. An event-driven approach to schedule CPU among flows is also adopted.

Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.

Abstract: A test system and method for testing a processor circuit board having at least one processor. The system includes a processor control circuit connected to the processor circuit board which enables test routines to be run on the processor of the processor circuit board, a peripheral emulator circuit, having a connector for connecting to at least one peripheral connector on the processor circuit board, for emulating at least one function of at least one peripheral device, a response circuit measuring the response of the processor circuit board to a test routine, a main controller in electronic communication with the processor control circuit and the response circuit. In operation, the processor control circuit receives instructions from the main controller and causes the processor on the processor circuit board to run a test routine. The response circuit will then communicate the results of the test routine to the main controller.