Of Peripheral Device Patents (Class 703/24)
  • Publication number: 20040267516
    Abstract: A method for controlling and emulating the functional and logical behaviors of an array of storage devices is established by loading a software module to an array controller board. The software module is integrated into the array controller subsystem manager by providing the necessary parameters required to insert the device and can control the inbound and outbound activities (commands, data, and status packages) regardless of the type, interface, and protocol of the disk/tape device. This aspect of the method allows the user to control the drive state transition and inject errors on the inbound and outbound drive traffics. Also, the method of this invention allows the drive module to recover in case of an array controller failure and to be removed from a list of devices like a regular drive.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Mahmoud K. Jibbe, Chin Khor
  • Patent number: 6836757
    Abstract: Emulation communications via a test access port and boundary-scan architecture providing serial access to a serial connection of a plurality of registers disposed in a plurality of modules. One of the modules is selected for communication. Nonselected modules are made nonresponsive to data on the serial connection. The external emulation hardware supplies a serial signal having a first logic state for a number of cycles greater in number than a number of bits of the serial connection of registers to the test access port. The emulation hardware supplies a start bit having an opposite logic state. The selected module detects the start bit and stores the next predetermined number of data bits. These bits could be data bits to be stored in a program visible data register or bits interpreted as an instruction for execution by the module. The selected module may transmit return communications via the serial scan path using the same format.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: December 28, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 6832186
    Abstract: The present invention relates to a system and method for emulating the operation of storage devices deployed in a host computer system. The inventive approach preferably involves the use of an emulator employing storage space and equipment specifically allocated for the emulation of particular storage devices associated with the host computer. Emulating storage devices preferably preserve their data through various possible power cycling operations of the emulated devices. The emulating or emulator devices may generally be disposed inside or outside of the emulator housing.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: December 14, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Gordon Margulieux
  • Publication number: 20040249624
    Abstract: A system and method of operating a storage system is provided. The storage system includes a tape drive for reading and writing data to a magnetic tape medium of a tape storage media device, and an auxiliary memory emulator for receiving I/O commands to perform I/O operations on an auxiliary memory and for rerouting the commands to perform the I/O operations on the magnetic tape medium of the tape storage media device. The method includes receiving I/O commands to perform I/O operations on an auxiliary memory on a tape storage media device, wherein the tape storage media device includes a magnetic tape medium and does not include the auxiliary memory, and routing the I/O commands to the magnetic tape medium provided in the tape storage media device.
    Type: Application
    Filed: June 1, 2004
    Publication date: December 9, 2004
    Inventors: Mark A. Payne, Dwayne A. Edling, Douglas F. Barbian, Theron S. White
  • Patent number: 6829572
    Abstract: A method and system are described for efficiently overriding a value of a net in an array during execution of a test routine. The logic simulator machine is simulating a logic design which includes the array and multiple nets. A current value of the net is set equal to an override value. A normal update to the array is permitted to occur during execution of a single cycle of the test routine. A determination is then made regarding whether the override value is still stored in the array for the particular net. If the override value is not still stored in the array for this net, normal updates to the array are prohibited during a single cycle of the test routine. During this cycle of the test routine, the override value is then again stored in the net as the current value of the net. This override value is thus made available to be read during this cycle of the test routine while writes to the array are disabled.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: December 7, 2004
    Assignee: Internatinal Business Machines Corporation
    Inventors: Daniel R. Crouse, II, Harrell Hoffman
  • Publication number: 20040243385
    Abstract: A method and system to emulate a hardware device of a computer system. A missing device not present in a computer system is emulated by a device emulator. A request is made to access the missing device of the computer system and the request is serviced by the device emulator. In one embodiment, a floppy disk drive is emulated by a Random Access Memory (RAM) drive. The RAM drive is loaded with data anticipated to be requested from the floppy disk drive. A request to access the floppy disk drive is directed to the RAM drive by firmware executable by the computer system. In another embodiment, the firmware of the computer system operates in accordance with the Extensible Firmware Interface (EFI) framework standard to emulate a hardware device.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Inventors: Michael A. Rothman, Vincent J. Zimmer
  • Patent number: 6820047
    Abstract: A simulation system simulates an operation of a memory. This system includes an error generating step in addition to a memory operation simulating step. An error can easily be generated in a read/write operation of a memory model only by setting a memory address. A set of free bits, which is not used for the simulation of a memory operation, is used as a memory address for indicating the error generation. It is thus unnecessary to prepare a new description of a signal line exclusively for indication of error generation and it is possible to simulate a memory operation containing an error only by the normal descriptions of an address, data, and the like.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: November 16, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Aizawa, Makoto Kishino
  • Patent number: 6816798
    Abstract: A network-based method and system for analyzing and displaying reliability data from a user is provided. The method includes recording reliability data, obtaining unreliability plots, obtaining Weibull distribution parameters, creating control charts for those parameters over time, and obtaining hypothesis tests to ensure reliability has not changed due to process variation.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: November 9, 2004
    Assignee: General Electric Company
    Inventors: Julio A. Pena-Nieves, Theodore D. Hill, III, Alan Luis Arvidson
  • Publication number: 20040215442
    Abstract: The present invention provides an apparatus and method for using clock bursting to minimize command latency in a logic simulation hardware emulator/accelerator. The logic simulator hardware emulator/accelerator includes an emulator system having logic gate functions representing a design under test. The logic gate functions further include special burst clock logic for toggling a clock signal to a plurality of latches within the design under test for a predefined number of clock cycles. A host workstation is coupled to the emulator system by a high-speed cable. The host workstation provides control for the emulator system. In normal operation, the host workstation encodes a predefined number of clock cycles for the emulator to run, then transmits the encoded predefined number of cycles to the burst clock logic via a plurality of signals within the high-speed cable.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 28, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Roy Glenn Musselman
  • Publication number: 20040210433
    Abstract: Various embodiments include a system, method and apparatus for providing web pages and content using a storage device, such that the web pages and content are accessed offline. The information and programs that compose the web page are stored in the storage within the device (hereafter Web Server Emulation Device). The Web Server Emulation Device connects to a computing device (hereafter Client Digital Appliance) such as a personal computer, which executes a proxy program. The Client Digital Appliance may also execute a web-browsing program. The proxy captures web browser requests and processes them. If required, the proxy program transfers part or all of a request to the Web Server Emulation Device for further processing. The Web Server Emulation Device may also store user input, such as from an HTML form, to be transmitted to a remote web server when connected to a network such as the Internet.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 21, 2004
    Inventors: Gidon Elazar, Dan Harkabi, Nehemiah Weingarten
  • Patent number: 6804636
    Abstract: An apparatus enables development and debugging of a control program for controlling a relatively small product having rapid response without using an actual mechanism. A simulation unit simulates an operation of a mechanism, in a simulation cycle shorter than a control cycle, for a time corresponding to the control cycle, and outputs a state variable of the mechanism to a holding circuit. When the state variable is held in the holding circuit, a simulation control unit makes the simulation unit shift to a response waiting state and makes a control program executing unit calculate a controlled variable. When the controlled variable is held in the holding circuit, the simulation control unit makes the control program execution unit shift to a response waiting state and makes the simulation unit initiate a simulating operation. The apparatus is applied when a control program for every product requiring a precise servo control is developed.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: October 12, 2004
    Assignee: Fujitsu Limited
    Inventors: Yosuke Senta, Yuichi Sato
  • Publication number: 20040193397
    Abstract: A technique for emulation of a data storage system. The invention allows the level of services to be provided by a data storage system to be specified in terms of the level of services provided by another storage system. In one aspect, a performance characterization of a data storage device to be emulated is obtained (e.g., by experimental techniques). A specification of a workload is also obtained that includes a specification of a plurality of data stores for the workload. The data stores are assigned to an emulation data storage device according to the performance characterization and according to the specification of the workload such that sufficient resources of the emulation data storage device are allocated to the workload to meet the performance characterization of the data storage device to be emulated. The emulation data storage device is then operated under the workload. Quality-of-service (QoS) control may be performed so as to provide a degree of performance isolation among the workloads.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Inventors: Christopher Lumb, Arif Merchant, Guillermo Alvarez
  • Patent number: 6799157
    Abstract: An objective is to provide a microcomputer, electronic equipment and emulation method which can realize the optimum circumstance of evaluation while saving the number of terminals. An external bus is shared between external and emulation memories. In the emulation mode, the access of CPU to an internal ROM is switched to the access of CPU to the emulation memory through an external bus. The emulation mode is turned ON or OFF through a mode selection terminal or mode selection register. The emulation memory is controlled by a control signal CNT2 different from a control signal CNT1 which controls the external memory. A memory read signal in CNT2 become active at a timing earlier than that of a memory read signal in CNT1. Thus, the instruction is fetched and decoded within one clock cycle. A mode selection terminal is further provided for selecting a mode of performing the boot from the emulation memory, internal ROM or external memory and a made of selecting OPT mode.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: September 28, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Makoto Kudo, Hirofumi Terasawa, Yoshiyuki Miyayama
  • Patent number: 6799155
    Abstract: The present invention is a method and apparatus for implementing in embedded software the functionality of one or more external user interface circuits either in a surface mountable integrated circuit or in the main system CPU of a telecommunication unit.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: September 28, 2004
    Assignee: Allied Signal Inc.
    Inventors: Brian Lindemann, Daniel R. Barbour
  • Patent number: 6799225
    Abstract: A computer system implements a standard modem without the use of a microcontroller. Instead, a digital signal processor is provided on an expansion card, but with direct links to the computer system itself. The code usually implemented in the microcontroller is instead implemented as a virtual modem controller to be called by the operating system of the computer itself. Further, this virtual modem controller includes a virtualized UART, that appears to the operating system software as a hardware UART, with entry points for calls to replace input/output instructions. In this way, standard device driver code written to execute input/output operations is easily converted to operate with the “virtualized” UART.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: September 28, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: G. Byron Sands, Peter J. Brown, Don A. Dykes, Andrew L. Love, Kevin W. Eyres
  • Patent number: 6799156
    Abstract: A method of and apparatus for efficiently and effectively coupling a newly designed peripheral device to a legacy data processing system. The approach utilizes emulation of a SCSI tape device by a SCSI DVD device. Through device emulation, system-wide modifications are minimized.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: September 28, 2004
    Assignee: Unisys Corporation
    Inventors: Michael J. Rieschl, Carl R. Crandall, Thomas N. Devries, Haeng D. Park
  • Patent number: 6795803
    Abstract: A CD (compact disc) system is provided in a software form, by which a virtual CD-R (compact disc recordable) can be formed on a computer, and an actual CD-R can be easily and quickly formed from this formed virtual CD-R. While original data is processed, a virtual CD-R is formed in accordance with a structural requirement of a CD into a storage means employed in the computer. Furthermore, an actual CD-R is formed from the above-explained CD-R.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: September 21, 2004
    Assignee: Tomcat Computer Incorporated
    Inventors: Toshiharu Tanaka, Koji Sasaki
  • Patent number: 6789132
    Abstract: A data storage device control module for controlling operational processes in a data storage device comprises a number of preemptive modules, a number of non-preemptive modules, and a scheduler module operable to schedule the execution of the non-preemptive modules only in the data storage device control module. Preferably included as one of the non-preemptive modules is a queue processor module operable to manage the position and movement of command nodes in multiple command node queues.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: September 7, 2004
    Assignee: Seagate Technology LLC
    Inventor: Edward Sean Hoskins
  • Patent number: 6772108
    Abstract: A RAID storage device controller provides a host interface for interfacing the controller to a host system bus. The host interface is isolated from the attached storage devices, for example IDE disk drives, so that the actual attached drives are not limited in number or interface protocol. Various device ports can be implemented, and various RAID strategies, e.g. level 3 and level 5, can be used. In all the cases, the host interface provides a standard, uniform interface to the host, namely an ATA interface, and preferably a dual channel ATA interface. The host interface emulates the ATA single or dual channel interface and emulates one or two attached IDE devices per channel, regardless of the actual number of devices physically connected to the controller. Thus, for example, five or seven IDE drives can be deployed in RAID level 5 protocol without changing the standard BIOS in a PCI host machine. Thus the RAID controller is transparent relative to a standard dual channel ATA controller board.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: August 3, 2004
    Assignee: NetCell Corp.
    Inventor: Michael C. Stolowitz
  • Patent number: 6766520
    Abstract: Emulation of a hardware peripheral is accomplished through use of object oriented software and runs in an object oriented environment. Particular adaptation of an emulation to enable specific data storage magnetic tape drive peripheral is described. Use of emulators in general enables continued reliance on legacy hardware and software without maintaining an entire suite of legacy hardware. Simplified emulation structure enabled by object oriented programming described herein makes migration from legacy systems feasible in stages at relatively low cost. In set-up and in use, users can have control over instances of emulator objects, including association with data files that operate as virtual storage media whether initially associated with the emulator or not, using a simple window-based interface for choosing particular data files, opening them, opening new instances of emulator objects and so forth. Variations are also described.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: July 20, 2004
    Assignee: Unisys Corporation
    Inventors: Michael J. Rieschl, Kurt N. Johnson, Dave Q. Anderson
  • Publication number: 20040122650
    Abstract: Disclosed is a host terminal emulator installed in a client computer to detect a coordinate at which a non-protecting attribute is set from coordinates in CUI screen data when it is received from a host computer, to generate GUI screen data in which GUI parts corresponding to the non-protecting attribute are set at respective coordinates following the detected coordinate, to correct the GUI screen data so as to transform the GUI parts in response to the coordinate at which the non-protecting attribute is set, and to display a screen based on the corrected GUI screen data on a monitor.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 24, 2004
    Inventors: Akinori Masushige, Masahide Abe, Takashi Maruyama
  • Publication number: 20040102953
    Abstract: In the case of tracing processor activity and generating data streams multiple triggers can be generated at the same time. The issue is further complicated in a protected pipeline where certain locations are considered as in illegal instruction boundary. During those cycles certain information is invalid and cannot be transmitted to the user. Thus a received trace trigger cannot begin. This invention resolves all ambiguities related to multiple triggers so that the user has a known predictable behavior based on the setup of the triggers.
    Type: Application
    Filed: November 22, 2002
    Publication date: May 27, 2004
    Inventors: Manisha Agarwala, John M. Johnsen, Lewis Nardini
  • Publication number: 20040098244
    Abstract: A system is described including a data tape cartridge carrying a non-tape storage medium, and a tape drive emulator that receives the data tape cartridge and stores data on the medium in a format that emulates a tape storage format. The tape drive emulator sequentially records the data within the logical storage areas of the non-tape storage medium, and maintains a library of tape marks on the storage medium to indicate locations within the stored data files. The library of tape marks may indicate, for example, file marks, sequential file marks, block marks, and other demarcations within the stored data. The tape drive emulator makes use of the library of tape marks to access the non-tape storage medium in response to tape access commands from a host computing devices.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 20, 2004
    Applicant: Imation Corp.
    Inventors: Clark C. Dailey, Yung Yip
  • Publication number: 20040088152
    Abstract: A method for emulating one or more file system functions is provided. On a first processing device, a request is received. The request comprises a first data indicating a first file that a file system resident on the first processing device does not support. In an emulation library a second data for emulation of the first file is located. A response based upon the first and second data is formed.
    Type: Application
    Filed: March 27, 2003
    Publication date: May 6, 2004
    Inventors: Benoit Perrin, Christophe Cleraux, Morvan Le Goff
  • Patent number: 6732067
    Abstract: A system for providing, via a network, emulation of a console of a first computer system on a second, remotely located computer system on the network comprises an adapter card installed in the first computer system and a client program executing on the remotely located computer system. The adapter card comprises a local bus that interfaces to an input/output bus of the first computer system when the adapter card is connected to the first computer system, a graphics controller coupled to the local bus that interacts with the first computer system to generate a representation of a console screen of the first computer system, a network interface controller coupled to the local bus that provides a connection to the network, and a processor coupled to the local bus that determines changes in the representation of the console screen of the first computer system and that transmits information about the changes to the remotely located computer system via the network interface controller.
    Type: Grant
    Filed: May 12, 1999
    Date of Patent: May 4, 2004
    Assignee: Unisys Corporation
    Inventor: Terrence V. Powderly
  • Patent number: 6732068
    Abstract: A hardware emulation system is disclosed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces. A logic analyzer for a hardware emulation system is also disclosed. The logic circuits necessary for executing logic analyzer functions is programmed into the programmable resources in the logic chips of the emulation system.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: May 4, 2004
    Assignee: Quickturn Design Systems Inc.
    Inventors: Stephen P. Sample, Mikhail Bershteyn, Michael R. Butts, Jerry R. Bauer
  • Publication number: 20040078185
    Abstract: A method and apparatus is provided which reduces the equipment and time requirements for hard disk drive performance testing during manufacturing. This invention executes self-contained performance testing code that resides within the drive's manufacturing firmware, rather than relying on external testers. The invention involves exercising the drive's enqueue, dequeue, and command execution firmware, as well as the physical process of reading and writing data by simulating the host interface in code. The invention enqueues commands that typify the desired workload, allows a command ordering algorithm to sort the commands for execution, and allows the drive side code to execute the commands just as if an external host interface were attached. The invention is advantageous because the performance testing can be done by only applying power to the drive. The present invention also lends itself to performance tuning that can be done in manufacturing, to reduce drive-to-drive performance variations.
    Type: Application
    Filed: October 17, 2002
    Publication date: April 22, 2004
    Applicant: International Business Machines Corporation
    Inventors: Trevor James Briggs, Adam Michael Espeseth, Robert Anton Steinbach, Christopher David Wiederholt
  • Patent number: 6725189
    Abstract: An adapter program couples a legacy operating system to a driver program of an I/O channel which has an incompatible interface to a native operating system. The adapter program includes a translator which receives legacy control structures from the legacy operating system that represents a legacy I/O instruction. The adapter program also includes an interface to the driver program which simulates the native operating system interface. The adapter program further includes an emulator for performing the I/O instruction by interacting with the driver program thru the simulated native operating system interface.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: April 20, 2004
    Assignee: Unisys Corporation
    Inventors: Darrell Rex Pett, Lewis Rossland Carlson, Dennis Charles Gassman
  • Patent number: 6718410
    Abstract: A tape drive method and apparatus is disclosed wherein payload data is sent from a host computer device to a tape drive data storage device in data block sizes which are specified by the host computer, for example in the case of a tape drive presenting a CD-ROM image, in 2 kbyte blocks, whereas the tape drive writes to tape media in an optimal block size required to keep the tape media streaming across the tape heads, for example 8 kbyte blocks. Conversion between block size is achieved by buffering incoming payload data in a buffer, and by reading or writing to the tape media in the optimum block size.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: April 6, 2004
    Assignee: Hewlett-Packard Development Company, L.C.
    Inventor: Alastair Slater
  • Patent number: 6715043
    Abstract: The present invention is a method and system for accessing at least one emulated readable storage in a processor-based system. The system comprises a memory for storing instruction sequences by which the processor-based system is processed. The memory has at least one readable emulated storage location. A processor is coupled to the memory, and the stored instruction sequences cause the processor to (a) detect an access to at least one readable storage element; (b) transfer the access to the at least one readable storage element to an access to at least one readable emulated storage location; and (c) process an instruction sequence corresponding to the access to the at least one readable storage element.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: March 30, 2004
    Assignee: Phoenix Technologies Ltd.
    Inventor: Curtis E. Stevens
  • Patent number: 6704824
    Abstract: A peripheral device and a method for operating the peripheral device for automatic installation, in which the method includes coupling the peripheral device to a computer and sending a first device identification from the peripheral device to the computer. The peripheral device emulates a device of a type determined by the first device identification, including transferring a driver from the peripheral device to the computer. Then, the peripheral device sends a second device identification from the peripheral device to the computer, such that the sent device identification is for a device supported by the driver transferred to the computer. The peripheral device is then operates by interacting with the driver on the computer.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: March 9, 2004
    Assignee: Inline Connection Corporation
    Inventor: David D. Goodman
  • Patent number: 6684277
    Abstract: The present invention provides a method and computer readable medium with program instructions for automatically verifying bus transactions. The method includes: parsing a parameter code for the bus transactions, wherein the parameter code comprises a plurality of expected parameter values for the bus transactions; automatically integrating the parsed parameter code into a checking program; and automatically executing the checking program, wherein the checking program compares the plurality of expected parameter values with a plurality of actual parameter values for the bus transactions. The bus transaction verification method in accordance with the present invention automates the coding of expected parameter values for each test case into a checking program and automates the execution of the checking program, where the checking program compares the expected parameter values with the actual parameter values.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter Dean LaFauci, Bryan Heath Stypmann, Paul David Bryan
  • Patent number: 6684182
    Abstract: A spacecraft emulation system that can emulate both the attitude control subsystem and the non-attitude control subsystem is integrated into a single compact unit. The unit includes an emulated spacecraft control processor for processing attitude control information and an emulated central command and telemetry unit for interfacing simulated spacecraft data. The inlet also includes a first simulation engine that is operative to simulate the spacecraft attitude control system and a second simulation engine that is operative to simulate the spacecraft power, thermal, propulsion and payload subsystems. Both the first and second simulation engines are connected to the emulated spacecraft control processor via a respective bus. A host computer provides the command data and receives the telemetry data from the emulated spacecraft control processor.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: January 27, 2004
    Assignee: Hughes Electronics Corporation
    Inventors: Jeffrey J. Gold, David L. Koza, Michael J. Surace, Steven R. Zammit
  • Patent number: 6678646
    Abstract: A method for implementing the physical design for a dynamically reconfigurable logic circuit. The method is carried out using software that forms a physical design flow to take a design specification from a schematic or high-level description language (HDL) through to FPGA configuration bitstream files. The method involves reading a design netlist that was entered, the design netlist including a set of static macros and a set of reconfigurable macro contexts. Then, each of the reconfigurable macros are compiled and an initial device context is placed and routed. The device context is updated by arbitrarily selecting a context for each reconfigurable macro, placing and routing the updated device context and repeating the steps of updating, placing and routing until all of the reconfigurable macro contexts have been placed and routed. Then, after the compilation process is complete, full, partial, and incremental bitstream files are generated.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: January 13, 2004
    Assignee: Atmel Corporation
    Inventors: David A. McConnell, Ajithkumar V. Dasari, Martin T. Mason
  • Publication number: 20030225567
    Abstract: The system and method for emulating a non-volatile memory, in particular a flash memory, embedded in an integrated circuit comprises an integrated circuit with the non-volatile memory, a processor, an interface, a control unit, which controls the embedded non-volatile memory and the interface, and a bus, which connects controllably the interface, the processor and the control unit. The system further comprises an external memory, connected to the interface, in which memory the emulation takes place. The control unit connects the external memory to the bus over the interface or the non-volatile memory to the bus. By using such a design, emulation of a slow embedded (internal) memory is simplified and modifications, e.g. software break points, patches and downloads, can be easily introduced, and processor accesses may be traced.
    Type: Application
    Filed: March 4, 2003
    Publication date: December 4, 2003
    Inventors: Stefan Marco Koch, Hans-Joachim Gelke, Axel Hertwig
  • Publication number: 20030225566
    Abstract: A method and system is provided for emulating individual JTAG devices in a multiple device boundary scan chain. One or more target devices within the scan chain are selected, and other devices within the scan chain may be placed into bypass mode. Emulation sequences are sent to a buffer in a server, and subsequently sent to the scan chain, so that the emulation sequences bypass the other device(s) and are executed by the target device(s).
    Type: Application
    Filed: June 3, 2002
    Publication date: December 4, 2003
    Inventors: James J. O'Brein, Eric Gregori
  • Publication number: 20030220782
    Abstract: A configuration contains a test unit that, during emulation, replaces a program-controlled unit that is used in normal operation of the system containing the program-controlled unit. The test unit has a first program-controlled unit and a second program-controlled unit. The first program-controlled unit contains only some of the components of the program-controlled unit replaced by the test unit, and the second program-controlled unit contains those components of the program-controlled unit replaced by the test unit that are not contained in the first program-controlled unit. In addition, the first program-controlled unit contains a control device which monitors whether one of the components of the first program-controlled unit requests access to a component not present in the first program-controlled unit and which, if this is so, prompts appropriate access to the corresponding component in the second program-controlled unit.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 27, 2003
    Inventor: Albrecht Mayer
  • Patent number: 6654851
    Abstract: The invention includes a disk drive that includes a controller that is connected to a physical media. The controller includes a processor that is connected a controller memory. The disk drive is responsive to communication from a host computer. The controller memory includes a set of computer program instructions and data to write data to the disk drive memory as a linear sequence of data bytes in response to a write data command from the computer. In yet other embodiments, the invention uses hardware data compression to compress data before it is written to a disk drive, and to decompress data before compressed data is returned to a computer.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: November 25, 2003
    Assignee: International Business Machine Corporation
    Inventor: Brian D. McKean
  • Patent number: 6651107
    Abstract: The present invention provides a network interface adapter for connecting a client computer to a computer network that includes a reduced hardware media access controller (MAC) coupled through a physical interface (PHY) to the network physical link. A significant portion of the MAC functionality is implemented as software within the processor of the host client computer. The hardware portion of the preferred MAC implementation provides memory for buffering communications between the PHY and the client computer. The preferred hardware aspects of a MAC in accordance with the present invention also includes a register interface for register-driven communications between the hardware portion of the MAC and the software portions of the MAC implemented within the client computer. By implementing most of the MAC functionality in software within the host computer, the preferred MAC provides lower cost, lower power consumption, and generally greater flexibility.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: November 18, 2003
    Assignee: Intel Corporation
    Inventors: Michael R. Conley, Eric Henderson
  • Publication number: 20030195737
    Abstract: The present invention is directed to a peripheral device that integrally provides a program relating to the peripheral device, and may be connected to a computer system. The peripheral device includes a peripheral function subsystem for providing a peripheral device functionality. The peripheral device further includes a solid-state memory device storing a program relating to the peripheral device in a format used by disk drives. When the peripheral device is connected to a computer system, the program stored in the solid-state memory device is immediately available, and can be read by the computer system as though it was stored on a disk drive connected to the computer system.
    Type: Application
    Filed: June 2, 2003
    Publication date: October 16, 2003
    Applicant: Microsoft Corporation
    Inventors: Daniel Shapiro, Raymond D. Pedrizetti
  • Publication number: 20030191623
    Abstract: A computer system comprises a processor and an emulator coupled to the processor and having an external interface capable of communicating information to a network. The emulator emulates a bootable disc drive and supplies a bootable operating system to the processor from the network.
    Type: Application
    Filed: December 5, 2002
    Publication date: October 9, 2003
    Applicant: Oak Technology, Inc.
    Inventor: Daniel R. Salmonsen
  • Patent number: 6629197
    Abstract: A method for processing digital audio data is presented. A control signal for a CD-changer unit is received and interpreted by a digital audio unit that stores digital audio data/files and that determines a CD-changer unit operation that would be performed by the CD-changer unit in response to the CD-changer unit receiving the control signal. The digital audio unit then emulates the CD-changer unit operation. The CD-changer unit to be emulated by the digital audio unit can be selected. The digital audio data stored by the digital audio unit can be organized as virtual CD-ROMs. By emulating the operations of multiple types of CD-changer units, a single digital audio unit can be inserted in many different digital audio systems, thereby extending the functionality of a digital audio system to include storage of softcopy digital audio files that may be accessed through controls and commands for a CD-changer unit.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kulvir Singh Bhogal, Nizamudeen Ishmael, Jr., Baljeet Singh Baweja, Mandeep Sidhu
  • Patent number: 6625572
    Abstract: Clock cycle simulation involves modeling of clock cycles in a hardware module with a software model. Each simulated clock cycle involves several individual stages: Start, Execute, and End. During the start stage, output pin values for the model are calculated from an initial state of the module being simulated. Between the start stage and the execution stage, a combinatorial function of the modules outputs can be calculated. These calculated functions may be used as inputs to the modules in the execution stage. Afterwards, during the execute stage, input pin values are received by the model and the next state of the module is calculated based upon the current module state and the input pin values. Finally, during the last stage, i.e., the end stage, the internal state is updated; the internal state is defined as a set of the module's internal register and memory values.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: September 23, 2003
    Assignee: LSI Logic Corporation
    Inventors: Boris Zemlyak, Ronen Perets, Brian F. Schoner
  • Publication number: 20030163610
    Abstract: Computer systems, software and methods that allow information from a nonvolatile removable media device, such as a CD-ROM or DVD, or the like, to be placed on a mass storage device. Once the information from the non-volatile removable media device is on the mass storage device, a computer operating system can then use the information in the same manner as it would normally use a CD-ROM, DVD, or other media inserted in its reader. In accordance with the present invention, the systems, software and methods are operative to create a boot engineering extension record (BEER) on the hard disk drive. The boot engineering extension record is configured to have SETMAX pointer that points to a user area of the hard disk drive and a service area pointer that points to a PARTIES service area that is part of a host protected area. Data derived from the removable storage media device is stored in the PARTIES service area, which will be used in an emulated removable storage media device.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 28, 2003
    Inventor: Curtis E. Stevens
  • Patent number: 6611796
    Abstract: An emulation device is provided that has a processor core that is a programmable digital signal processor (DSP). Several blocks of memory within the emulation device can be configured to emulate blocks of memory on a target processor system. Each block of memory responds to three different memory buses and can receive up the three simultaneous memory requests. Arbitration circuitry selects the highest priority memory request for service on each cycle. Each memory block is configured to respond to a block of addresses beginning at a selected starting address. Two blocks of memory can be linked to form a single merged block of memory in which both arbitration circuits operate in lock step by masking a most significant address bit of the block of address selected for the memory block.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: August 26, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Venkatesh Natarajan, Ajit D. Gupte
  • Patent number: 6606590
    Abstract: In-circuit-emulation of an integrated circuit including a digital data processor capable of executing program instructions selectively assigns emulation resources to either the emulation function or the application program. Each emulation resource can have three states: unassigned; an emulation state assigned to emulation function; or an application state assigned to the application program. An emulation resource in the unassigned state may be assigned to emulation or application by writing to a predetermined data register. Emulation resources assigned to emulation return to unassigned state upon a test logic reset. Emulation resources assigned to the application return to the unassigned state upon an integrated circuit logic reset.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: August 12, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Gary L. Swoboda, David R. Matt
  • Patent number: 6606589
    Abstract: Disclosed is a solid state disk emulator system for significantly improving access time, i.e., improving both the seek time and the rotational latency. The disk emulator complies with the SMD interface convention and thus to the central processor and the SMD disk controller, the disk emulator appears as a disk with virtually a zero access time. In one embodiment, the primary systems of the disk emulator are a 66-bit shift register, a parity circuit, a latch circuit, a 66-bit parallel bus and a dynamic random access memory (DRAM) array. Each of these systems interface with control systems of the disk emulator which provide the signals required for the read and write operations of the disk emulator. An error correction process is incorporated in the disk emulator which corrects single bit hard memory errors using only a single parity bit.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: August 12, 2003
    Assignee: Database Excelleration Systems, Inc.
    Inventors: George B. Tuma, Wade B. Tuma, Robert E. Warne
  • Publication number: 20030120476
    Abstract: An improved interface between a host computer and a tape drive emulation system includes software interfaces for communicating control, configuration, and policy data and a hardware interface for providing redundancy and fan-out between the main controller and host channels.
    Type: Application
    Filed: November 8, 2002
    Publication date: June 26, 2003
    Inventors: Neville Yates, Jeffrey Miller, Touraj Boussina, Allen Harano
  • Publication number: 20030115038
    Abstract: A method and system for emulating an electronic apparatus is provided. The system includes a portable electronic device to emulate functionality provided by the electronic apparatus, and a separate access device. The portable electronic device includes a wireless communication module and the access device includes a display and a wireless communication interface to communicate with the wireless communication module when the portable electronic device is within wireless communication range of the access device. The display provides a display layout that simulates the physical appearance of the electronic apparatus.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Inventors: Roy Want, James Kardach, Graham D. Kirby
  • Patent number: 6574588
    Abstract: The present invention is directed to a peripheral device that integrally provides a program relating to the peripheral device, and may be connected to a computer system. The peripheral device includes a peripheral function subsystem for providing a peripheral device functionality. The peripheral device further includes a solid-state memory device storing a program relating to the peripheral device in a format used by disk drives. When the peripheral device is connected to a computer system, the program stored in the solid-state memory device is immediately available, and can be read by the computer system as though it was stored on a disk drive connected to the computer system.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: June 3, 2003
    Assignee: Microsoft Corporation
    Inventors: Daniel Shapiro, Raymond D. Pedrizetti