Abstract: A pseudorandom signal generator uses two pseudorandom signals having a small correlation with each other to generate a cross-correlation function of the two pseudorandom signals, and to output a value of the cross-correlation function as a new pseudorandom signal. As the new pseudorandom signal as a result has random phases and random amplitudes, many new pseudorandom signals can be generated by the two existing pseudorandom signals.

Abstract: Electronic watermarks in digital documents can be detected, even if the content of the digital documents has been subjected to distortion or other attempts to hide or destroy the watermarks. One method involves inputting the distorted image and comparison information, the comparison information including at least one of the original image or information used for embedding the electronic watermark; dividing a domain of the original image into a plurality of patches, based on the comparison information; inputting affine parameters of a predetermined patch from among the patches in the original image; extracting a patch candidate from the distorted image; using a predetermined electronic watermark detection method, judging whether the patch candidate in the distorted image adequately correlates with a neighboring patch in the original image; when the judging indicates an adequate correlation, outputting a part of the electronic watermark.

Abstract: Method and apparatus for determining at least one characteristic of a digital data signal. The method includes identifying at least one region of a waveform such as an Eye Diagram that contains information for determining at least one characteristic of interest of the digital data signal. Sufficient samples of the digital data signal are then taken to fully construct only the identified at least one region of the Eye Diagram without fully constructing the entire Eye diagram, and the at least one characteristic of interest is then determined from the fully constructed at least one region of the Eye Diagram.

Abstract: A correlator circuit for calculating the correlation between a signal sequence and a binary reference sequence. A unique method of calculating the correlation value between the two sequences provides for the reduction in necessary computations and, as a result, a reduction in the amount of time expended in calculating the correlation is realized.

Abstract: Improved techniques for calculating decision parameters in an IMT-2000 system is disclosed. In an apparatus for calculating decision parameters, there is provided a correlation value calculation unit having a number of correlation value calculators, each of which calculates a correlation value between selected information that is selected at the mini-slot selection unit and one of capable input signals. In order to selectively operate the correlation value calculators, there is provided a correlation circuit control unit controlling the operation of each of the correlation value calculators by using each of the comparison between the received correlation value to a predetermined threshold value. Accordingly, the power consumption of the correlation value calculators is reduced. And, the decision parameter is selected from the decision parameters previously selected during the divided monitoring section, thereby enabling high-speed cell search.

Abstract: In a direct sequence spread spectrum receiver an “as received” signal is decoded by correlation. Phase shift key, complementary code key modulated signals are correlated by transforming samples of the signal in a series of butterfly transform processors producing a number of correlations equal to the number of possible transmitted codewords. The largest correlation is selected as the transmitted signal. To reduce the number of processors required to transform a multi-level phase shift key signal, a correlation method and apparatus are disclosed wherein the butterfly transforms are modified with additional twiddle factors selected from a set of twiddle factors. In the alternative, the inputs to the butterfly processors of a correlator can be weighted as a function the additional twiddle factors. A set of signal samples is correlated for each combination of the set of additional twiddle factors and the largest correlation selected as the signal.

Abstract: A fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X0-XM-1) with encoding coefficients (C0-CM-1), wherein each of (X0-XM-1) is represented by one or more bits and each said coefficient is represented by one or more bits, wherein each coefficient has k possible states, and wherein M is greater than 1. X0 is multiplied by each state (C0(0) through C0(k-1)) of the coefficient C0, thereby generating results X0C0(0) through X0C0(k-1). This is repeated for data bits (X1-XM-1) and corresponding coefficients (C1-CM-1), respectively. The results are grouped into N groups. Members of each of the N groups are added to one another, thereby generating a first layer of correlation results. The first layer of results is grouped and the members of each group are summed with one another to generate a second layer of results. This process is repeated until a final layer of results is generated.

Abstract: One aspect of the invention provides a novel scheme to synchronize signal reception for a receiver device. In one embodiment, multi-symbol correlation of a first signal and a reference signal is performed. The reference signal corresponds to symbols denoting a synchronization or alignment marker. For every first signal sample, an indication of the degree of similarity between a plurality of the first signal symbols and reference signal symbols is generate as a second signal. This second signal is then nonlinearly processed, linearly processed, and then nonlinearly processed over time to determine if indications of high degrees of correlation occur at periodic intervals. If so, then these are considered synchronization markers and are used to synchronize signal reception of the receiver device.

Abstract: An enhanced architecture time-shared data correlator for performing a predetermined number of correlation processes. A data shift register receives input data and loads the input data. A reference shift register receives reference data and loads and circulates the reference data. A pulse correlator connected to the shift register and the reference shift register correlates the input data with the corresponding reference data and provides a pulse correlator output. An accumulator connected to the pulse correlator receives and adds the pulse correlator outputs from the correlation processes to produce a correlator output corresponding to the predetermined number of correlation processes.

Abstract: A method for detecting a positioning signal includes (a) correlating a segment of a received positioning signal with a reference signal of a selected code phase and frequency to obtain a correlation value, (b) if the correlation value is less than a predetermined minimum, assigning the correlation value to the predetermined minimum, and (c) accumulating the correlation value in a sum of correlation values obtained using other segments of the received positioning signal. In addition, the correlation value may be reduced by a predetermined value, which is preferably an expected mean value for a noise component in the segment of the received positioning signal.

Abstract: A semiconductor integrated circuit for processing a plurality of received broadcast signals, such as GPS signals, is operable in two modes: acquisition and tracking. In an acquisition mode, a memory arrangement comprising two circulating shift registers circulates samples of a received signal for correlation with a locally generated version of a GPS code. In a tracking mode, the sampled signal is provided direct to the correlators. The same correlators are thereby used to increase acquisition speed.

Abstract: An improved mechanism for performing different types of digital signal processing functions, including correlation, sorting, and filtering operations. The mechanism includes a plurality of computational cells which can be dynamically configured (and reconfigured) in parallel to perform the different types of digital signal processing functions. Preferably, the computation cells carry out such digital signal processing operations in parallel without the need for extensive iteration. Such parallel configuration and subsequent parallel processing operations provide improved computational performance.

Abstract: A parallel bit correlator for recognizing a predetermined bit pattern including a predefined number m of bits in a stream of data bits including identifying successive sets of m bits in a stream of data bits and simultaneously comparing each of the sets of m bits to the predetermined bit pattern for detecting the presence of the predetermined bit pattern in the stream of data.

Abstract: Digital implementation of electronic article surveillance (EAS) detection filtering for pulsed EAS systems is provided. Embodiments include direct implementation as a quadrature matched filter bank, as an envelope detector, a correlation receiver, and as a discrete Fourier transform. Pre-detection nonlinear filtering is also provided for impulsive noise environments.

Abstract: Provided is an apparatus for detecting a correlation of samples with a spread code comprising: an L-chip accumulator which inputs the samples to generate and output an intermediate correlation signal of a bit width of W, wherein W is an integer larger than one; memories as many as M−1, each of which has a data width of 2W bits and addresses as many as L×N/2 and stores samples of the intermediate correlation signal as many as L×N while combining two samples as one pair; an adder which has input terminals as many as M and inputs from one of the input terminals the intermediate correlation signal which is outputted from the L-chip accumulator and from the other of the input terminals the intermediate correlation signal which is outputted from a corresponding memory among the memories; and a controller which supplies the intermediate correlation signal outputted from the L-chip accumulator to the memories as many as M−1 in rotation with a unit of L×N samples, and reads, and supplies

Abstract: A portable terminal has a level detect or which compares profile data generated by a profile generator with a threshold value, and determines a sampling rate for a correlating process performed by a correlator based on the result of the comparison. The sampling rate is determined in order to increase the sampling rate at profile points in excess of the threshold value, of the profile data. Therefore, profile data is generated highly accurately at a higher sampling clock rate at points which require a higher accuracy, and profile data is generated at a lower sampling clock rate at points which do not require such a higher accuracy.

Abstract: A method for correlating an input signal to a signature is provided. The method compares an input stream with a signature element-by-element as the input stream is received. The method restarts the comparison using the first element of the signature when an element in the input stream does not match the compared element in the signature and declares correlation when consecutive elements in the input stream match corresponding elements of the entire signature.

Abstract: The present invention groups a set of N, nearly orthogonal, CCK code words into M subgroups, with each subgroup consisting of N/M orthogonal code words. For the 64-ary CCK communication standard for wireless local area networks (WLAN), N is 64 and M is preferably 8. Based on the orthogonal subgrouping, most significant bit (MSB) comparitors, instead of full-scale comparitors, are used to compare cross-correlations for each subgroup. In the subgroup containing the desired maximum correlation, all other cross-correlations, except the maximum, are zero in an ideal case, or very close to zero in a noisy environment due to the selected orthogonality. The maximum correlation value can be distinguished by looking at only the most significant bit or bits among all the cross-correlations. In the subgroups that do not contain the global, maximum correlation value, it does not matter which cross-correlation value is picked.

Abstract: A device for carrying out search procedures includes a memory for storing a digital received data sequence, and a memory storing a predetermined correlation data sequence. A correlation device has a first section, in which sequence elements of the received data sequence are correlated with sequence elements of the correlation data sequence. A variable number K of sequence element correlation results are summed in the second section, in order to form an accumulated correlation result.

Abstract: A complex signal correlator such as can be implemented in a correlation detector system affords a unique algorithm which estimates the codifference correlation between two complex signals based on the sum and difference of codifference estimates, each codifference estimate having equivalently associated therewith a dispersion estimate. Typical embodiments provide a receiving antenna and a receiver inclusive of the codifference correlator, wherein radio frequency waves are down converted and sampled, the sampled signals are correlated with a reference signal contained in a memory, and the resultant correlation signal is detected and transduced. The inventive correlator is based on an alpha-stable distribution and, in comparison with conventional alpha-stable distribution-based correlators, can more effectively operate in a realm wherein alpha is less than one.

Abstract: An optical flow sensor determines the velocity of a moving flow of air or other gas utilizing a plurality of photodetectors spaced apart in a direction parallel to the direction of gas flow. An optical beam is transmitted to the photodetectors across the flowing gas. Scintillations that occur in the flowing gas due to eddies and particulates in the gas are detected in the photodetectors at slightly different times. The output signals of the photodetectors are conditioned, amplified and transformed to digital form. Temporal cross correlation analysis is then performed on the digitized signals in a digital signal processor utilizing a fast correlation algorithm in which the total number of calculations is proportional to 2N, as contrasted with conventional systems in which the number of correlations is proportional to N2. A time differential between signals from the different photodetectors is then calculated electronically.

Abstract: A time-efficient real-time correlator is provided for use in a receiver of a wireless communications system. The correlator correlates a signal received by the receiver with a pseudo-random number (PN) code in order to determine the time delay of the received signal. The correlator requires no memory for storing samples of the received signal. A shift register having only W storage elements is utilized for storing the samples of the PN code sequence, where W is a positive integer corresponding to the length of the correlation window. W+1 correlation results storage elements are utilized to store correlation result values. When the correlator receives a current sample of the incoming signal, the current sample r(j) is multiplied by each of the samples of the PN code sequence to obtain products. The correlation result values stored in the correlation results storage elements are added to the products and the resulting sum is stored in the correlation results storage elements.

Abstract: Timing jitter sequences &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] of respective clock signals under measurement xj(t) and xk(t) are obtained, and a covariance &sgr;tj,tk=(1/N)&Sgr;i=1N&Dgr;&phgr;j[i]·&Dgr;&phgr;k[i] is obtained. In addition, root-mean-square values &sgr;tj and &sgr;tk of the respective &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] are obtained, and a cross-correlation coefficient &rgr;=&sgr;tj,tk/(&sgr;tj·&sgr;tk) between the xj(t) and xk(t) is calculated.

Abstract: A convolution method and apparatus of time domain convolving an input signal with a second signal is disclosed comprising the steps of; dividing the second signal into a series of segments; determining a magnitude envelope for each of the segments; scaling the signal values within each segments relative to the envelope to produce corresponding segment scaled signal values; multiplying the segment scaled values by a corresponding input signal value to produce corresponding segment output values; scaling the segment output values by a segment scale factor to produce corresponding scaled segment outputs; and adding the scaled segment output to produce a time domain output.

Abstract: A technique for correlating a stream of signal sample values with a predetermined binary code having a plurality of binary code bits is disclosed. The technique is realized by forming precombinations of groups of the signal sample values in the stream, and then temporally ordering the precombinations. Particular ones of the temporally ordered precombinations are selected based upon particular combinations of the plurality of binary code bits. The particular selected ones of the temporally ordered precombinations are then combined to form a correlation.

Abstract: An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The simultaneous detection of multiple frequencies allows the receiver to search the frequency range of the transmitted signal in larger increments of frequency, thereby increasing the speed of acquisition. One receiver does not use coherent integration before computation of the transform and advantageously maintains a flat frequency response. The flat frequency response of the DFT circuit enables searching of multiple frequency offsets without CPU intensive processing to compensate for frequency response variations. A receiver can include a Doppler correction circuit, which permits correlation data with frequency shift in the code to be non-coherently integrated among relatively fewer addresses or tap positions in memory.

Abstract: A DAB (Digital Audio Broadcasting) receiver includes a delay circuit for delaying a received DAB signal by a prescribed period, a correlation circuit for taking correlation between a delayed output of the delay circuit and the DAB signal, a moving average circuit for moving-averaging a correlation output of the correlation circuit over a width that is equal to a guard period, a peak detection circuit for detecting a position in time of a peak of a moving average output of the moving average circuit, a calculation circuit for calculating an error in a reception frequency based on a phase deviation in the DAB signal at the position in time that is indicated by a peak detection output of the peak detection circuit, an FFT (Fast Fourier Transform) circuit for subjecting the DAB signal to FFT processing, and a detection circuit for determining a reception center frequency based on an FFT output of the FFT circuit.

Abstract: There is provided a process analysis method capable of clustering of executed processes and extraction of similar processes.

Abstract: A correlator includes a circuit for serially receiving in phase (I) and quadrature (Q) signal data along parallel I and Q signal channels and converting the data to blocks of n bit parallel I and n bit parallel Q signal data. At least one programmable read only memory (PROM) stores I and Q reference data. The memory receives and stores within each respective parallel I and Q signal channel a current block of n bit parallel I and n bit parallel Q signal data and the immediately previous received blocks of n bit parallel I and n bit parallel Q signal data. A data bus receives the n bit parallel I and Q reference data and the n bit parallel I and Q signal data. The n bit parallel I and Q reference data are correlated with a one bit shifted version of the respective n bit parallel I and Q signal data from an adjacent previous path to produce a correlated I component signal output and a correlated Q component signal output.

Abstract: An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The simultaneous detection of multiple frequencies allows the receiver to search the frequency range of the transmitted signal in larger increments of frequency, thereby increasing the speed of acquisition. One receiver does not use coherent integration before computation of the transform and advantageously maintains a flat frequency response. The flat frequency response of the DFT circuit enables searching of multiple frequency offsets without CPU intensive processing to compensate for frequency response variations. A receiver can include a Doppler correction circuit, which permits correlation data with frequency shift in the code to be non-coherently integrated among relatively fewer addresses or tap positions in memory.

Abstract: A parallel bit correlator for recognizing a predetermined bit pattern including a predefined number m of bits in a stream of data bits including identifying successive sets of m bits in a stream of data bits and simultaneously comparing each of the sets of m bits to the predetermined bit pattern for detecting the presence of the predetermined bit pattern in the stream of data.

Abstract: A correlator circuit for calculating the correlation between a signal sequence and a binary reference sequence. A unique method of calculating the correlation value between the two sequences provides for the reduction in necessary computations and, as a result, a reduction in the amount of time expended in calculating the correlation is realized.

Abstract: A fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X0-XM-1) with encoding coefficients (C0-CM-1), wherein each of (X0-XM-1) is represented by one or more bits and each said coefficient is represented by one or more bits, wherein each coefficient has k possible states, and wherein M is greater than 1. In accordance with the invention, X0 is multiplied by each state (C0(0) through C0(k-1)) of the coefficient C0, thereby generating results X0C0(0) through X0C0(k-1). This is repeating for data bits (X1-XM-1) and corresponding coefficients (C1-CM-1), respectively. The results are grouped into N groups. Members of each of the N groups are added to one another, thereby generating a first layer of correlation results. The first layer of results is grouped and the members of each group are summed with one another to generate a second layer of results. This process is repeated as necessary until a final layer of results is generated.

Abstract: A correlator and method of correlating include a circuit that serially receives in phase (I) and quadrature (Q) signal data along parallel I and Q signal channels at one input bit time periods and converts the data into blocks of n bit parallel I and n bit parallel Q signal data. A data bus receives the signal and reference data. A multiplexer is positioned in each of the n parallel paths extending from the data bus and receives the n bit parallel I and Q reference data and a one bit shifted version of the respective n bit parallel I and Q signal data from the adjacent previous path. Each multiplexer includes I and Q summed outputs based on the value of I and Q reference data on a bit-by-bit basis. An n bit Wallace Tree Adder is connected to each of the I and Q summed outputs for each multiplexer within each of the n parallel paths and computes a count based on the number of bits that are set out of n bits to form partial correlation products.

Abstract: A communications system for determining the position and velocity of an object using a plurality of GPS signals transmitted by a plurality of GPS sources includes an interrogator remote from the object and responsive to the plurality of GPS signals. The interrogator transmits an RF signal including GPS source information and at least one of frequency information and time and code phase information of at least one of the GPS signals. The system also includes a transponder positioned on the object and responsive to the RF signal and the plurality of GPS signals. The transponder tracks one of the plurality of GPS signals in response to the GPS source information and the frequency information and time and code phase information. The transponder generates a correlation snapshot and transmits the snapshot to the interrogator.

Abstract: A matched filter computes complex correlations between a sequence of complex input values and a complex code. The matched filter includes a set of N changeover switches having a first input connected to receive real parts of the input sample values and a second input connected to receive imaginary parts of the input sample values. The switches further include a control input for receiving a control signal in first and second states. When the control signal in the first state is applied, a first output of the changeover switch contains the real value part of the input sample values and a second input contains the imaginary part of the input sample values. When the control signal is in the second state the first input contains the imaginary value part of the input sample values and the second input contains the real value part of the input sample values.

Abstract: A digital/analogue communication system is described, where data is generated and received by a processing unit in a digital format and transmitted via a communication path in an analogue format. A DSP unit receives a sequence of multi-bit digital samples at a first sampling rate and generates a plurality of interpolated samples. A bit generation unit receives the multi-bit digital samples and the interpolated samples and generates a sequence of single-bit digital samples at a second sampling rate which is higher than the first sampling rate. A set of single wire communication paths are used to convey the single-bit digital samples to respective digital to analogue converters. The use of single-bit digital samples allows them to be held in a buffer. A buffer controller can be provided to delete single-bit digital samples from the buffer so as to match the sampling times at at least one reference frequency of a received signal with sampling times of a generated signal.

Abstract: Methods and apparatus for implementing an enhanced digital signal processor through the addition of modular computation units which can be operated in parallel are described. In various embodiments the computation units are implemented as configurable computation cells which are arranged to form a computation engine which supplements conventional DSP circuitry. The computation cells can be used to perform frequently used DSP functions such a cross-correlation, sorting, FIR filtering quickly without the need for extensive iterative processing. By using the computation cells of the present invention in parallel, the computation of common DSP functions can be performed quickly and resulting in improvements in DSP performance as compared to convention DSPs.

Abstract: A correlation detecting device and method for detecting a specified code contained in a received signal. Is characterized by detecting a predetermined code from a received signal by a matched filter as well as detecting the average amplitude of the received signal, multiplying the detected signal of the average amplitude by a threshold, comparing the multiplied signal with the output of the matched filter, and obtaining a correlation detecting signal based on the comparison. This can assure a correlation detection in a small circuitry at a low cost with only a multiplier as the computational unit for correlation detection.

Abstract: A technique for correlating a sequence of signal sample values with a predetermined digital code to produce correlation values for shifts in the sequence of signal sample values relative to the predetermined digital code is disclosed. The technique is realized by combining subgroups of the signal sample values in the sequence to form sets of precombinations, and then selecting one precombination from each set of precombinations to provide a plurality of selected precombinations. The plurality of selected precombinations are then added or subtracted to produce a correlation value corresponding to a shift in the sequence of signal sample values.

Abstract: A matched filter for use in a radio telephone receiver that receives Code Division Multiple Access (CDMA) signals. The matched filter produces precombinations of input values to significantly reduce the number of multiplication and addition operations, compared to conventional matched filters, required to produce a correlation value. This reduced number of required operations, along with a reduced number of delay elements required to despread CDMA signals, significantly reduces the overall power consumption of the matched filter. The use of such a matched filter in a device like a cellular phone, for example, would thus lead to longer battery life.

Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the “product” in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value |c| of the numerical value c, and a sign operation unit for evaluating a sign “sing (c)” of the numerical value c.

Abstract: Improved wavelength division multiplexed optical links and signal processing methods that employ cross tap equalization to reduce crosstalk arising from inadequate optical filtering. After optical filtering and photodetection, the wavelength division multiplexed signals adjacent either side of a signal whose crosstalk is to be reduced are sampled, weighted and are then subtracted from the signal whose crosstalk is to be reduced. This is done using adaptive correlation, performed simultaneously on all signals, each with respect to its respective adjacent channels. The present invention enables more closely spaced optical carriers to be used in the wavelength division multiplexed optical link.

Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the “product” in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value |c| of the numerical value c, and a sign operation unit for evaluating a sign “sign (c)” of the numerical value c.

Abstract: A method of correlating first and second digital signals which both contain series of numerical data values is disclosed together with a computer program, a computer-readable storage medium (24) and apparatus (21) for the same. The method comprising the steps of (a) sequentially calculating products of corresponding numerical data values of the first and second digital signals and providing a cumulative sum thereof; (b) upon deviation of the cumulative sum from between upper and lower thresholds levels, increasing or decreasing the cumulative sum by a predetermined amount so as to return the cumulative sum to between said threshold levels; and (c) providing a correlation parameter as a function of the number of occurrences of deviation of the cumulative sum from between upper and lower thresholds. The correlation parameter may either increase or decrease depending on whether the cumulative sum deviates above the upper threshold level or below the lower threshold level.

Abstract: A correlation detection device capable of detecting a prescribed code sequence from an input signal with a simple construction. Since the input signal (S40), after its amplitude is regulated to a fixed value, is entered into a matched filter (71), an accidental output by the matched filter of the correlation value having a large signal level can be prevented, and only the code sequence to be detected can be correctly detected.

Abstract: A programmable digital correlator device, and associated correlation method, with a very efficient structure. In one aspect, two or more correlators share a common data sequence shift register. In another aspect, the data sequence shift register is comprised of random access memory (RAM) modules which allow efficient construction in field programmable gate array (FPGA) logic devices. Two's-complement data samples are multiplied by a reference sequence to produce unfinished two's-complement products, the products are summed with unsigned arithmetic in an adder containing population counters, and a correction factor is added after all other calculations are complete to convert the unsigned result back to a two's-complement number.

Abstract: Described is an one bit matched filter for generating a sequences of correlations between a signal bit stream and a sample stream of n sample bits. The n sample bits are arranged in a rang of n bit positions n, n-1, . . . , 2, 1. Among the n sample bits, m boundary positions are defined based on the bit pattern of the sample stream, where m<n. At a specific time T(k), the m boundary positions are used to generate a Contribution (k) for a section of signal bits that are shifted into the n bit positions. At the time T(k), a Correlation (k) is generated by adding the Contribution (k) with the Correlation (k-1) that was generated at the previous time T(k-1).

Abstract: A programmable digital correlator device, and associated correlation method, with a very efficient structure. In one aspect, two or more correlators share a common data sequence shift register. In another aspect, the data sequence shift register is comprised of random access memory (RAM) modules which allow efficient construction in field programmable gate array (FPGA) logic devices. Two's-complement data samples are multiplied by a reference sequence to produce unfinished two's-complement products, the products are summed with unsigned arithmetic in an adder containing population counters, and a correction factor is added after all other calculations are complete to convert the unsigned result back to a two's-complement number.

Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the "product" in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value .vertline.c.vertline. of the numerical value c, and a sign operation unit for evaluating a sign "sing (c)" of the numerical value c.