Abstract: Described is an one bit matched filter for generating a sequences of correlations between a signal bit stream and a sample stream of n sample bits. The n sample bits are arranged in a rang of n bit positions n, n-1, . . . , 2, 1. Among the n sample bits, m boundary positions are defined based on the bit pattern of the sample stream, where m<n. At a specific time T(k), the m boundary positions are used to generate a Contribution (k) for a section of signal bits that are shifted into the n bit positions. At the time T(k), a Correlation (k) is generated by adding the Contribution (k) with the Correlation (k-1) that was generated at the previous time T(k-1).

Abstract: A programmable digital correlator device, and associated correlation method, with a very efficient structure. In one aspect, two or more correlators share a common data sequence shift register. In another aspect, the data sequence shift register is comprised of random access memory (RAM) modules which allow efficient construction in field programmable gate array (FPGA) logic devices. Two's-complement data samples are multiplied by a reference sequence to produce unfinished two's-complement products, the products are summed with unsigned arithmetic in an adder containing population counters, and a correction factor is added after all other calculations are complete to convert the unsigned result back to a two's-complement number.

Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the "product" in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value .vertline.c.vertline. of the numerical value c, and a sign operation unit for evaluating a sign "sing (c)" of the numerical value c.

Abstract: In a correlation arithmetic system adapted to detect a relative difference between two functions, an operation is simplified. This makes it possible to perform the operation with a small scale of hardware and also with great accuracy. There is adopted an operation g*h instead of the "product" in the correlation arithmetic operation. There is disclosed an arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived. The arithmetic unit has an absolute value operation unit for evaluating an absolute value .vertline.c.vertline. of the numerical value c, and a sign operation unit for evaluating a sign "sign (c)" of the numerical value c.

Abstract: Early and on-time signals are generated from a received CDMA signal for each PN code phase being searched, and the early and on-time signals are each divided into a number of subdwells sequentially in time. A correlation is then performed for each PN code phase search, on subdwells of the early and on-time signals for that PN code phase in a staggered manner in time, by alternating the correlation between the early and on-time signals during each sequential subdwell correlation. A detection statistic for the PN code phase is then generated from the correlation result. In an embodiment of the invention, two PN code phases are searched simultaneously by staggering the subdwell correlations in an alternate fashion between the early and on-time signals, so that each PN code phase uses a different set of subdwell correlations. In an alternative embodiment, a single PN code phase is searched by alternating the correlation between the early and on-time signals during each sequential subdwell correlation.

Abstract: A system solves a problem of a low accuracy in a low-energy frequency area when spectrum feature parameters are extracted with the use of linear analysis of speech or audio signals and a problem of a low accuracy in formant extracting when a spectrum approximation is slanted, and increases the extracting accuracy of spectrum feature parameters with respect to any given frequency band.

Abstract: An enhanced digital signal processor (EDSP) includes execution section that includes the following constituents: a processor, an arithmetic logic unit (ALU), a memory device for holding set of instructions for execution selected from enhanced set of instructions, a memory device for holding data, another clock generator for generating a plurality of clock signals coupled to above constituents. Internal communication bus coupled to the above constituents for affording controlled communication between them, a correlator, coupled to the bus, for communication with the execution section. The correlator having an input port for receiving external input data and an output port for outputting data.

Abstract: An improved method for computing sequence correlations utilizes pre-calculated look-up tables to reduce computational burdens. A sample sequence of symbols, such as a received sequence of symbols, is divided into a series of subblocks. A look-up table of combinational values is built for each subblock wherein the combinational values are arithmetic sums of the symbols in the subblock, either as received or negated. Preferably, the combinational values are computed in Gray code order so as to take advantage of bit-shifting and sign changes to lessen computational burdens. Correlation factors with respect to a known sequence of symbols are then calculated using the combinational values from these pre-calculated tables whenever possible. The correlation factors are then used in a known fashion to reach a correlation result.

Abstract: The details of an improved correlator and efficient method of correlation are disclosed. The last M received signal samples are compared with all shifts of a given M-bit binary codeword. The correlator adds or subtracts each of the signal samples accordingly, as the corresponding shift of the codeword contains a binary "1" or "0" in that position. The total is output for each new signal sample received, with a shift of one position between the signal samples and the codeword.

Abstract: The present invention describes a method and apparatus for improving the autocorrelation performance in spread spectrum radar and communications systems by using a tri-state digital correlator to demodulate the received biphase modulated waveform. The tri-state correlator (100) includes a multiplexer (112) having a code input for receiving a tri-state code sequence, and three inputs each for receiving a sequence of data words including a first input for receiving a digitized signal data word, a second input for receiving an inverted digitized signal data word, and a third input for receiving a zero data word. The multiplexer includes an output and a means for producing a sequence of data words at the output, said means presenting at the output exactly one of the three data words appearing at either the first, second, or third input depending on which of the three code states appears at the code input.