Abstract: An out-of-band to optical conversion component is provided that uses a transmit disable signal and a receive loss of signal (LOS) signal built into optical small form-factor pluggable transceiver and cable to pass the out-of-band protocol between serial attached. SCSI enclosures. The transmit disable signal, when asserted, turns off the optical output, while the receive LOS signal detects the loss of signal. The out-of-band to optical conversion component sits in line on the serial attached SCSI data traffic and strips off the out-of-band signals from the serial attached SCSI expander so that only data flows over the optical cable. The out-of-band to optical conversion component sends the out-of-band signals to the other enclosure using the transmit disable pin on the small form-factor pluggable transceiver and cable. The other enclosure receives the message on the receive LOS signal and transmit it back onto the serial attached SCSI receive data pair.

Abstract: An interfacing device is configured to process one or more rules, based on sensor data, to perform a predetermined action. During operation, the device can establish a network connection with a device controller, and receives a device configuration that includes a rule for the interfacing device. The rule can include an action description for performing an action, and can include a condition that takes sensor data as input and indicates criteria for performing the action. The device can store the rule in a rule repository, and determines data generated by processing the rule's action description. When the device receives a data-subscription request for the data generated by processing the rule's action description, the device determines a remote interfacing device which issued the data-subscription request, and stores the data-subscription request, for the data generated by the rule's action description, in association with the remote interfacing device.

Abstract: Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a command, it examines the values of ID_a and ID_m relative to a third reference identifier (ID_s). If either ID_a or ID_m is equivalent to ID_s, the device executes the command, otherwise, the device ignores the command. By using two different identification methods, a system has options in choosing to activate devices, being able to selectively switch between selecting multiple devices and single devices in a quick manner. In another such method, a device may have a persistent area that stores identification information such as an ID_a. Thus, system functionality may remain independent from any defect/marginality associated with the physical or logical components required for initial ID_a assignment of all devices in the system.

Abstract: An integrated circuit (IC) can include an interface configured to receive packetized data specifying a programming instruction for a memory external to the integrated circuit over a first communication channel. The first communication channel can be an in-band signaling channel also used by the IC when performing a function independent of programming the memory. The IC can include a buffer having a first port coupled to the interface and a second port. The buffer can be configured to store the programming instruction extracted from the packetized data. The IC also can include a programmer coupled to the second port. The programmer can be configured to program the memory over a second communication channel different from the first communication channel responsive to interpretation of the programming instruction from the buffer.

Abstract: Integrating link calibration and dynamic topology discovery in a multi-processor system establishes a first of a plurality of processors in the multi-processor system as a director of integrated link calibration and dynamic topology discovery. A plurality of high speed interconnects connects the plurality of processors with each other. The director processor directs calibration of each of the plurality of high speed interconnects via a shared hardware resource. The shared hardware resource is shared among the plurality of processors. Topology of the multi-processor system is incrementally discovered as each of the plurality of high speed interconnects is calibrated based on a result of each of the plurality of high speed interconnects being calibrated.

Abstract: A Universal Serial Bus (USB) power supply method is provided. The method is applied to a USB client device to charge a battery of the USB client device. The USB client device is connected to a USB host device via a USB connection including a D+ signal wire and a D? signal wire. The USB power method includes: determining whether the USB host device is a dedicated charging port (DCP) in response to a connection event, providing a verification signal to the USB host device if the USB host device is a DCP, determining whether a verification response signal from the USB host device is received, and driving the USB host device to provide an auxiliary charging current via the D+ and D? signal lines for charging the battery when the verification response signal is received.

Abstract: In an apparatus according to one embodiment of the present disclosure, a communications link comprises a first device and a second device communicating with each other via the communications link at a plurality of different speeds. However, prior to communicating via the communications link for the first time at a second speed, the first device and second device complete a first training cycle at the second speed. Further, during this first training cycle for the second speed, the first training cycle for the second speed will pause before the first training cycle at the second speed completes, and the first device and second device communicate at a first speed for a period of time before returning to the paused first training cycle at the second speed. When the paused first training cycle for the second speed continues, the first training cycle for the second speed will continue where it had paused.

Abstract: The invention relates to a method and a coupling device (10) for dynamically allocating USB endpoints (31, 32, 33, 34) of a USB interface (30), which can be accessed using at least two applications, comprising: a USB interface (30) that has at least two ports (P0, P2, P4), each of which comprises at least one USB endpoint (31, 32, 33, 34); and a control device (20) for dynamically allocating the USB endpoints (31, 32, 33, 34). The control device is designed so as to preconfigure each USB endpoint (31, 32, 33, 34) which is required for the at least two applications by means of an initialization process, and thus the control device can switch the allocation of the endpoints according to the access using at least one of the applications without the USB endpoints (31, 32, 33, 34) affected by the switch having to be deactivated.

Abstract: System and methods are provided. In one embodiment, a system includes serial peripheral interface (SPI) bus and a master device communicatively coupled to the serial peripheral interface (SPI) bus. The system further includes a first slave device communicatively coupled to the SPI bus. The system additionally includes a second slave device communicatively coupled to the SPI bus and to the first slave device; wherein the first and the second slave devices are communicatively coupled in parallel to the SPI bus and wherein the first and the second slave devices are communicatively coupled to each other by using a first chain line, and wherein the master device is configured to communicate with the first and with the second slave devices over the SPI bus.

Abstract: A database management system implemented in a cloud computing environment. Operational nodes are assigned as controller-nodes, compute-nodes or storage-nodes. The number of operational nodes, and their assignment as compute-nodes or storage-nodes can vary. Queries specify tables, with each such table assigned to a respective group of storage nodes. The number of operational nodes executing a given query may change by (a) changing the compute-nodegroup associated with a connection, or (b) adding or removing nodes from the compute-nodegroup; and/or distributing data from the tables among the nodes in a storage nodegroup. State information is maintained for each client connection, such that steps are executed assuming that the state exists.

Abstract: An embodiment integrates non-PCI compliant devices with PCI compliant operating systems. A fabric system mimics the behavior of PCI. When non-PCI compliant devices do not know how to respond to PCI enumeration, embodiments provide a PCI enumeration reply and thus emulate a reply that would typically come from a PCI compliant device during emulation. Embodiments allow system designers to incorporate non-standard fabric structures with the benefit of still using robust and mature PCI infrastructure found in modem PCI compliant operating systems. More generally, embodiments allow an operating system compliant with a first standard (but not a second standard) to discover and communicate with a device that is non-compliant with the first standard (but possibly is compliant with the second standard). Other embodiments are described herein.

Abstract: Described herein are systems and methods for identifying which input of a sink device a source device is coupled to. The source devices provide content and are coupled to the sink devices which present at least a portion of the content. The source device provides a predetermined reference signal to the sink device. Selection of a plurality of inputs on the sink device is initiated until an emitted signal from the sink device which is based on the reference signal is detected by a sensor coupled to the source device. Once detected, the selected input may be associated with the source device. The source device may then use the associated input for automatic configuration of the sink device during future presentation of content.

Abstract: Dynamically calibrating an offset of a receiver with a DFE while performing data transport operations, the DFE comprising a plurality of independent data transport banks, at least one data transport bank operating a data transport mode and at least one data transport bank operating in a calibration mode, including: iteratively, while carrying out data transport operations: utilizing the data transport bank operating in the data transport mode to perform data transport operations; calibrating the data transport bank operating in the calibration mode; and upon completing calibration of the data transport bank operating in the calibration mode, switching the mode of each data transport bank.

Abstract: The invention provides, in some aspects, methods and systems for customizing data processing equipment by storing, on a removable storage device, a predetermined data set of customer requirements. The removable storage device is coupled to a data processor executing a default data set of customer requirements. The data processor executes, from the removable storage device, the predetermined data set of customer requirements, thereby causing a non-disruptive customization of the data processor from the default data set of customer requirements to the predetermined data set of customer requirements. Removing the storage device from the data processor causes a non-disruptive customization of the data processor from the predetermined data set of customer requirements to the default data set of customer requirements.

Abstract: A method of controlling a plurality of external devices is performed on a computer which is set up with a plurality of remote control processes corresponding to the plurality of the external devices, and a management process for managing the remote control processes while communicating with the remote control processes. The management process is called to display icons corresponding to the remote control processes in a display field provided by the management process. Further, the management process acts when a specified operation is applied to one of the icons on the display field for sending a screen open instruction to one of the remote control processes corresponding to the icon to which the specified operation is applied. The remote control process which receives the screen open instruction is activated to display a control screen for use in remotely controlling the corresponding external device.

Abstract: A data processing system comprising a plurality of data inputs and of data outputs for processing input data and providing processed data to a data output. The system comprises a plurality of data processing hardware units, each being configured to process data within a predetermined latency and according to a data processing task of a predetermined type. The system further comprises a memory for storing a predetermined latency for each of the data processing hardware units and a controller configured to determine a type of a data processing task to be executed as a function of a source of data to be processed or of a destination of processed data and further configured to select one data processing hardware unit as a function of the determined type of the task to be executed and of latency constraints associated with the task to be executed.

Abstract: A method for verifying an input/output (I/O) hardware configuration is provided. Data from an input/output data set (IOCDS) is extracted for building a verification command. The IOCDS contains hardware requirements that define at least software devices associated with a logical control unit (LCU). The verification command is processed. The verification command includes a software device address range associated with a logical control unit (LCU) of the I/O hardware. The LCU utilizes a first logical path. The software device address range utilizing the first logical path is compared with an existing software device address range utilizing at least one additional logical path. The verification command is accepted if the software device address range and the existing software device address range match.

Abstract: An island-based network flow processor (IB-NFP) integrated circuit includes rectangular islands disposed in rows. In one example, the configurable mesh data bus is configurable to form a command/push/pull data bus over which multiple transactions can occur simultaneously on different parts of the integrated circuit. The rectangular islands of one row are oriented in staggered relation with respect to the rectangular islands of the next row. The left and right edges of islands in a row align with left and right edges of islands two rows down in the row structure. The data bus involves multiple meshes. In each mesh, the island has a centrally located crossbar switch and six radiating half links, and half links down to functional circuitry of the island. The staggered orientation of the islands, and the structure of the half links, allows half links of adjacent islands to align with one another.

Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.

Abstract: An apparatus, including a first multiple of virtual function clusters positioned on a Peripheral Component Interconnect Express (PCIe) configuration space, each of the clusters comprising at least one virtual function, and a second multiple of physical functions positioned on the PCIe configuration space. The apparatus also includes an extended virtual function shell positioned on the PCIe configuration space and configured to select one of the physical functions, to select one of the available virtual function clusters and to associate the selected virtual function cluster with the selected the physical function.

Abstract: Controlling a boot operation form an alternate operating system by pressing a single predetermined key or simultaneously pressing a set of unique keys on the keyboard which causes the computer system to reboot using the operating system on an attached drive to be booted. The user can recover operational use of their computer system when the internal system drive suffers a software application or operating system failure. An attached storage device containing a bootable operating system, an application program in the host computer that can detect the pressing of a single or set of unique keys on the keyboard which will then cause the application to process boot files and force a reboot of the operating system with the attached storage device as the boot device.

Abstract: A selectively transparent bridge facilitates a PCI device presenting itself to the host as a PCI-to-PCI bridge but selectively hiding and isolating hardware from the host bus. PCI configuration may be achieved through the standard PCI Express configuration mechanisms, but instead of configuring devices directly, a configuration processor in the selectively transparent bridge may intercept the configuration packets from the host, and create a virtual configuration to alter how the bus topology appears to the host. Devices are selectively hidden and managed by the configuration processor, resulting in simplified complexity and bus depth. Since the selectively transparent bridge appears to the host as a transparent bridge, no special drivers or resource preallocations are required, although the selectively transparent bridge fully supports special drivers and/or resource preallocations. Devices located/connected downstream of the bridge may therefore function with unmodified drivers.

Abstract: A communication device including a comparison unit that compares a first identification number of which notification is provided by a packet that sequentially assigns identification numbers to a plurality of nodes in a network, and a second identification number, which is assigned to the communication device. A control unit notifies other nodes of the second identification number and that the identification number of the communication device has not been changed when the first identification number and the second identification number are in non-conformance.

Abstract: A disk drive including a disk configured to spin at a target spin speed, a servo core configured to access the disk, a first non-volatile memory configured to store a first initialization firmware, a second non-volatile memory configured to store a second initialization firmware, a first volatile memory, a second volatile memory, a non-volatile memory core configured to access the first non-volatile memory, and a main core. The main core is configured to load the second initialization firmware from the second non-volatile memory to the second volatile memory concurrently with the loading of the first initialization firmware from the first non-volatile memory to the first volatile memory by the non-volatile memory core, control the servo core to initiate spinning of the disk, and communicate with the non-volatile memory core to service host commands from the first non-volatile memory when the disk is not spinning at the target spin speed.

Abstract: A logic device for communicating with a memory package with a first protocol, communicating with a memory controller with a second protocol, and for performing a protocol conversion between the first and the second protocol.

Abstract: Methods and structure for delayed physical link activation in systems that utilize smart cabling are provided. The system includes a Serial Attached Small Computer System Interface (SAS) device comprising a physical link and a controller. The controller is able to disable the physical link to prevent discovery from occurring along the physical link, to detect a cable attached to a physical link, to acquire cable parameters from a memory of the cable, and to configure the physical link based on the acquired cable parameters to enable communications along the cable. The controller is also able to enable the configured physical link to trigger discovery for the physical link.

Abstract: A system may include a chassis and a chassis backplane integral to the chassis. The chassis may be configured to receive a plurality of server backplanes, each server backplane integral to a respective modular sled configured to removably engage with the chassis. The server backplane may include a plurality of information handling systems, a switch communicatively coupled to each of the information handling systems, at least one external network port communicatively coupled to the switch for coupling the switch to an external network external to the chassis, and a plurality of internal network ports communicatively coupled to the switch. The chassis backplane may have a topology configured to couple the switch from each server backplane to switches from two or more other server backplanes such that an internal chassis network is formed comprising the information handling systems and switches of the plurality of server backplanes engaged with the chassis.

Abstract: The invention described herein provides a system and method for distributing and applying a configuration file from a master device (102) to a slave device (104) in a distributed control system (100). According to aspects of the invention, a configuration file is saved at a master device (102) and distributed to the slave device (104) via the data payload of a fieldbus protocol, such as the CANopen protocol. Aspects of the present invention may be used to further configure an I/O island or sub-network (108) that is attached to the slave device (104). Further aspects of the present invention may be used to repair or replace failed devices in a distributed control system (100).

Abstract: A system for an open virtualization format includes a virtualization platform to run a virtual machine and a network infrastructure to accommodate the virtualization platform. The network infrastructure includes a deployed network port profile associated with the virtual machine.

Abstract: The disclosure provides an HVAC data processing and communication network and a method of manufacturing the same. In an embodiment, the network includes a system device coupled to a data bus. The system device includes a functional block adapted to respond to a message received via the data bus. The system device is configured to thereby enter a disabled state in which the system device does not provide a service or broadcast messages via the data bus, but may continue to receive messages via the data bus.

Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

Abstract: A dynamic bus clock rate adjusting method is to be executed by a bus controller and a CPU. The bus controller is coupled with a bus that is coupled with a plurality of slave devices. The method comprises the steps of: configuring the bus controller to generate, upon receipt of a request signal from one of the slave devices, an access instruction including an address from which the request signal is sent; and configuring the CPU to determine which of the slave devices the address of the access instruction corresponds so as to obtain a working clock rate thereof, and to set the bus controller to adjust an operating clock rate of the bus according to the working clock rate, and to perform the access instruction on the slave device via the bus.

Abstract: Techniques for management of target devices are provided. User input for management of a target device may be received. The user input may be converted into a first format. The first format may be encapsulated into a second format and sent over a communications channel. The second format may be un-encapsulated to recover the first format. The first format may be provided to the target devices.

Abstract: In one embodiment, a network device having a plurality of hardware interfaces is disclosed. The network device includes a central processing unit and a main circuit board. The main circuit board has expansion slots that receivably connect corresponding secondary circuit boards to the main circuit board. The main circuit board also has sensors for detecting predetermined parameters. A voltage regulator is operative to regulate one or more particular expansion slots, in response to detection of a predetermined parameter associated with respective slots.

Abstract: System and method controlling connectivity within a device. A device may be coupled to a host device. In response to the coupling, low power logic (e.g., an embedded device) of the device may be coupled to the host device. The low power logic may perform enumeration with the host device using only power provided by the host device. The low power logic may also charge a battery of the device using power provided by the host device. Device circuitry of the device may provide a signal for coupling to the host device. In response, the device circuitry may be coupled to the host device and may perform device enumeration with the host device.

Abstract: A parameter management apparatus manages a plurality of parameters provided for control of an externally connected acoustic apparatus. The parameter management apparatus has a storing portion for storing a plurality of parameters stored in the acoustic apparatus. The parameter management apparatus selects, from among the parameters stored in the storing portion and the acoustic apparatus, respectively, at least one parameter for which a match is caused between the storing portion and the acoustic apparatus. The parameter management apparatus then causes exact a match between the at least one parameter stored in the storing portion and the at least one parameter stored in the acoustic apparatus.

Abstract: An apparatus and method for operating a connector of a mobile terminal are provided. The apparatus includes a connector including a plurality of pins, a plug of a peripheral device, a display unit for displaying a menu for setting a connector mode, an input unit for receiving selection of one connector mode from the menu for setting a connector mode, a main processor for connecting with a switch unit through a data line, a sound line, a microphone line, and a control line, for receiving connector mode selection information from the input unit, and for transferring switching information through the control line, and the switch unit for connecting with a subset of the pins of the connector, and selectively connecting the subset of the pins to at least one of the data line, the sound line, and the microphone line.

Abstract: One embodiment is a method for establishing a link between a source device and a sink device. The method comprises enabling a hot plug detect (HPD) handler in the source device, utilizing the HPD handler to receive an HPD interrupt upon the sink device being coupled to the source device, applying one or more predetermined parameters corresponding to the HPD interrupt to establish the link between the source device and the sink device, and adjusting the one or more predetermined parameters if the link between the source device and the sink device is not established.

Abstract: An interconnect-power-manager (IPM) cooperates and communicates signals with an integrated-circuit-system-power-manager (SPM) in the integrated-circuit. The interconnect network (IN) is partitioned into multiple power domains and has hardware circuitry integrated into the IN to manage a quiescent state for all components in each power domain in the IN when a routing pathway for transactions in the IN spans across one or more power domain boundaries and causes interdependencies of power domains within the IN other than where the power domains of the initiator agent and final target agent of the transaction are located within. The SPM is configured to cooperate and communicate with the IPM to quiesce, to wake up, and any combination of the two, one or more of the multiple power domains within the IN.

Abstract: A system and method of coordinating power states between two detachable units is disclosed. Only the primary unit has a user-controllable power control. The secondary unit is not directly user controllable. The power states of the two units are coordinated using an actuator mechanism when the units are attached. When the two units are detached, the state of the secondary unit is dependent upon the state of the primary unit and any subsequent commands transmitted by the primary unit to the secondary unit.

Abstract: An IEEE 802.3 compliant physical layer device provides efficient loading of configuration information of the physical layer device. The configuration information is written into a volatile memory in the physical layer device, and then uploaded to at least one EEPROM. The configuration information is downloaded to the volatile memory during startup of the physical layer device. The system controller can also directly access the EEPROMs, bypassing the volatile memory. By providing a bridge between the system controller and the EEPROMs and providing additional bits in the volatile memory of the physical layer device, the system controller can read and write the EEPROMs one byte at a time. During reset time, the content of the EEPROMs is written to registers in the physical layer device to configure the physical layer device.

Abstract: The invention relates to a dynamically addressable slave unit, comprising a bus interface, an enable circuit having a switch and two control ports which are connected via the enable circuit. The enable circuit only releases the slave unit for assigning an address by an address signal provided at the bus interface when a control signal is provided at one of the control ports and when the switch of the release signal is open. Otherwise, the enable circuit locks the slave unit for the assigning of an address. The switch locks depending on whether a switching signal is provided at the bust interface directed to the address assigned to the slave unit. The invention further relates to a master unit for use with one or more dynamically addressable slave units, to slave units according to the invention, and to a method for dynamically addressing slave units according to the invention.

Abstract: A given port at a storage controller is used for communication with storage devices. In response to an indication that at least a portion of the given port is to be dedicated to a group of at least one of the storage devices, the storage controller divides the given port into multiple smaller ports.

Abstract: A SAS expander that includes a storage management module to cause the SAS expander to configure zoning of targets coupled to the SAS expander based on zone configuration rules. The storage management to cause, in response to receipt of a command to enter an expander reduced functionality mode of operation, the SAS expander to prevent initiators access to the targets coupled to the SAS expander and to allow update of expander functionality module for controlling operation of the SAS expander. The storage management module to cause, upon completion of the expander reduced functionality mode of operation, the SAS expander to reconfigure the zoning of the targets coupled to the SAS expander based on the zone configuration rules and to allow initiators access to the targets coupled to the SAS expander.

Abstract: A method of setting an address of a component that includes determining a characterization value associated with a consumable, calculating a number of address change operations based upon the characterization value, and setting a last address generated from the number of address change operations as the new address of the component, wherein the characterization value is determined based upon a usage of the consumable.

Abstract: Techniques are disclosed to perform an operation to facilitate concurrent repair of PCIe switch units in processing environments such as a tightly coupled, multi-switch, multi-adapter, multi-host distributed system. The operation, for an identified switch unit to be repaired, reconfigures all switch unit hardware in the switch fabric by removing all upstream to downstream connections utilizing the identified switch unit. Connections to hosts via the upstream ports are also removed by the operation. Once the switch unit is powered back on, the operation reconfigures all switch unit hardware in the switch fabric by adding all upstream to downstream connections utilizing the identified switch unit. The operation further restores connections to hosts via the upstream ports.

Abstract: Charging a device using a plurality of handshakes. A first device may provide a first handshake to a second device. A device of a first device type may be configured to charge its battery without further communication based on the first handshake. The first device may monitor a connection to the second device for a second handshake corresponding to a device of a second device type. In response to detecting the second handshake, the first device may provide a response to the second device. Accordingly, the second device of the second device type may be configured to charge its battery based on the second handshake.

Abstract: Techniques are disclosed to perform an operation to facilitate concurrent repair of PCIe switch units in processing environments such as a tightly coupled, multi-switch, multi-adapter, multi-host distributed system. The operation, for an identified switch unit to be repaired, reconfigures all switch unit hardware in the switch fabric by removing all upstream to downstream connections utilizing the identified switch unit. Connections to hosts via the upstream ports are also removed by the operation. Once the switch unit is powered back on, the operation reconfigures all switch unit hardware in the switch fabric by adding all upstream to downstream connections utilizing the identified switch unit. The operation further restores connections to hosts via the upstream ports.

Abstract: A method of accessing a server address space of a shared PCIe end point system includes programming a primary address translation table with a server address of a server address space, setting up a direct memory access (DMA) to access a primary port memory map, the primary port memory map correlating with addresses in the primary address translation table, and re-directing the direct memory accesses to the primary port memory map to the server address space according to the primary address translation table.

Abstract: A system and method comprising, in response to a first component and a second component undergoing a link training and equalization procedure, a second component is to communicate a first set of data to the first component via a first transmission logic along at least one channel of a communications link. The first component and the second component are link partners. The first set of data further includes a full swing value and a low frequency value which are stored in a first storage unit of the first component. The first component is to store a first computed set of coefficients from the full swing value and the low frequency value. The second component is to apply the first computed set of coefficients to the first transmission logic of the second component.