Abstract: A system and method comprising, in response to a first component and a link partner of the first component, undergoing equalization, the first component is to communicate a first set of data to the link partner component. The first component may comprise at least one receiver to receive a first set of equalization data. The first component may further comprise coefficient storage coupled to the receiver to store the equalization data. In addition, coefficient logic coupled to the coefficient storage to generate a first set of coefficients based on the first set of equalization data. The first component is to send the first set of coefficients to the link partner component.

Abstract: A method, system and computer program product are provided for implementing configuration preserving relocation of a Single Root Input/Output Virtualization (SRIOV) adapter in a computer system. At system power on an SRIOV adapter having been relocated to a different slot while the system was powered off is automatically detected, and the configuration data associated with the adapter automatically updated so that it remains associated with the adapter in the adapter's new location.

Abstract: An I2C system comprises an inter-integrated circuit (I2C) master device coupled to an I2C multiplexer via a master I2C bus. A plurality of slave I2C busses emanating from the I2C multiplexer couple the I2C multiplexer to a plurality of I2C slave devices. Each of the slave I2C busses comprises a serial data (SDA) line and serial clock (SCL) line. Each of the slave I2C busses, which is coupled to two I2C slave devices, has a first channel and a second channel. The first channel puts bidirectional serial data on the SDA line and clock signals on the SCL line, and the second channel puts bidirectional serial data on the SCL line and clock signals on the SDA line. A channel selector, associated with the I2C multiplexer, selectively couples the I2C master device to one of the two I2C slave devices via the first channel or the second channel.

Abstract: A computer system for obtaining vital product data (VPD) of a non-active component installed in the computer system. The computer system includes an active component, wherein the active component includes an optical sensor, wherein the optical sensor is positioned such that the optical sensor is able to scan an optically machine-readable representation of VPD of a non-active component when the non-active component is installed in the computer system, and wherein the non-active component includes the optically machine-readable representation of the VPD of the non-active component. The computer system is operable to scan the optically machine-readable representation of the VPD of the non-active component, decode the optically machine-readable representation of the VPD to determine the VPD of the non-active component, and store the determined VPD of the non-active component.

Abstract: Integrated circuit devices are disclosed with receive ports having mapping circuits automatically configurable to change a logical mapping of data received on receive-data connections. Automatic configuration can be based on a data value included within a received data set. Corresponding systems and methods are also described.

Abstract: In an embodiment, a third party video content database is coupled to an IPTV network. The IPTV network includes a plurality of set top boxes (STBs). The third party video content database is mapped to the IPTV network via an IP address of the third party content database, and it is associated with an assigned channel on the IPTV network. One or more STBs of the IPTV network have access to the assigned channel.

Abstract: A PCI card's HBA identifier table held in an IODC in an IO slot expansion unit is read and recorded on a PCIe switch register of a PCIe switch. After a server blade is powered on so that an EFI is activated, the EFI reads the HBA identifier table recorded on the PCIe switch register and updates an HBA identifier of an HBA mounted in each PCI card. The HBA mounted in the PCI card operates with the updated HBA identifier of the PCI card. Thus, even when the PCI card is replaced by a new PCI card because of failure or the like, the new PCI card can operate with the same HBA identifier as that before the replacement. Therefore, a user does not have to register the HBA identifier of the PCI card newly in a device connected to the PCI card.

Abstract: In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU.

Abstract: An online calibration method and device for a universal serial bus system is disclosed in the present invention. The method comprises following steps: providing a plurality of chirp JK pairs; detecting the plurality of chirp JK pairs, and loading a power on a terminal resistor of a USB device end of the universal serial bus and its coupled to a terminal resistor of a USB host end of the universal serial bus; detecting a voltage level variation of the chirp JK pair; and processing the online calibration according to the voltage level variation to maintain the voltage level within a preset range.

Abstract: A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of the DC. Subsequent to the discovery of internal devices of the DC, the DC may issue a multiple device number (MDN) request to an upstream component (UC) of the DC. In one embodiment, the MDN request may include an indication that the DC supports a “multiple device number capability,” as well as a quantity of the internal device components of the DC. The DC may receive an acknowledgement MDN from the UC to indicate a quantity of device numbers allocated to the DC. Subsequently, the DC may assign device numbers to the internal device components of the DC according to configuration requests received from the UC. Other embodiments are described and claimed.

Abstract: In an embodiment, an apparatus comprises a bus network having a set of lines, and a number of communication system devices associated with a number of electronics equipment connected to the bus in which each communication system device configures the electronics equipment to send and receive a plurality of signals on a line of the set of lines in a noise region of the set of lines.

Abstract: A configurable computing device comprising a housing, a printed circuit board disposed within the housing, a first microcontroller and a second microcontroller each coupled to the PCB, wherein the first microcontroller and the second microcontroller are in electrical signal communication with each other, a computer-on-module (COM) coupled to the PCB, wherein the COM is in electrical signal communication with the first microcontroller and the second microcontroller, and one or more peripheral modules coupled to the PCB, wherein, the peripheral modules are each in electrical signal communication with the first microcontroller and wherein, the peripheral modules are each in electrical signal communication with the COM via the second microcontroller.

Abstract: A method of accessing a server address space of a shared PCIe end point system includes programming a primary address translation table with a server address of a server address space, setting up a direct memory access (DMA) to access a primary port memory map, the primary port memory map correlating with addresses in the primary address translation table, and re-directing the direct memory accesses to the primary port memory map to the server address space according to the primary address translation table.

Abstract: A system includes a non-programmable bus master. The non-programmable bus master includes a memory protection unit (MPU) to operate in a first configuration with a first set of access permissions and a second configuration with a second set of access permissions, and hardware logic. The hardware logic executes a first task and a second task. The tasks generate transactions and the hardware logic switches between executing the first and second tasks. The hardware logic also causes the MPU to operate in the first configuration when the hardware logic executes the first task and causes the MPU to operate in the second configuration when the hardware logic executes the second task.

Abstract: Exemplary embodiments are directed to a system and method for integrating field devices in an automation system having a plurality of field devices connectable via at least one bus system. A respective field device is connected to the bus system of the automation system, and is automatically addressed by a superordinate controller using a predefined default address. The device addressed using the default address then registers in the system with its device address, and a fixed address which is provided from a multiplicity of unassigned addresses from an address memory is automatically allocated to the device registered in the system. An individually assigned identification (TAG) provided from the predetermined configuration of the automation system is allocated to the allocated fixed address, and, after the automatically allocated fixed address has been transmitted to the field device, the field device is changed to a suitable state for communication with the superordinate controller.

Abstract: An electronic device provided with a multimedia interface having a cross-device control function and a general-purpose serial bus interface is provided with a control unit that prohibits the use of the cross-device control function whenever an external device is connected via the general-purpose serial bus interface during a state permitting control by the cross-device control function from an image display device connected via the multimedia interface.

Abstract: Methods and devices for manipulating HDMI-CEC messages transmitted over a network including at least two HDMI-CEC display devices with their associated at least two HDMI-CEC cluster trees that at least partially overlap, and enabling each of the HDMI-CEC display devices to communicate using HDMI-CEC with its associated HDMI-CEC cluster tree according to its current HDMI-CEC network view.

Abstract: An information processing apparatus includes: a connection port configured to be capable of attaching a device thereto; an acquisition unit configured to acquire, from a storage unit included in the device, bus-configuration information indicating a bus configuration of the device; and a setting unit configured to set a bus configuration of the connection port based on the bus-configuration information.

Abstract: A system for connecting the plurality of mobile devices to a computer is disclosed. The system includes a plurality of mobile devices connected to a computer through a network. Each of the plurality of mobile devices includes a mobile application configured to emulate the each of the plurality of mobile devices as a selected type of input/output (I/O) device for the computer. An operating system of the computer operates in conjunction with a session manager to connect the plurality of mobile devices as disparate selected types of I/O devices to the computer in a common user session.

Abstract: An electronic apparatus provided with a serial communication circuit achieving a baud rate adjustment with high precision is provided. For example, a bit width of each of a plurality of bits in received serial data is measured by a clock counter, and an average value of the bit width is calculated detecting its maximum value and minimum value. Moreover, for example, a maximum tolerance and a minimum tolerance are calculated as a value substantially 1.5 times the average value and a value substantially 0.5 times the average value, and determination is made as to whether or not the maximum value and the minimum value are within a range between the maximum tolerance and the minimum tolerance. If they are within the range, the corresponding average value is set in a baud rate setting register.

Abstract: A system, a method and a recording medium for driving a programmable logic controller are disclosed. This system includes a server and an adaptive unit electrically connected to the server. When determining that a programmable logic controller is connected, a hardware layer management module of the adaptive unit informs the server. The server outputs a controller query data to query the programmable logic controller through the hardware layer management module. The server generates a control data conforming to a specification of the programmable logic controller according to a controller response data of the programmable logic controller, for the hardware layer management module to control the programmable logic controller.

Abstract: A method according to one embodiment includes the operations of configuring a host processor to receive a message filtering rule, the host processor associated with a vehicle; configuring a bus controller to verify authenticity of the message filtering rule, wherein the bus controller is programmed through an interface, the interface inaccessible from the host processor; filtering messages from the host processor using the verified message filtering rule, wherein the filtering is performed by the bus controller; and transmitting the filtered messages from the bus controller over a bus to one or more electronic control units (ECUs), the ECUs communicatively coupled to the bus.

Abstract: An indication of a version of a firmware stored in an input/output adapter may be provided by a method that includes detecting whether a first pin is connected to an external circuit, detecting whether a second pin is unconnected to an external circuit, and causing the indication to be provided if the first pin is connected and the second pin is unconnected. The indication may be provided on the first pin. The first pin may include a power supply pin and the indication may be an average rate of power supplied to the input/output adapter.

Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.

Abstract: In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.

Abstract: A first slave electronic module and a second slave electronic module are adapted for communicating over the data bus. The first slave electronic module has a first resistor coupled in series with a main power line. The second electronic module has a second resistor coupled in series with the main power line. A master electronic module has a master current measurement circuit for determining an aggregate current level indicative of the total number of slave electronic modules on the main power line. A first current measurement circuits is capable of measuring a node current indicative of a number of other active slaves connected to the main power line and data bus. A master data processor in the master electronic module is arranged to assign a unique module identifier to a first slave electronic module based on the first node current and the aggregate current level, the unique module identifier indicating a respective position of the first slave electronic module on the data bus.

Abstract: The present invention systems and methods facilitate configuration of functional components included in a remotely located integrated circuit die. In one exemplary implementation, a die functional component reconfiguration request process is engaged in wherein a system requests a reconfiguration code from a remote centralized resource. A reconfiguration code production process is executed in which a request for a reconfiguration code and a permission indicator are received, validity of permission indicator is analyzed, and a reconfiguration code is provided if the permission indicator is valid. A die functional component configuration process is performed on the die when an appropriate reconfiguration code is received by the die. The functional component configuration process includes directing alteration of a functional component configuration. Workflow is diverted from disabled functional components to enabled functional components.

Abstract: A peripheral power management system includes a power monitor for determining a power consumption characteristic of a computing processor and a controller for generating a reference power signal based on the power consumption characteristic. The peripheral power management system also includes a power regulator control signal generator for generating a power regulator control signal based on the reference power signal. The power regulator control signal controls a peripheral device power regulator which regulates an electrical supply power of a peripheral device. In this way, the peripheral power management system controls regulation of the electrical supply power of the peripheral device based on the power consumption characteristic of the computing processor. In some embodiments, the peripheral power management system determines the power consumption characteristic of the computing processor by monitoring communication on a serial voltage identification bus.

Abstract: A system and method for reserving resources of a host computer for use by an external device configured to be coupled to an expansion bus of the host computer are described. The host computer may be configured to execute device resource software that operates at a startup of the host computer to reserve one or more resources for the external device. The external device may not be available during the startup of the host computer, e.g., because the external device is not powered on or is not physically connected to the host computer. The device resource software may subsequently detect that the external device becomes available after the startup of the host computer. In response, the device resource software may enable the external device to use the one or more resources that were previously reserved at the startup of the host computer.

Abstract: A fabric interconnect system may provide a data path between nodes and/or processing elements within an interconnection fabric. Identifiers may be assigned to particular components associated with the interconnection fabric. These identifiers may uniquely identify the particular components, and may indicate a path between a root node and a particular component. In some embodiments, the identifiers include turn counts and turn values that specify a turn-based bath from the root node to a particular component. One or more identifier acceptance rules may be used in order to determine whether a given component should accept and store a particular identifier that the component receives. For example, a lower priority identifier may be discarded in favor of a higher priority identifier.

Abstract: In a first aspect, a first method is provided for self-adjusting allocation of memory bandwidth in a network processor system. The first method includes the steps of (1) determining an amount of memory bandwidth of a network processor used by each of a plurality of data types; and (2) dynamically adjusting the amount of memory bandwidth allocated to at least one of the plurality of data types based on the determination. Numerous other aspects are provided.

Abstract: In a method for registering identification information of network interface cards (NICs) in an operating system of a computing device, each of the NICs is respectively and uniquely labeled with a number. A peripheral component interconnect (PCI) device identification (ID) of each of the NICs is allocated according to the labeled number of each NIC using a basic input output system (BIOS) of the computing device when the BIOS is booted up. Then identification information of each of the NICs is registered in the operating system according to the PCI device ID of each NIC using a NIC driver of the computing device, when the NIC driver is driven by the operating system during the booting up process of the operating system.

Abstract: A method for providing customized content to an electronic device. The method may include activating the electronic device through a packaging that substantially surrounds the electronic device, without substantially damaging or removing the packaging. Once the device is activating, connecting the electronic device to a content and providing the content to the electronic device without substantially damaging or removing the packaging.

Abstract: The present invention is an apparatus, system, and method for allowing a user to boot to an alternate operating system by pressing a single button on an externally attached storage device with a push button. The invention helps a user recover operational use of his computer system when the internal system drive suffers a software application or operating system failure. The invention consists of an attached storage device with a push button and supporting electronics capable of formatting and transmitting a recognizable data packet to the host computer and an application program in the host computer that can receive the data packet, process boot files, and force a reboot of the operating system with the attached storage device as the boot device.

Abstract: Methods and structure are provided for managing a Serial Attached SCSI (SAS) domain via Universal Serial Bus (USB) communications. The system comprises a SAS expander. The SAS expander comprises a plurality of physical links, a USB interface, and a control unit. The control unit is operable to receive USB packets via the USB interface, to determine SAS management information based upon the received USB packets, and to alter a configuration of the SAS domain based upon the SAS management information determined from the USB packets.

Abstract: According to our invention, linked operation between a monitor apparatus for displaying images, and a set-top box for transmitting image signals to the monitor apparatus via a required interface, can be achieved properly, even if both units are constructed in casings separate from each other. The monitor apparatus uses a CEC line to transmit a CEC vendor command including at least a code associated with unit information, and the set-top box apparatus transmits the CEC vendor command including at least the code associated with the unit information. Upon receiving the vendor command from the set-top box apparatus, the monitor apparatus switches to the linked operation with the set-top box.

Abstract: A method for providing virtualization of information handling resources includes accessing a information handling system and a information handling resource, accessing a first virtual function configured to cause virtualized access to the information handling resource through the interface, accessing a second virtual function configured to cause virtualized access to the information handling resource through the interface, and selectively mapping the first virtual function and the second virtual function to information handling systems of the system. The selective mapping includes preventing the first virtual function and the second virtual function from both being mapped to the same information handling system.

Abstract: A method, including receiving, by an extended virtual function shell positioned on a Peripheral Component Interconnect Express (PCIe) configuration space, a virtual function call comprising a request to perform a specific computation, and identifying a physical function associated with the called virtual function, the physical function one of multiple physical functions positioned on the PCIe configuration space. One or more first data values are then retrieved from a virtual function instance stored in the memory, one or more first data values, the virtual function instance associated with the called virtual function, and one or more second data values are retrieved from the identified physical function. The specific computation is then performed using the first data values and the second data values, thereby calculating a result.

Abstract: A method is provided for a port management system in which a switch is automatically provisioned with network resources. A command or set of commands are stored and automatically executed on the switch upon the occurrence of a defined network event. The command or set of commands may be associated with one or more ports on the switch. When executed, the commands cause a change to a port configuration and/or policy on the switch to control access to a network resource. The network resource may include any device or service accessible on the network. The defined network event may include any network event associated with a device or user connected to the network. The command or set of commands may reference variables, control structures, and functions to modify command execution.

Abstract: A communication line is installed in a network by automating a design phase and a configuration phase for the service and by automating failure recovery in either of the phases. In the design phase, an optimal route for the communication line is found, and the network components are provisioned and assigned. If the assigned network components are not available or can not be validated, the components causing the failure are marked, and the design phase is retried without the marked components. After the design phase, the configuration phase begins. The circuit design is tested against actual network components. If the test is passed, the actual network is configured according to the circuit design and the circuit is activated. If there is a network component failure during the configuration phase, the good route elements in the design are released while the failed network components are marked. The design phase is retried.

Abstract: The present invention provides a data migration method and apparatus, where the method includes: after a second control board is inserted into a second control board slot, receiving, by a first control board, type information from the second control board, and determining whether the type information of the second control board and type information of the first control board are the same; and when determining that the type information of the second control board and the type information of the first control board are different, sending, by the first control board, configuration data stored by the first control board itself to the second control board, so that the second control board utilizes the configuration data to perform a configuration.

Abstract: An information system includes a configuration controller board having a capability to set, to each I/O bus bridge device in the alternative I/O board, the logical bus number set in corresponding I/O bus bridge device in the failed I/O board 20, and to set to the I/O bus bridge device in the system board 10 connected with the alternative I/O board, the same downstream side logical bus number as that of the I/O bus bridge device in the system board connected with the failed I/O board.

Abstract: In response to a reset condition, the state of a steady-state signal at an I/O pin of the serial communication port of an integrated circuit die is determined. The serial communication port is configured to support one of the plurality of serial communication protocols based upon the detected steady-state condition.

Abstract: Legacy bus operations, such as x86 I/O instructions having an address space separate from memory address space, are supported in a system in which I/O devices are coupled to a microcontroller connected via an SPI bus or other bit-serial bus. Each legacy bus operation is recognized and trapped by an interface controller, such as a south-bridge controller, which maps the trapped legacy bus operation into a corresponding bit-serial bus transaction, and transacts this corresponding bit-serial bus transaction on the bit-serial bus. Existing software infrastructure using x86 I/O instructions can remain intact, with I/O transactions bound for the SPI bus.

Abstract: Disclosed is an approach for configuring devices for a multiprocessor system, where the devices pertaining to the different processors are viewed as connecting to a standardized common bus. Regardless of the specific processor to which a device is directly connected, that device can be generally identified and accessed along the standardized common bus. PCIe is an example of a suitable standardized bus type that can be employed, where the devices for each processor node are represented as PCIe devices. Therefore, each of the devices would appear to the system software as a PCIe device. A PCIe controller can then be used to access the device by referring to the appropriate device identifier. This permits any device to be accessed on any of the processor nodes, without separate and individualized configurations or drivers for each separate processor node.

Abstract: An electronic Input/Output Interface and device abstraction system used in gaming machines includes: a game central processing unit (game “CPU”); an intelligent input/output controller board (“IOCB”); an Industry Standard Architecture PC bus (“ISA” bus); and a framed message transport protocol. The IOCB facilitates communications between the game CPU and virtual device services, which are peripheral devices associated with the gaming system. The game CPU communicates to gaming peripherals by sending virtual device messages across the ISA bus to the IOCB. The IOCB routes virtual device messages to appropriate virtual device services. Virtual device services are responsible for handling specific hardware, and include virtual device drivers on the game CPU that communicate with virtual devices on the IOCB. Use of the IOCB and the high speed interface enables the game CPU to use more of its available functions for controlling gaming functions rather than one operation of its associated peripheral devices.

Abstract: An interface, for communication between an internal device and an external device, includes two bus lines of a bus for bidirectional data transfer and at least a first control line, by means of which a control signal can be transferred from the external device to the internal device.

Abstract: Methods and apparatus for reconfiguring a fabric associated with a storage area network (SAN) are disclosed. According to one aspect of the present invention, a method includes undergoing an update process, the update process being arranged to update software associated with a switch. The switch is included in a SAN fabric. The method also includes determining when the update process is completed, and ascertaining whether there is at least one state change associated with the SAN fabric when the update process is completed. Finally, the method includes initiating a recovery action in the SAN fabric if there is at least one state change associated with the SAN fabric.

Abstract: A circuit arrangement includes a programmable logic device. The programmable logic device includes configuration logic circuitry. The programmable logic device also includes configurable interconnects. The circuit arrangement further includes a storage device configured to provide data to the programmable logic device. The storage device communicates with the programmable logic device via a bi-directional interface.

Abstract: Techniques for configuration are provided. A chassis ID identifies a chassis type. A device, such as a circuit board, may receive the chassis ID from the chassis. The device may be configured based on the chassis type.