Concurrent Input/output Processing And Data Transfer Patents (Class 710/20)
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Patent number: 8559030Abstract: An augmented reality system and method for diagnosing and fixing a fault in a device. A mobile communication device can be operatively connected with a networked rendering device by reading a two-dimensional bar code associated with the rendering device. An image with respect to the rendering device can be captured by an image-capturing unit associated with the mobile communication device. The image can be augmented with additional information and a target area can be highlighted in order to indicate a fault component. An action to be taken with respect to the target area can be displayed on the mobile communication device. Such an approach permits an end user to address the device issue with increased quality of information and accuracy.Type: GrantFiled: July 27, 2010Date of Patent: October 15, 2013Assignee: Xerox CorporationInventors: Jason Tsongas, Matthew Scrafford
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Patent number: 8549193Abstract: A data transmission method is provided, which includes: obtaining a current queue length of a queue corresponding to an output port; when the current queue length meets a back-pressure requirement, determining a back-pressure priority corresponding to the current queue length according to the current queue length and a mapping relationship between a preset queue length and the back-pressure priority, and generating back-pressure information, where the back-pressure information inhibits a line card from sending data with a data priority less than or equal to the back-pressure priority to the output port; and sending the back-pressure information to a line card.Type: GrantFiled: May 11, 2012Date of Patent: October 1, 2013Assignee: Huawei Technologies Co., Ltd.Inventor: Wumao Chen
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Patent number: 8549189Abstract: The present invention is a flexible input/output translation system and method that facilitates conservation of chip pin resources while permitting flexible and dynamic changes to processor support operations on the fly. A present invention input/output translator includes a consolidated indication port, translation logic, a plurality of translated indication ports and an initialization port. The consolidated indication port receives a consolidated indication signal (e.g., indicating a desired voltage level) from a general purpose input/output port of a processor. The translation logic translates the consolidated indication signal into a plurality of translated indication signals. The plurality of translated indication ports communicate the plurality of translated indication signals. The initialization port receives an initialization signal.Type: GrantFiled: May 30, 2003Date of Patent: October 1, 2013Assignee: Nvidia CorporationInventor: Senthil S. Velmurugan
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Patent number: 8543745Abstract: An accessory for use with a portable computing device is provided. The accessory includes a keypad and a pedestal to house the control circuitry and provide mechanical stability for the accessory. The accessory includes a metal mass that performs dual functions of providing the mass for stability as well as acting as a ground connection for the keypad and other control circuitry. The accessory includes a connector for interfacing with a portable computing device and an additional connector for interfacing with an additional accessory.Type: GrantFiled: May 3, 2010Date of Patent: September 24, 2013Assignee: Apple Inc.Inventors: Jahan Minoo, Gregory T. Lydon, Kenneth Loo, Lawrence G. Bolton, Roberto G. Yepez, John M. Ananny
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Patent number: 8539113Abstract: Techniques described herein provide for sending and receiving messages. The messages are associated with streams. Indicators associated with the streams determine if the messages are sent.Type: GrantFiled: June 16, 2011Date of Patent: September 17, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventor: Michael L. Ziegler
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Patent number: 8539258Abstract: The mobile electronic device for reproducing digital content includes a body and a content transmission interface connector. The body is configured to store and process the digital content, where the digital content includes high-quality uncompressed video data. The content transmission interface connector includes a male connector configured to be connected directly to an external display device and configured to output the digital content to the external display device.Type: GrantFiled: April 23, 2010Date of Patent: September 17, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Chong-Sok Kim
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Patent number: 8521914Abstract: A method for communicating via a bus including a first channel, a second channel, and a third channel is disclosed. The method includes addressing a slave device via the first channel, receiving from the slave device via the second channel, and writing to the slave device via the third channel. The method further includes selecting between first and second bus transmission modes. In the first bus transmission mode, payload write data is to be sent to the slave device via the first channel or the third channel. In the second bus transmission mode, during a first clock cycle, second payload write data associated with a second write operation is to be sent to the slave device via the first channel and first payload write data associated with a first write operation is to be concurrently sent to the slave device via the third channel.Type: GrantFiled: December 27, 2011Date of Patent: August 27, 2013Assignee: QUALCOMM IncorporatedInventors: Richard Gerard Hofmann, Terence J. Lohman
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Patent number: 8514875Abstract: A network device for processing data includes at least one ingress module for performing switching functions on incoming data, a memory management unit for storing the incoming data in a memory and at least one egress module for transmitting the incoming data to at least one egress port. The memory management unit is configured to receive data at a clock speed for the network device and write the data to the memory using a multiplied clock speed that is a multiple of the clock speed for the network device, read out the data from the memory at the multiplied clock speed and provide the data to the at least one egress module at the clock speed for the network device, where the multiplied clock speed is used to sample the clock speed for the network device to place domains of the multiplied clock speed and the clock speed for the network device in phase.Type: GrantFiled: November 9, 2006Date of Patent: August 20, 2013Assignee: Broadcom CorporationInventors: Chien-Hsien Wu, Yook-Khai Cheok, Eugene Opsasnick
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Patent number: 8510478Abstract: A circuit having at least one processor and a microprogrammed machine for processing the data which enters or leaves the processor in order to input or output the data into/from the circuit in compliance with a communication protocol.Type: GrantFiled: November 5, 2008Date of Patent: August 13, 2013Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventor: Michel Harrand
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Patent number: 8504743Abstract: An information processing system includes a master module for outputting a transfer state signal in correspondence to a data read instruction when the data read instruction is successively output plural times, the transfer state signal indicating that at least one data read instruction succeeds some one of the data read instructions; and a memory controller for, when receiving the some one of the data read instructions and the corresponding transfer state signal from the master module, supplying data corresponding to the some one of the data read instructions to the master module, while reading data corresponding to the at least one data read instruction, which succeeds the some one of the data read instructions, from a memory and holding the read data in accordance with the received transfer state signal.Type: GrantFiled: May 18, 2010Date of Patent: August 6, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Akinori Hashimoto
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Patent number: 8504780Abstract: A computer includes first and second processors, first and second I/O devices, a shared memory, and an interrupt controller. The first processor issues a control command for causing the first I/O device to read target data from the first apparatus and store the target data in the shared memory. The first I/O device reads the target data from the first apparatus and, transfers the target data to the shared memory, and generates an I/O complete interrupt. The interrupt controller delivers the generated I/O complete interrupt to the second processor. When the second processor receives the I/O complete interrupt, the second processor issues a control command for causing the second I/O device to read the target data from the shared memory and send the target data to the second apparatus. The second I/O device reads the target data from the shared memory and sends the target data to the second apparatus.Type: GrantFiled: April 8, 2011Date of Patent: August 6, 2013Assignee: Hitachi, Ltd.Inventors: Hiroshi Mine, Ken Nomura, Damien Le Moal, Tadashi Takeuchi
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Patent number: 8504737Abstract: Described embodiments provide a transceiver for transferring data between a media controller and a host device through a communication link. The transceiver includes a first interrupt generator configured to i) generate a first interrupt when a command is received from the host device and ii) provide the received command to a receive buffer. A command processing module i) retrieves the received command from the receive buffer, ii) processes the received command, and iii) provides data request data in response to the received command to a transmit buffer. A datagram generator is configured to provide datagram data to the transmit buffer and a second interrupt generator is configured to generate a second interrupt when data in the transmit buffer is ready for transmission. The transmit buffer interleaves i) the data request data in response to the received command and ii) the datagram data, when provided to the communication link.Type: GrantFiled: September 1, 2010Date of Patent: August 6, 2013Inventor: Randal S. Rysavy
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Patent number: 8495253Abstract: An article of manufacture, apparatus, and a method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation having both input and output data. The TCW specifies a location of the output data and a location for storing the input data. The host computer system forwards the I/O operation to the control unit for execution. The host computer system gathers the output data responsive to the location of the output data specified by the TCW, and then forwards the output data to the control unit for use in the execution of the I/O operation. The host computer system receives the input data from the control unit and stores the input data at the location specified by the TCW.Type: GrantFiled: March 30, 2011Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: John R. Flanagan, Daniel F. Casper, Catherine C. Huang, Matthew J. Kalos, Ugochukwu C. Njoku, Dale F. Riedy, Gustav E. Sittmann
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Patent number: 8495261Abstract: Input/output (I/O) interrupts are avoided at the completion of I/O operations. A task requests (implicitly or explicitly) an I/O operation, and processing of the task is suspended awaiting completion of the I/O operation. At the completion of the I/O operation, instead of an I/O interrupt, an indicator associated with the task is set. Then, when the task once again becomes the current task to be executed, the indicator is checked. If the indicator indicates the I/O operation is complete, execution of the task is resumed.Type: GrantFiled: December 12, 2008Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Roger W. Rogers, Barry E. Willner
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Publication number: 20130179605Abstract: This disclosure describes a method of establishing a bi-directional user interface back channel (UIBC) to a computing device, receiving encapsulated peripheral data from the computing device using the UIBC, and decapsulating the peripheral data, as well as a method of establishing a bi-directional user interface back channel (UIBC) to a computing device, receiving peripheral data, encapsulating the peripheral data, and transmitting the encapsulated peripheral data to the computing device using the UIBC.Type: ApplicationFiled: November 16, 2012Publication date: July 11, 2013Applicant: QUALCOMM IncorporatedInventor: QUALCOMM Incorporated
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Patent number: 8484388Abstract: A data transmission method is provided, which includes: obtaining a current queue length of a queue corresponding to an output port; when the current queue length meets a back-pressure requirement, determining a back-pressure priority corresponding to the current queue length according to the current queue length and a mapping relationship between a preset queue length and the back-pressure priority, and generating back-pressure information, where the back-pressure information inhibits a line card from sending data with a data priority less than or equal to the back-pressure priority to the output port; and sending the back-pressure information to a line card.Type: GrantFiled: May 11, 2012Date of Patent: July 9, 2013Assignee: Huawei Technologies Co., Ltd.Inventor: Wumao Chen
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Determining suitable network interface for partition deployment/re-deployment in a cloud environment
Patent number: 8484654Abstract: Migrating a logical partition (LPAR) from a first physical port to a first target physical port, includes determining a configuration of an LPAR having allocated resources residing on a computer and assigned to the first physical port of the computer. The configuration includes a label that specifies a network topology that is provided by the first physical port and the first target physical port has a port label that matches the label included in the configuration of the LPAR. The first target physical port with available capacity to service the LPAR is identified and the LPAR is migrated from the first physical port to the target physical port by reassigning the LPAR to the first target physical port.Type: GrantFiled: November 23, 2010Date of Patent: July 9, 2013Assignee: International Business Machines CorporationInventors: Charles S. Graham, Bryan M. Logan, Kyle A. Lucke -
Patent number: 8478908Abstract: A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently.Type: GrantFiled: October 25, 2010Date of Patent: July 2, 2013Assignee: Moxa Inc.Inventors: Bo Er Wei, Chun Fu Chuang
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Patent number: 8478915Abstract: A computer program product, apparatus, and method for determining extended capability of a channel path in an I/O processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a request to provide a channel path description for a channel path, where the channel path includes a channel coupled to a control unit. The method further includes outputting the channel path description for the channel path in response to the request. The channel path description includes a descriptor indicating that the channel path supports a link protocol for commanding an I/O operation, and an extension support indicator specifying whether the channel path supports an extension to the link protocol.Type: GrantFiled: February 14, 2008Date of Patent: July 2, 2013Assignee: International Business Machines CorporationInventors: Charles W. Gainey, Jr., Daniel F. Casper
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Patent number: 8473644Abstract: Access management techniques have been developed to specify and facilitate mappings between I/O and host domains in ways that provide flexibility in the form, granularity and/or extent of mappings, attributes and access controls coded relative to a particular I/O domain. In some embodiments of the present invention, operation translations coded relative to a particular logical I/O device, domain or sub-window seek to optimize functionality, isolation or some other figure of merit without regard to needs or limitations of another. In this way, operation translations need not be uniform and need not reduce supported operation semantics to correspond to that of a lowest common denominator I/O device. In some embodiments, the form of mappings (e.g.Type: GrantFiled: March 4, 2009Date of Patent: June 25, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Sanjay Deshpande, Jaideep Dastidar
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Patent number: 8468274Abstract: A CD on which only music information specified by the CD-DA is recorded, or a CD on which both music information specified by the CD-DA and music information to be recorded on a CD-ROM are recorded is mounted upon an information processing terminal. When the CD on which only music information specified by the CD-DA is recorded is mounted, the information processing terminal acquires, from a directory server, an ISRC number that identifies the music information recorded on the CD, and distribution server location information that identifies a content distribution server. The information processing terminal acquires content that is the music information compressed according to the MP3 and encrypted, from the content distribution server identified by the acquired distribution server location information, and the decryption key. The information processing terminal then decrypts the acquired content using the acquired decryption key and reproduces music.Type: GrantFiled: October 16, 2009Date of Patent: June 18, 2013Assignee: Panasonic CorporationInventors: Hideki Matsushima, Ryuichi Okamoto, Mitsuhiro Inoue, Masayuki Kozuka
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Patent number: 8468277Abstract: A service device that comprises a storage drive, where the storage drive includes an installer program, a device driver, and a mass storage interface. The mass storage interface is configured to enumerate the storage drive to a client device when the service device is coupled to the client device for a first time. The client device auto-launches the installer program in response to the service device being enumerated to the client device for the first time. The installer program installs the device driver in the client device in response to being auto-launched.Type: GrantFiled: August 31, 2012Date of Patent: June 18, 2013Assignee: Marvell International Ltd.Inventors: Kevin Thompson, Eric Luttmann, David Watkins
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Patent number: 8443112Abstract: A transmitting section 7a outputs a transmission signal to the side of a transmission line 1. A first switching section Qa1 outputs the transmission signal to the transmission line 1. A second switching section Qa2 outputs the transmission signal from the transmission line 1. A receiving section 9a receives the transmission signal from the transmission line 1. A first detecting section 13a detects the transmission signal flowing through the first switching section Qa1. A second detecting section 19a detects the transmission signal flowing through the second switching section Qa2. When the transmission signal from the transmitting section 7a is not detected at both the first and second detecting sections 13a and 19a, a selecting section 15a selects the receiving section 9a and outputs a reception signal.Type: GrantFiled: March 24, 2009Date of Patent: May 14, 2013Assignee: B & Plus K.K.Inventor: Mitsuo Takarada
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Patent number: 8443117Abstract: A connection expansion device connected to devices includes a plurality of ports to which devices are connected, a storage unit configured to record device information obtained from each port, and a processing unit configured to specify, based on the device information, a port in which an abnormal device exists, invalidate device information belonging to the port, and cause the storage unit to hold device information of a normal device.Type: GrantFiled: May 13, 2011Date of Patent: May 14, 2013Assignee: Fujitsu LimitedInventors: Atsushi Katano, Atsuhiro Otaka, Nobuyuki Honjo
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Patent number: 8438523Abstract: In layout design step of the semiconductor integrated circuit manufacturing method, when it is found that the wiring length between an external terminal and an IO block (external terminal I/F circuit) corresponding to the external terminal increases after a floorplan of a circuit including a functional block and the IO block is determined, placement of the IO block is determined such that the IO block is placed close to the external terminal to alleviate constraints on the wiring between the IO block and the external terminal, and timing adjustment circuits whose number is determined according to the wiring length of a bus (or a shared bus) connecting a data transfer circuit and the IO block is inserted into the bus.Type: GrantFiled: May 27, 2011Date of Patent: May 7, 2013Assignee: Panasonic CorporationInventors: Daisuke Iwahashi, Masayoshi Tojima, Tokuzo Kiyohara
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Patent number: 8438318Abstract: A television with at least one connection, either wired or wireless. Detection of an active device connected to the connection results in proper software and hardware configuration of the television to properly communicate with the device and provide, for example, proper user interface support and access to the device.Type: GrantFiled: July 30, 2009Date of Patent: May 7, 2013Assignee: Vizio, Inc.Inventors: Matthew Blake McRae, John Schindler
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Patent number: 8433834Abstract: A module for controlling integrity properties of a data stream input into a device, such as a machine for manufacturing or a management system related to such machines. A plurality of control items are registered in a database. At least one activable control means executes a control of one integrity property according to one of several registered control items. A list is attached to the database with selectable links for activating at least one of the control means. Configuration means perform on at least one of the links a chronological selection according to a predefined management profile on integrity properties of the data stream in order to introduce a selectable relative time delay between activations of control items. Due to that configuration, the integrity control thus obtained is provided with high reliability as well as in a very flexible manner.Type: GrantFiled: October 23, 2008Date of Patent: April 30, 2013Assignee: Siemens AktiegesellschaftInventor: Ornella Tavani
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Patent number: 8429307Abstract: This invention is a system and a method for operating a storage server that provides read or write access to a data in a data network using a new architecture. The method of processing I/Os in response to a request by a client of the storage server executes one or more services communicated by a policy engine. The I/Os received from the application are tagged and catalogued to create co-related I/O patterns. The policy engine is then updated with the results of processing the I/Os after executing services on those I/Os.Type: GrantFiled: June 30, 2010Date of Patent: April 23, 2013Assignee: EMC CorporationInventors: Sorin Faibish, Philippe Armangau, Christopher Seibel
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Patent number: 8429316Abstract: Some of the embodiments of the present disclosure provide a method comprising categorizing each data packet of a plurality of data packets into one of at least two priority groups of data packets; and controlling transmission of data packets of a first priority group of data packets during a first off-time period such that during the first off-time period, data packets of the first priority group of data packets are prevented from being transmitted to a switching module from one or more server blades. Other embodiments are also described and claimed.Type: GrantFiled: July 7, 2010Date of Patent: April 23, 2013Assignee: Marvell International Ltd.Inventor: Martin White
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Patent number: 8429311Abstract: A process is provided for transferring a first sequence control and/or first data into a first control device and a second sequence control and/or second data into a second control device in a motor vehicle. The transfer is carried out by way of a first data bus while using a first transmission protocol which has a data frame with a predetermined frame format or message format, and the transfer as a whole takes place by the transmission of a plurality of data frames. In a first step, by way of a first data frame, a portion of the first sequence control and/or of the first data is transmitted to the first control device. In a second step, by way of the second data frame, a portion of the second sequence control and/or of the second data is transmitted to the second control device.Type: GrantFiled: September 2, 2009Date of Patent: April 23, 2013Assignee: Bayerische Motoren Werke AktiengesellschaftInventors: Thomas Koenigseder, Martin Baumgartner, Mohamed Majdoub
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Patent number: 8412863Abstract: The object of the present invention is to provide a technique in which, in a storage apparatus using a PCI Express switch in an internal network, an EP can be shared among processors even if the EP is incompatible with the MR-IOV. A storage apparatus according to the present invention is provided with a first interface device which controls data input/output to and from a higher-level apparatus, and the first interface device is further provided with multiple virtual function units which provide virtual ports. The first interface device enables any of the virtual function units and does not enable any of the other virtual function units (see FIG. 14).Type: GrantFiled: October 19, 2010Date of Patent: April 2, 2013Assignee: Hitachi, Ltd.Inventors: Katsuya Tanaka, Masanori Takada
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Patent number: 8412862Abstract: A mechanism is provided for improving the efficiency of multiple smaller direct memory access transfers. The mechanism uses one input buffer and a small result buffer, or some temporary variables, to temporarily store computation results. The mechanism performs a computation on a segment of data in the input buffer and stores the result in the temporary result buffer. The mechanism then copies the result back into the input buffer. As such, the mechanism uses the input buffer as both an input buffer and a results buffer. The mechanism then performs a direct memory access transfer on the segment of the input buffer that contains the computation result and then performs a computation on the next segment of the input buffer. The mechanism then repeats this process until the entire input buffer has been processed.Type: GrantFiled: December 18, 2008Date of Patent: April 2, 2013Assignee: International Business Machines CorporationInventors: Jizhu Lu, Michael P. Perrone
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Patent number: 8407375Abstract: A disclosed information processing apparatus is equipped with a built-in display unit and a built-in input unit. A display signal supplied from an external information processing apparatus connected to the information processing apparatus is combined with a display signal supplied from a core processing unit in a part of a screen of the display unit displaying the signal supplied from the core processing unit. An input signal received from the input unit is output only to the external information processing apparatus or only to the information processing apparatus depending on whether the part is determined as being activated or inactivated.Type: GrantFiled: March 1, 2007Date of Patent: March 26, 2013Assignee: Ricoh Company, Ltd.Inventor: Katsuhisa Yamamoto
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Patent number: 8407373Abstract: An Extended Input/output (I/O) measurement word facility is provided. Provision is made for emulation of the Extended I/O measurement word facility. The facility provides for storing measurement data associated with a single I/O operation in an extended measurement word associated with an I/O response block. In a further aspect, the stored data may have a resolution of approximately one-half microsecond.Type: GrantFiled: February 28, 2012Date of Patent: March 26, 2013Assignee: International Business Machines CorporationInventors: Scott M Carlson, Greg A Dyck, Tan Lu, Kenneth J Oakes, Dale F Riedy, Jr., William J Rooney, John S Trotter, Leslie W Wyman, Harry M Yudenfriend
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Publication number: 20130067121Abstract: An electronic meeting tool for communicating arbitrary media content from users at a meeting includes a node configuration operating a display node of a communications network that is coupled to a display. The node configuration receives user selected arbitrary media content and controls display of the user selected arbitrary media content on the display. At least one peripheral device communicates the user selected arbitrary media content via the communications network. The peripheral device is a connection unit including a connector that couples to a port of a processing device having a second display, a memory and an operating system; and a transmitter communicating with the communications network. A program is provided to run on the operating system of the processing device and obtains user selected arbitrary media content, while leaving a zero footprint on termination.Type: ApplicationFiled: October 11, 2011Publication date: March 14, 2013Inventors: Koen Simon Herman Beel, Yoav Nir, Filip Josephine Johan Louwet, Guy Coen
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Patent number: 8392621Abstract: A method of managing a temporary memory includes: receiving a request to transfer data from a source location to a destination location, the data transfer request associated with an operation to be performed, the operation selected from an input into an intermediate temporary memory and an output; checking a two-state indicator associated with the temporary memory, the two-state indicator having a first state indicating that an immediately preceding operation on the temporary memory was an input to the temporary memory and a second state indicating that the immediately preceding operation was an output from the temporary memory; and performing the operation responsive to one of: the operation being an input operation and the two-state indicator being in the second state, indicating that the immediately preceding operation was an output; and the operation being an output operation and the two-state indicator being in the first state, indicating that the immediately preceding operation was an input.Type: GrantFiled: June 22, 2010Date of Patent: March 5, 2013Assignee: International Business Machines CorporationInventors: Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Jr., Diana Lynn Orf, Robert J. Sonnelitter, III
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Patent number: 8392529Abstract: The invention provides, in one aspect, an improved system for data access comprising a file server that is coupled to a client device or application executing thereon via one or more networks. The server comprises static storage that is organized in one or more directories, each containing, zero, one or more files. The server also comprises a file system operable, in cooperation with a file system on the client device, to provide authorized applications executing on the client device access to those directories and/or files. Fast file server (FFS) software or other functionality executing on or in connection with the server responds to requests received from the client by transferring requested data to the client device over multiple network pathways. That data can comprise, for example, directory trees, files (or portions thereof), and so forth.Type: GrantFiled: August 27, 2007Date of Patent: March 5, 2013Assignee: PME IP Australia Pty LtdInventors: Malte Westerhoff, Detlev Stalling
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Patent number: 8386685Abstract: The present invention provides a method and apparatus for data processing and virtualization. The method and apparatus are configured to receive communications, separate a command communication from a data communication, parallel process the command communication and the data communication, generate at least one virtual command based on the command communication, and generate virtual data according to the at least one virtual command. The apparatus can comprise a parallel virtualization subsystem configured to separate data communications from command communications and to parallel process the command communications and the data communications, to generate virtual commands and to generate virtual data according to a virtual command, and a physical volume driver coupled with the parallel virtualization subsystem, wherein the physical volume driver receives the virtual data and configures the virtual data.Type: GrantFiled: October 17, 2011Date of Patent: February 26, 2013Assignee: Glace Applications NY LLCInventors: Joseph S. Powell, Randall Brown, Stephen G. Finch
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Patent number: 8384928Abstract: Disclosed is an image forming apparatus in which even in the event that a print job is suspended by reason of payment of an insufficient fee, image formation continues effectively and appropriately. The image forming apparatus, which charges for image formation processing, has determination means for determining whether or not a fee necessary in order to execute a specified print job has been received; printing suspension means for suspending the print job if the determination means has determined that a fee received is insufficient; and authentication means for authenticating user information during suspension of printing. The apparatus further includes printing control means for saving data relating to the suspended print job and accepting a print job from a different user if use of user information that is identical with user information of the suspended print job has not been sensed by the authentication means.Type: GrantFiled: May 26, 2006Date of Patent: February 26, 2013Assignee: Canon Kabushiki KaishaInventor: Junko Nemoto
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Patent number: 8375153Abstract: The present invention relates to a method for data output control, which comprises: obtaining the length of idle bits in the cache queue of a data output interface, and if the idle-bit length is equal to or longer than the length of the data to be sent on the interface, putting the data into the cache queue of the interface. In addition, this present invention discloses another data output control method, and two types of data output control apparatuses. Using this invention can avoid flow interruption.Type: GrantFiled: April 24, 2009Date of Patent: February 12, 2013Assignee: Hangzhou H3C Technologies Co., Ltd.Inventors: Jin Zhaohu, Qiang Liu, XinYu Hou
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Patent number: 8375366Abstract: When events are traced, the timing stream is used to associate events with instructions and indicate pipeline advances precluding the recording of stall cycles. Additional information is needed in the trace stream to identify an overlay whose execution of code is in a system where overlays or a memory management unit are used. In the case of PC trace, additional information is added when the memory system contents is changed. Information describing the configuration change is inserted into the export streams by placing this information in a message buffer. As long as a message word is available for output, it becomes the next export word as the output of message words is continuous.Type: GrantFiled: January 3, 2011Date of Patent: February 12, 2013Assignee: Texas Instruments IncorporatedInventors: Manisha Agarwala, Gary L. Swoboda, Oliver P. Sohm
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Patent number: 8364854Abstract: A computer program product is provided for performing input/output (I/O) processing at a host computer system. The computer program product is configured to perform: generating an address control structure for each of a plurality of consecutive data transfer requests specified by an I/O operation, each address control structure specifying a location in the local channel memory of a corresponding address control word (ACW) that includes an Offset field indicating a relative order of a data transfer request; generating and storing in local channel memory at least one ACW specifying one or more host memory locations for the plurality of consecutive data transfer requests and including an Expected Offset field indicating a relative order of an expected data transfer request; receiving a transfer request from the network interface and comparing the Offset field and the Expected Offset field to determine whether the data transfer request has been received in the correct order.Type: GrantFiled: June 1, 2011Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Clinton E. Bubb, Daniel F. Casper, John R. Flanagan
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Patent number: 8364926Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.Type: GrantFiled: February 29, 2012Date of Patent: January 29, 2013Assignee: Rambus Inc.Inventors: Craig E. Hampel, Frederick A. Ware
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Patent number: 8364853Abstract: A computer program product is provided for performing a method including: obtaining information relating to an I/O operation at a channel subsystem in a host computer system; generating at least one address control word (ACW) in the local channel memory specifying one or more host memory locations for transfer of data between the host and a control unit and including at least one ACW error checking field; generating an address control structure specifying a location in the local channel memory of a corresponding ACW and including at least one address control structure error checking field; receiving a data transfer request from the network interface that includes the addressing information; comparing the at least one ACW error checking field to the at least one address control structure error checking field; and, responsive to the fields matching, routing the data transfer request to the host memory location specified in the corresponding ACW.Type: GrantFiled: June 1, 2011Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Clinton E. Bubb, Daniel F. Casper, John R. Flanagan
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Patent number: 8359407Abstract: A method and device are provided for activating certain functions of a powered-off device having a serial data bus interface when it is attached to a powered device via the serial bus interface. On detection of a voltage on the power line of the serial bus, the processor of the device is booted in a special operation mode, wherein certain functions of the serial data bus interface can be used without powering the complete device. The device may then be enumerated by the attached host device and for example allow access to its memory unit or use the power signal on the serial bus interface for battery charging.Type: GrantFiled: September 26, 2006Date of Patent: January 22, 2013Assignee: Nokia CorporationInventor: Achim Van Bebber
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Patent number: 8356124Abstract: A data transfer system includes a PCI Express transaction layer having an input for serially receiving posted and non-posted request packets and completion packets; an application layer coupled to the PCI Express transaction layer for receiving posted and non-posted request packets and completion packets from the PCI Express transaction layer; a first transmission interface coupling the application layer to the PCI Express transaction layer; and a second transmission interface coupling the application layer to the PCI Express transaction layer. The PCI Express transaction layer transmits posted and non-posted request packets to the application layer over the first transmission interface and transmits completion packets to the application layer over the second transmission interface.Type: GrantFiled: May 14, 2004Date of Patent: January 15, 2013Assignee: EMC CorporationInventors: Almir Davis, Michael Sgrosso, William F. Baxter, III, Avinash Kallat
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Patent number: 8352644Abstract: Disclosed are apparatus and methods for use in a USB device with multiple processors, allowing shared USB connectivity in the device. The disclosed apparatus and methods allow selective coupling of a first processor to a USB port of the device or to a USB hub operable to route a plurality of USB connections including connection of a second processor to the port. Providing selective coupling of the processors to the port by switching the coupling of the first processor and selectively powering the hub on and off for selective coupling of the second processor, thereby selectively enabling tethered networking such as wireless networking, affords increased power savings in the device. Furthermore, default coupling of the first processor to the port allows for USB battery charger detection, or direct connectivity to USB peripheral devices, as well as providing programming capability via the default coupling of the port to the first processor.Type: GrantFiled: November 19, 2010Date of Patent: January 8, 2013Assignee: QUALCOMM IncorporatedInventors: Igor Malamant, Raghavendar Bhavansikar, Sergio Kolor
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Patent number: 8341301Abstract: A device and a method for testing a DMA controller. The device includes: (i) a DMA controller that includes a first data transfer path and a second data transfer path, wherein the first data transfer path and the second data transfer path are mutually independent; (ii) a test unit, connected to the first and second data transfer paths, that is adapted to control a transfer of data between the first data transfer path and the second data transfer path during a test mode, while masking from a first memory unit coupled to the DMA controller, at least one control signal associated with the transfer of data.Type: GrantFiled: January 2, 2007Date of Patent: December 25, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Ilan Strulovici, Erez Arbel-Meirovich, Amit Rossler
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Publication number: 20120324291Abstract: A programmatic time-gap defect correction apparatus and method corrects errors which may go undetected by a computer system. Buffer underruns or overruns, which may incur errors in data transfers, yet remain undetected and uncorrected in a computer system, are corrected by an error avoidance module in accordance with the invention. Bytes transferred to and from buffers, used by an I/O controllers to temporarily store data while being transferred between synchronous and asynchronous devices, are counted and an error condition is forced based on the count. If the count exceeds the capacity of the buffer, an error condition is forced, thereby reducing chances that errors are incurred into the data transfer.Type: ApplicationFiled: January 26, 2012Publication date: December 20, 2012Applicant: AFTG-TG, L.L.C.Inventor: Phillip M. Adams
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Patent number: 8327038Abstract: A system, apparatus and a method to connect at least two items of equipment, a first item of equipment having a first confidentiality level and a second item of equipment having a second confidentiality level, the two items of equipment in communication with equipment external to the system through the use of a protocol wherein the system includes at least: a medium allowing the transmission of data between the first and second items of equipment; an interface between the medium and the first item of equipment; an interface between the medium and the second item of equipment; first module to allow a first monodirectional adaptation of the protocol and to allow the transmission of data monodirectionally; and a second module to allow a second monodirectional adaptation of the protocol and to allow a reception of the data monodirectionally from the first module.Type: GrantFiled: October 5, 2007Date of Patent: December 4, 2012Assignee: ThalesInventors: Fabien Alcouffe, Eric Weber, Antoine Quentin