Abstract: An image processing apparatus is capable of communicating data with a plurality of external apparatuses attached to the image processing apparatus. Each of the external apparatuses includes an advisor that advises a user of access to the external apparatus. A display section displays information on the external apparatuses attached to the image processing apparatus. A selecting section selects a desired one external apparatus from among the plurality of external apparatuses displayed on said display section. A transmitter transmits an access command to the desired one external apparatus. When the selected external apparatus receives the access command, the advisor advises the user of the access to the selected external apparatus, emitting flashing light.

Abstract: A signal processing device is a predetermined signal processing device among signal processing devices which perform signal processing on an input signal that is input to any one of the signal processing devices in such a manner that the signal processing devices share signal processing. The signal processing device includes a signal processing section that performs signal processing on a first-bandwidth signal, which is included in the input signal, in accordance with a processing capability of the signal processing device to generate a first output signal; and a signal integration section that integrates a second output signal with the first output signal, and that outputs the integrated signal to a second different signal processing device, the second output signal being generated in a first different signal processing device by performing signal processing on a second-bandwidth signal, which is included in the input signal.

Abstract: This is a computer-readable portable storage medium which is used by a computer managing a plurality of frame buffers and which stores a program enabling the computer to execute a process, and the process comprises preparing an area in which data of a valid chain indicating a connection among frame buffers storing valid image data of the plurality of frame buffers and data of a vacant chain indicating a connection among frame buffers storing no valid image data, is stored, on memory and generating/updating data of the valid chain and the vacant chain when valid image data is stored in one of the plurality of frame buffers and storing it in the memory.

Abstract: A method of transmitting data on a data line between a central control device and a decentralized data processing device. During a normal operation of the system, the central control device periodically sends synchronization pulses to the at least one data processing device via the data line in order to request data packets, and the decentralized data processing device sends the data thereof to be transmitted, as data packets, to the central control device, following the synchronization pulse. The data line is embodied as a data bus. Each of the decentralized data processing devices is configured by the central control device before the first transmission of data packets to the central control device. In order to configure the system, a bi-directional communication is carried out between the central control device and the at least one decentralized data processing device.

Abstract: A processing system and method for communicating in a processing system over a bus is disclosed. The processing system includes a receiving device, a bus having first, second and third channels, and a sending device configured to address the receiving device on the first channel, and read a payload from the receiving device on the second channel, the sending device being further configured to select between the first and third channels to write a payload to the receiving device.

Abstract: A state of an input/output (I/O) operation in an I/O processing system is determined. A request for performing the I/O operation is received from an I/O operating system at a channel subsystem and forwarded to a control unit controlling an I/O device for executing the I/O operation. After a predetermined amount of time passes without receiving indication from the control unit that the I/O operation is completed, an interrogation request is received at the channel subsystem from the I/O operating system for determining the state of the I/O operation. An interrogation command is sent from the channel subsystem to the control unit. A response is received from the control unit, the response indicates a state of the I/O device executing the I/O operation, a state of the control unit controlling the I/O device executing the I/O operation, and the state of the I/O operation being executed.

Abstract: A processing system and method for communicating in a processing system over a bus is disclosed. The processing system includes a receiving device, a bus having first, second and third channels, and a sending device configured to address the receiving device on the first channel, and read a payload from the receiving device on the second channel, the sending device being further configured to write a first portion of a payload to the receiving device on the first channel and a second portion of the payload to the receiving device on the third channel.

Abstract: A method for point-to-point ethernet communication over point-to-multipoint shared single conductor channel topology comprises transmitting an ethernet signal upstream over the point-to-multipoint topology from one end point of the topology to the root of the topology, transmitting the ethernet signal downstream over the point-to-multipoint topology from the root of the topology to all end points of the topology, and selectively processing only at a designated end point the ethernet signal received at all end points. An ethernet system may comprise single conductor channel cabling (e.g., coaxial cabling) including a trunk line and a plurality of branch lines connecting to the trunk line at a plurality of points along the trunk line, a single root transceiver (root-PHY) connected at an end of the trunk line, and a plurality of end point transceivers (EP-PHYs), each connected to a respective one of the plurality of branch lines.

Abstract: An interface to transfer data between a host processor and an external coprocessor is provided. The interface may operate in several write modes, in which in a first write mode the write operation is transferred across the interface in two clock cycles and in a second write mode the write operation is transferred across the interface in a single clock cycle. The interface can perform a first read operation initiated by the host processor and a second read operation initiated by the external coprocessor. The interface can include buffers to store read and write operations and clock gates to selectively gate off clock signals provided to the buffers to synchronize transfer of data into and out of the buffers. A selectable priority scheme can be modified to select between priorities that control a preference in transferring operations over the interface when both read and write operations are queued for transfer.

Abstract: A measurement facility is provided for capturing and presenting fine-grained usage information for adapter functions in an input/output subsystem. Adapter specific input/output traffic is tracked on a per function basis and the results are dynamically presented to the user. This information is useful for performance tuning, load balancing and usage based charging, as examples.

Abstract: A computer implemented method, data processing system, and computer program product for detecting circular buffer overflow. When an entry in the circular buffer is read, a valid mark bit in the entry is set to an inactive state and the location of the entry is stored as an entry previously processed. A valid mark bit of a next entry and the valid mark bit in the entry previously processed are read. Responsive to determining that the valid mark bit in the entry previously processed is in the inactive state and the valid mark bit in the next entry is in an active state, the next entry is read, the valid mark bit in the next entry is set to an incactive state, and the location of the next entry is stored as the entry previously processed. Responsive to determining that the valid mark bit in the entry previously processed is in the active state, a determination is made that a circular buffer overflow has occurred.

Abstract: In one embodiment, a method comprises, using at least one processor, controlling communication between Service Level Agreement (SLA) processes of an SLA services module and at least one I/O performance gateway; and using a thread pair associated with each of the at least one processors, processing inbound signals from the at least one I/O erformance atewa being sent to the SLA services module via an inbound thread, and processing outbound signals to the at least one I/O performance gateway received from the SLA services module via an outbound thread, wherein the inbound thread and the outbound thread operate asynchronously to provide non-blocking messaging.

Abstract: Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.

Abstract: The present invention provides a method and apparatus for data processing and virtualization. The method and apparatus are configured to receive communications, separate a command communication from a data communication, parallel process the command communication and the data communication, generate at least one virtual command based on the command communication, and generate virtual data according to the at least one virtual command. The apparatus can comprise a parallel virtualization subsystem configured to separate data communications from command communications and to parallel process the command communications and the data communications, to generate virtual commands and to generate virtual data according to a virtual command, and a physical volume driver coupled with the parallel virtualization subsystem, wherein the physical volume driver receives the virtual data and configures the virtual data.

Abstract: Provided are a relocation system and a relocation method capable of relocating a virtual volume that is formed based on thin provisioning while ensuring security against exhaustion of pools. A database stores attribute information for pools and virtual volumes for thin provisioning that exist in a storage device as well as parameters for predicting time period till exhaustion of the pools. When a virtual volume is to be relocated between a plurality of pools, a relocation control section predicts time periods till exhaustion of the pools before and after relocation based on information in the database and determines the relocation is possible or not based on the result of prediction or determines an appropriate relocation plan. This enables control of relocation of virtual volumes.

Abstract: A system and method for entity management is provided. In accordance with an aspect of the present invention, a system administrator is given control over device(s) that can be installed on a computer system(s), and/or how the installation can be performed. Thus, a system administrator can specify device installation policy that prevents the computer system from automatically installing device(s) (e.g., even when an appropriate driver is available to be installed). For example, this policy can be applied to substantially all new devices and/or only a subset of devices. Optionally, policy can also control how device(s) that are already installed will be made available to the computer system.

Abstract: Locks which protect data structures used within atomic sections of concurrent programs are inferred from atomic sections and acquired in a manner to avoid deadlock. Locks may be inferred by expression correspondence using a backward inter-procedural analysis of an atomic section. Locks may be sorted according to a total order and acquired early in an atomic section to prevent deadlock. Multiple granularity of locks are determined and employed. Fine grained locks may be inferred and acquired to reduce contention. Coarse grained locks may be determined and substituted for fine grained locks when necessary for unbounded locations or to reduce the number of finer grained locks.

Abstract: An image forming apparatus to supply a file transmission and reception list, and a control method thereof. The image forming apparatus may include a storing part and a controlling part to store a list of transmission and reception for transmitted and received files using an FTP (File Transfer Protocol). The file transmission and reception list may include a user name, a date of file transmission and reception, a file name, a file size, an address of a file transmitter recipient, and a user ID or password to log in an FTP server transmitting and receiving the file through the image forming apparatus.

Abstract: A communication system that performs data communications based on an SCSI command defined in the SCSI standard, the communication system includes; a peripheral device that performs at least one of writing and reading to/from a recording medium inserted into a slot; and an information processing device connected to the peripheral device, including: an OS kernel; an adding unit that adds communication data to a free area of Inquiry data generated by issuing Inquiry command to the OS kernel; and a transmitting unit that transmits the Inquiry data to the peripheral device including the communication data added by the adding unit, wherein the peripheral device includes: a receiving unit that receives the Inquiry data transmitted by the transmitting unit; and an extracting unit that extracts the communication data added to the received Inquiry data.

Abstract: A content-aware digital media storage device includes a host device interface for exchanging digital information with a host device, a memory array for storing digital information received from the host device via the host interface, a peripheral module configured to communicate the digital information stored in the memory array to a receiver located remote from the digital media storage device, and a controller communicatively coupled to the host device interface, the memory array and the peripheral module and configured to interpret directory information associated with the digital information stored in the memory array so as to selectively access said digital information and communicate such accessed digital information to the peripheral module for transmission to the remote receiver. Digital images stored in the memory array may be transmitted to a remote host via a wireless network access point with which the peripheral module of the storage device is associated.

Abstract: In an AV-data transfer system, AV data stored in a RAID embedded in an AV server is supplied to a client personal computer connected to a network such as the Internet or an intranet by way of the network, and AV data output by the client personal computer is transmitted to the AV server through the network to be stored in the RAID. The AV server makes accesses to the RAID to write and read out data into and from the RAID. In addition to the AV server, the AV-data transfer system also includes another personal computer for exchanging AV data with the client personal computer and receiving a variety of commands from the client personal computer by way of the network in accordance with an FTP (File Transfer Protocol). As a result, it is possible to fast handle access requests made by a larger number of client personal computers.

Abstract: A DMA transfer control device includes a setting register group for setting transfer informations, a number-of-transfers register to which the number of transfers to be performed is set, and which updates a value thereof every time one DMA transfer is completed, a transfer control unit, a secondary setting register group for setting other transfer informations different from the transfer informations, and a specified ordinal-number-of-transfer register. Every time one DMA transfer is initiated, either a value of the setting register group or a value of the secondary setting register group is selected for each of the transfer informations in accordance with a result of an arithmetic operation between a value of the number-of-transfers register and a value of the specified ordinal-number-of-transfer register, and inputted to the transfer control unit. As a result, by making settings for one DMA transfer, it is possible to temporarily change the transfer informations.

Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

Abstract: In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit control circuit, the offload engine is configured to perform at least a first operation on the first DMA data to produce a result. The offload engine is configured to at least start performing the first operation during a DMA transfer that provides the first DMA data to the offload engine. Coupled to the offload engine to receive the result, the receive control circuit is configured to write the result to the address space in the host according to a DMA descriptor data structure that describes the DMA transfer.

Abstract: An I/O device is provided to accurately synchronize clocks between nodes to have a device driving signal directly made out from the clocks, so that operation timing can be synchronized between the nodes regardless of a processing flicker on a host computer and a delay in a communication channel, and so that sending and receiving of a communication frame between the nodes, updating of contents of the communication frame, etc. can be efficiently performed.

Abstract: A method for enhancing the memory bandwidth available through a memory module of a memory system is provided. The memory system includes a memory hub device integrated in a memory module. The memory system includes a first memory device data interface integrated in the memory hub device that communicates with a first set of memory devices integrated in the memory module. The memory system also includes a second memory device data interface integrated in the memory hub device that communicates with a second set of memory devices integrated in the memory module. In the memory system, the first set of memory devices are separate from the second set of memory devices. In the memory system, the first and second set of memory devices are communicated with by the memory hub device via the separate first and second memory device data interfaces.

Abstract: A computer-implemented method, system and computer program product for managing USB ports on blades in a blade center are presented. A set of remotely-transmitted instructions causes a multiplexer to physically disconnect one or more selected USB ports on a blade. In one embodiment, the same one or more selected USB ports are also software-disabled by a USB software-based controller.

Abstract: Data replication systems and methods are disclosed. In one embodiment, the method comprises at a system controller of a disk device, receiving data at a system controller of a removable cartridge storage device, transferring the data to a first portable data cartridge and transferring the data to a second portable data cartridge. The first and second portable data cartridges are electrically coupled with the system controller and removably coupled with the removable cartridge storage device.

Abstract: For a storage system provided with a plurality of storage modules including a first storage module and a second storage module, the first storage module is provided with a first switch circuit including a plurality of ports and a first circuit connected to any of the plurality of ports included in the first switch circuit via an internal path, and the second storage module is provided with a second circuit. A direct path that is a path for connecting the first switch circuit and the second circuit is connected to any of the plurality of ports included in the first switch circuit. The first circuit issues a packet addressed to the second circuit. The first switch circuit receives the packet addressed from the first circuit to the second circuit, and outputs the packet from a port connected to the direct path to the second circuit.

Abstract: Provided are a method, system, and article of manufacture, in which a logical path is established between a control unit and a channel over a fiber channel connection. Code for persistent information unit pacing is loaded into the control unit and the channel. An indicator is set in node descriptors of the control unit and the channel to indicate concurrent enablement of persistent pacing while retaining the established logical path between the control unit and the channel.

Abstract: A method for controlling power consumption of a Universal Serial Bus (USB) Mass Storage is provided. The USB Mass Storage is electrically connected to a USB port. The method includes: monitoring at least one Test Unit Ready (TUR) command from an operating system (OS) to the USB Mass Storage; and when it is detected that there is no other command from the OS to the USB Mass Storage for a predetermined time period, controlling the USB port to enter a suspend mode in order to save power supplied to the USB Mass Storage. An associated personal computer and a storage medium storing an associated USB Mass Storage driver for controlling power consumption of the USB Mass Storage are further provided, where the personal computer includes the storage medium. In particular, when the USB Mass Storage driver is executed by the personal computer, the personal computer operates according to the method.

Abstract: A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU. The audio entertainment system employs a set of ping/pong buffers and direct memory access (DMA) circuits to transfer data between different audio devices. Audio data is exchanged using a mapping overlay technique, in which the DMA circuits for two audio devices read and write to the same memory buffer. The computer system provides an audio manager API (application program interface) to enable applications running on the computer to control the various audio sources without knowing the hardware and implementation details of the underlying sound system. Different audio devices and their drivers control different functionality of the audio system, such as equalization, volume controls and surround sound decoding. The audio manager API transfers calls made by the applications to the appropriate device driver(s).

Abstract: An article of manufacture, an apparatus, and a method for providing extended measurement word data from a control unit to a channel subsystem of an I/O processing system are disclosed. The article of manufacture includes at least one computer usable medium having computer readable program code logic. The computer readable program code logic performs a method including receiving a command message from the channel subsystem at the control unit, and initiating a timing calculation sequence of a plurality of time values in response to receiving the command message at the control unit. The computer readable program code logic also populates extended measurement word data at the control unit including the plurality of time values, and outputs the extended measurement word data from the control unit to the channel subsystem.

Abstract: A data relay apparatus for communication module is disclosed, whereby a plurality of normally operative communication modules can perform data communication thereamong by allowing a data relay unit to relay data received by an input/output (I/O) port of an inoperative communication module in a case there is available an inoperative communication module among the plurality of communication modules, in a network configured by connecting the plurality of communication modules having two I/O Ethernet communication ports connected via a line topology.

Abstract: An article of manufacture, apparatus, and a method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation having both input and output data. The TCW specifies a location of the output data and a location for storing the input data. The host computer system forwards the I/O operation to the control unit for execution. The host computer system gathers the output data responsive to the location of the output data specified by the TCW, and then forwards the output data to the control unit for use in the execution of the I/O operation. The host computer system receives the input data from the control unit and stores the input data at the location specified by the TCW.

Abstract: A circuit and corresponding method for transferring data. The circuit comprises: a CPU; a plurality of addressable devices; and a DMA engine coupled to the CPU and to those devices, the DMA engine comprising a plurality of DMA contexts each having fetch circuitry for fetching a DMA descriptor indicated by the CPU and transfer circuitry for transferring data from one to another of the devices based on a fetched descriptor. The DMA engine further comprises switching means operable to control a group of the contexts to alternate in a complementary sequence between fetching and performing a transfer, such that alternately one or more contexts in the group fetch while one or more others perform a transfer.

Abstract: A method of configuring and performing stream data processing linked to a series of process points for high portability uses a link module to connect process points, called peer modules, to configure a stream data path. A single execution context is used for scheduling to enable high-performance processing. These constituent features are provided in a layer configuration to realize high portability and ease of development.

Abstract: In an environment in which plural external storage devices having different function control interfaces are intermixed, when a function of a storage device is controlled from a computer, a common interface for controlling the function of the storage device is provided. A device that provides the common interface manages an interrelationship between a storage area recognized by a host computer and a storage area provided by the storage device and associates a storage area which becomes a target of a function control instruction with the storage device that provides the storage area. A type of the storage device that provides the storage area which becomes the target of the function control instruction is identified and function control is ordered through a function control interface unique to the device.

Abstract: A technique for monitoring computers connected to a hardware switch. The switch is used to selectively connect a single set of peripheral units to the central unit of a selected one of the computers. In the proposed solution, status information of each non-selected computer is transmitted from the corresponding central unit to the switch. For this purpose, it is preferably exploited a corresponding bi-directional input port—such as of the USE type. The switch routes the status information of the different non-selected computers to the central unit of the selected computer. The central unit of the selected computer aggregates the status information with its output information, and then transmits this aggregated information to the switch for its display on a monitor. For example, the output information is shown in a main area of the screen, while the status information is shown in a reserved strip on top of it.

Abstract: Methods and apparatus that allow recovery in the event that sequence counts used on receive and transmit sides of a communications link become out of sync are provided. In response to receiving a packet with an expected sequence count from a receiving device, a transmitting device may adjust pointers into a transmit buffer allowing the transmitting device to begin transmitting packets with the sequence count expected by the receiving device.

Abstract: When a subject of access of a transaction from an IO device is not any resource allocated to a logical partition to which the device having issued the transaction belongs, a report as an error is sent to a CPU, while the transaction is finished on the IO bus. To prevent a transaction between IO devices from gaining access to any resource in another logical partition, one access permission bit is provided for each combination of all the IO devices, and the access is permitted only when the bit has a predetermined value. A reset signal is provided by IO slot so that only an IO slot allocated to a specific logical partition can be reset without affecting any other logical partition. A transaction issued from an IO device in one logical partition is prevented from gaining access to a resource in another logical partition, while proper error handling can be performed.

Abstract: A method and system for performing serial data communication between a main device and an external module connected to the main device. The data communication system and method include a main device, and an external module connected to the main device and communicating data with the main device. The external module transmits its identification information to the main device before the external module and the main device communicate the data between each other, and the main device receives the identification information from the external module, confirms its connection to the external module, and transmits an identification information confirmation signal to the external module.

Abstract: A transfer apparatus includes a connection status detection block, a storage status detection block, a no-operation status detection block, and a transfer block. The transfer block can automatically transfer candidate data to a memory device when a connected status is detected by the connection status block, the transfer candidate stored status is detected by the storage status detection block, and a no-operation status is detected by the no-operation status detection block.

Abstract: An image forming apparatus includes a job execution portion, a connecting portion for detachably connecting an external storage, a detection portion for detecting connection to the connecting portion of the external storage, a stored information reading portion for reading stored information of the external storage based on connection detection of the external storage by the detection portion, an internal storage portion for storing the read stored information, and a job administration portion for making the job execution portion execute a job about the stored information stored in the internal storage portion and for registering the job about the stored information as a processing wait job when the job execution portion is executing another job.

Abstract: A mechanism is provided for performing collective operations. In hardware of a parent processor in a first processor book, a number of other processors are determined in a same or different processor book of the data processing system that is needed to execute the collective operation, thereby establishing a plurality of processors comprising the parent processor and the other processors. In hardware of the parent processor, the plurality of processors are logically arranged as a plurality of nodes in a hierarchical structure. The collective operation is transmitted to the plurality of processors based on the hierarchical structure. In hardware of the parent processor, results are received from the execution of the collective operation from the other processors, a final result is generated of the collective operation based on the received results, and the final result is output.

Abstract: A storage control apparatus capable of reducing a power consumption in network port units, including a host communication control unit 10 which includes a plurality of network ports 18 and which controls communications with a host computer 2 that is connectable through the network ports, a storage-device communication control unit 16 which controls communications with a plurality of storage devices, a plurality of DMA portions 111 by which data to be transmitted/received between the host computer and the storage devices are transferred between the host communication control unit 10 and the storage-device communication control unit 16, a plurality of cache memories 12 in which the data to be transferred by the DMA portions 111 are temporarily stored, and a power saving control portion 110 which stops the DMA portion 111 and the cache memory 12 that are previously associated with one network port, on the basis of a connection situation of the pertinent network port with the host computer and a data rate to be i

Abstract: A method for accessing a data storage system, the method implemented by a data processing system and comprising: generating a read-only data access port and a read-write data access port to the data storage system; communicatively connecting a first process to the read-only data access port; communicatively connecting a second process to the read-write data access port; identifying a data-throughput requirement associated with the read-only data access port; and delivering data to the first process at a rate that meets the data-throughput requirement at an expense, if necessary, of a data rate delivered to the second process.

Abstract: A data processing system containing a monolithic network of cells with sufficient redundancy provided through direct logical replacement of defective cells by spare cells to allow a large monolithic array of cells without uncorrectable defects to be organized, where the cells have a variety of useful properties. The data processing system according to the present invention overcomes the chip-size limit and off-chip connection bottlenecks of chip-based architectures, the von Neumann bottleneck of uniprocessor architectures, the memory and I/O bottlenecks of parallel processing architectures, and the input bandwidth bottleneck of high-resolution displays, and supports integration of up to an entire massively parallel data processing system into a single monolithic entity.

Abstract: An article of manufacture, apparatus, and a method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation having both input and output data. The TCW specifies a location of the output data and a location for storing the input data. The host computer system forwards the I/O operation to the control unit for execution. The host computer system gathers the output data responsive to the location of the output data specified by the TCW, and then forwards the output data to the control unit for use in the execution of the I/O operation. The host computer system receives the input data from the control unit and stores the input data at the location specified by the TCW.

Abstract: A method and apparatus are described to provide shared switch and cache memory. The apparatus may comprise a message switch module, a cache controller module, and shared switch and cache memory to provide shared memory to the message switch module and to the cache controller module. The cache controller module may comprise pointer memory to store a plurality of pointers, each pointer pointing to a location in the shared switch and cache memory (e.g., point to a message header partition in the shared switch and cache memory). If there is a corresponding pointer, a memory read response may be sent to the requesting agent. If there is no corresponding pointer, a write data request may be sent to a corresponding destination agent and, in response to receiving the requested data, a pointer to the stored data in the pointer memory may be provided.