Abstract: A processing system and method for communicating in a processing system over a bus is disclosed. The processing system includes a receiving device, a bus having first, second and third channels, and a sending device configured to address the receiving device on the first channel, and read a payload from the receiving device on the second channel, the sending device being further configured to write a first portion of a payload to the receiving device on the first channel and a second portion of the payload to the receiving device on the third channel.

Abstract: The present invention provides an improved method and system of improving the efficiency, and ensuring the integrity, of a data transfer in a serverless backup, or third party copy, system having one or more physical storage devices. The present invention provides improvements to the processing of serverless copy, or EXTENDED COPY, commands, and transfers of data associated with such commands. These improvements increase the speed at which such commands are executed and completed, and increase the capabilities of copy managers in serverless backup systems. The improvements also make better use of the storage devices involved in the data backup process. Certain aspects of the invention allow for execution of data segments of any size, and providing a compiler for generating input/output actions.

Abstract: A system and method are provided for managing reader and writer threads in a caching proxy server. In general, a caching proxy server operates as an intermediary between a web server and a number of client devices. The clients send requests for digital assets hosted by the web server to the caching proxy server. For each request, or more particularly for each group of concurrent requests, for a particular digital asset, the caching proxy server operates in either a decoupled writer mode of operation or a reader/writer mode operation. In addition, while serving the requests, the proxy server may switch between the decoupled writer and the reader/writer modes of operation depending on one or more criteria.

Abstract: A network device is described that concurrently executing more than one instance of an operating system on a single processor. Each of the instances of the operating system executes completely independent of the other instances. In this way, disparate instances may exist for the same operating system or for different operating systems. The techniques allow the processor to concurrently execute, for example, an instance of the operating system may emulate a routing engine and an instance of the operating system may emulate an interface controller. A hyper scheduler performs context switches between the operating systems to enable the processor to concurrently execute the instances of the operating system. The techniques may provide a low cost alternative to employing multiple processors within a network device, such as a router, to execute multiple independent operating systems.

Abstract: A device for data packet processing is disclosed. In one embodiment, the device includes a processor implemented on a chip, an on-chip internal segment memory accessible by the processor, an off-chip external segment memory and a data transfer channel between the internal segment memory and the external segment memory. The external segment memory comprises first and second memory segments wherein the first and second memory segments are different in size.

Abstract: The present invention discloses a method of editing a multi-media playing schedule for a digital photo frame, a system and a computer readable storage medium thereof, which are characterized in that users can edit a multi-media playing schedule on the data processing apparatus when the digital photo frame is electrically connected to the data processing apparatus, and after editing of the multi-media playing schedule is finished, the multi-media playing schedule is transmitted to the digital photo frame and stored in the digital photo frame. Therefore, the problem of being unable to edit complicated multi-media playing schedules due to simple operation interface of digital photo frames can be solved.

Abstract: A gaming apparatus may include a display unit capable of generating video images, a first value input device, and a controller operatively coupled to the display unit and the value input device. The first value input device may be located at a first geographic location. The controller may comprise a processor and a memory, and may be programmed to allow a person to make a wager, to cause a first video image to be generated on the display unit, and to determine a first value payout associated with an outcome of a game. The first video image may represent a first game wagered on the first value input device. The controller may also cause a second video image to be generated on the display unit. The second video image may represent a second game wagered on at a second value input device located at a second geographic location different from the first geographic location.

Abstract: A clustered storage array consists of multiple nodes coupled to one or more storage systems. The nodes provide a LUN-device for access by a client. The LUN-device maps to a source logical unit corresponding to areas of storage on the one or more storage systems. A target logical unit corresponds to different areas of storage on the one or more storage systems. The source logical unit is migrated in parallel by the multiple nodes to the target logical unit. Data to be copied from the source logical unit to the target logical unit are grouped into data chunks. Two or more of the plurality of nodes concurrently attempt to acquire an exclusive lock for a set of data chunks. The node acquiring the exclusive lock migrates the set of data chunks from the source logical unit to the target logical unit, while the exclusive lock is used to prevent other nodes from migrating the set of data chunks.

Abstract: A storage system includes a plurality of disk apparatuses configuring a plurality of RAID groups, a spare disk apparatus, and a controller. The controller is adapted to copy data stored in a disk apparatus, whose error count exceeds a first threshold, to the spare disk apparatus. If an error count of a disk apparatus included in a RAID group exceeds a second threshold which is lower than the first threshold, the controller is adapted to check error counts of other disk apparatuses included in the same RAID group. If any of the error counts of the other disk apparatuses included in the same RAID group exceeds the second threshold, the controller is adapted to change the first value of the first disk apparatus and the other disk apparatuses included in the same RAID group.

Abstract: According to some embodiments, an apparatus may be capable of exchanging information with t potential universal serial bus endpoints, where t is an integer greater than 1. Moreover, x endpoint state machines may be established, where x is an integer greater than 1 and less than t. A first endpoint state machine may then be assigned to a first potential endpoint having a pending work item. Before the apparatus has completed the pending work item associated with the first potential endpoint, the first endpoint state machine may be flushed, and the first endpoint state machine may be re-assigned to a second potential endpoint.

Abstract: A computer program product, apparatus, and method are provided for determining a state of an input/output (I/O) operation in an I/O processing system. A request from a channel subsystem is received at a control unit for performing the I/O operation. After a predetermined amount of time passes without the I/O operation completing, an interrogation request is received from the channel subsystem at the control unit for determining the state of the I/O operation. A response is sent from the control unit to the channel subsystem indicating the state of the I/O operation in response to the interrogation request. The response also includes information regarding a state of an I/O device executing the I/O operation and information indicating a state of the control unit controlling the I/O device executing the I/O operation.

Abstract: Particular embodiments include a system and method to enable a user-controlled proxy system or coordinating computer to automatically or semi-automatically communicate with multiple devices, determine the currently operating software contents and versions for each device, and to automatically or semi-automatically upgrade each device with updated software without requiring user intervention. The software may include communication, operating system or application-specific program codes that improve a given device's designed function.

Abstract: Embodiments of the present invention provide an interface device and method for command processing for commands requiring data flow in both directions on a Fiber Channel or other data transport protocol exchange. The commands can include proprietary commands, SCSI linked commands or other commands known in the art. According to one embodiment, and interface device can assign a command a data flow direction indicator. When a reply to the command is received, the interface device can determine if the reply is expected or unexpected based on the data flow direction specified by the data flow direction indicator. If the reply is unexpected, the interface device can determine whether to process the reply. According to one embodiment, the data flow direction indicator can be the exchange identification.

Abstract: An image-inputting apparatus into which an image is inputted is disclosed. The apparatus includes an information receiving section that receives a first item of information; a decision section that makes a determination as to whether the first item of information should be permitted to use the image-inputting apparatus, the determination being made based on the first item of information inputted into the image-inputting apparatus and a second item of information that has been registered previously in the image-inputting apparatus; and a transmitter that transmits the first item of information to an image-outputting apparatus. The image-inputting apparatus outputs the image to the image-outputting apparatus in accordance with the determination made by said decision section and a reply received from the image-outputting apparatus in response to transmission of the first item of information.

Abstract: Systems, methods and computer program products for providing indirect data addressing at an I/O subsystem of an I/O processing system. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a control word for an I/O operation. The control word includes an indirect data address for data associated with the I/O operation. The indirect data address includes a starting location of a list of storage addresses that collectively specify the data, the list spans two or more non-contiguous storage locations. Data is gathered responsive to the list. The gathered data is transmitted to a control unit in the I/O processing system.

Abstract: An Extended Input/output (I/O) measurement word facility is provided. Provision is made for emulation of the Extended I/O measurement word facility. The facility provides for storing measurement data associated with a single I/O operation in an extended measurement word associated with an I/O response block. In a further aspect, the stored data may have a resolution of approximately one-half microsecond.

Abstract: A mechanism is provided for locking an end device for the period of time that the device is needed, thus disabling access by any other application or process. Having the device locked, rather than the bus, allows other applications to use the bus to access other devices at the same time. This is achieved by providing a virtual bus arbitration, which arbitrates applications' use of the physical bus. The virtual bus arbitration algorithms allow bus operations from different applications to overlap on the physical bus as long as their target devices and associated bus locks are on different end devices.

Abstract: This invention increases the design efficiency of an upper layer such as a job control means. To accomplish this, an image processing apparatus having a plurality of types of external interfaces (a USB and LAN) different in protocol has an external interface adaptor 203 which dynamically allocates external interfaces as objects of processing to lower layer IDs within a predetermined range, and a job controller 202 which controls execution of various types of jobs by using the lower layer IDs, and a value which the lower layer ID can take is constant regardless of the type of external interface.

Abstract: Described is a system to control a flow of packets to and from an electronic processor which includes a packet processor engine programmed to interpret the packets from a packet memory, and to perform switching between packet chains in response to events, a working chain pointer register of the packet processor engine, programmed to indicate progress in executing an active buffer chain, prioritized pointer storage registers of the packet processor engine, each of the registers being programmed to point to one of the active buffer chains, a control register of the packet processor engine having chain start bits and chain protect bits, the chain start bits identifying the chains that have been started and wsa status register of the packet processor engine, having a chain actives group identifying the chain that is currently running, a chain matches group, a chain stops group identifying the chains that have been stopped and a timer expirations group.

Abstract: A method and apparatus are described to provide shared switch and cache memory. The apparatus may comprise a message switch module, a cache controller module, and shared switch and cache memory to provide shared memory to the message switch module and to the cache controller module. The cache controller module may comprise pointer memory to store a plurality of pointers, each pointer pointing to a location in the shared switch and cache memory (e.g., point to a message header partition in the shared switch and cache memory). If there is a corresponding pointer, a memory read response may be sent to the requesting agent. If there is no corresponding pointer, a write data request may be sent to a corresponding destination agent and, in response to receiving the requested data, a pointer to the stored data in the pointer memory may be provided.

Abstract: A method for allowing simultaneous parameter-driven and deterministic simulation during verification of a hardware design, comprising: enabling a plurality of random parameter-driven commands from a random command generator to execute in a simulation environment during verification of the hardware design through a command managing device; and enabling a plurality of deterministic commands from a manually-driven testcase port to execute in the simulation environment simultaneously with the plurality of random parameter-driven commands during verification of the hardware design through the command managing device, the plurality of deterministic commands and the plurality of random parameter-driven commands each verify the functionality of the hardware design.

Abstract: A Multi-Media Card/Secure Digital (MMC/SD) single-chip flash device contains a MMC/SD flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. MMC/SD transactions from a host MMC/SD bus are read by a bus transceiver on the MMC/SD flash microcontroller. Various routines that execute on a CPU in the MMC/SD flash microcontroller are activated in response to commands in the MMC/SD transactions. A flash-memory controller in the MMC/SD flash microcontroller transfers data from the bus transceiver to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: The present invention relates to service and maintenance solutions for programmable and/or reconfigurable modules (CM1, . . . , CMn), which are included in the nodes of a communications network (140). The module (CM1) contains a first digital storage unit (M1), which holds information pertaining to the accomplishment of a primary function of the module. A secondary function of the module involves control of the primary function. The module has an optical bi-directional interface (Iw) towards the first digital storage unit. Data in the first digital storage unit may be read out (D0) and may also be updated (Di) by the portable software carrier unit via the optical bi-directional interface. Data read-out as well as data updating may be accomplished independently of the primary function. Preferably, an access module (A) controls the bi-directional interface in response to an authorization signal (SA) from an authorization unit (120, 121, 122, 123).

Abstract: The present invention relates to an application of the Universal Serial Bus (USB) technology, and more particularly, to a USB apparatus with data storage and security token and control method therein. In an embodiment of the present invention, both mass storage and security token are implemented in a USB apparatus with a single controller. Thus, the host needs to enumerate the apparatus only once, and then may operate differentially in response to different commands. The mass storage is capable of swapping a mass of data, and has a file allocation table compatible with the system. The security token can be used for authenticating a person through digital certificates or biometric characteristics, maintaining the security of the computer and network applications.

Abstract: A module type node apparatus for packet communication of this invention includes an extension module for executing predetermined processing and a node apparatus main body for forwarding packet data to the extension module, the extension module including a memory for storing connectivity authentication data, and a module controller for transmitting the connectivity authentication data stored in the memory to the node apparatus main body for packet communication when the connectivity authentication data is requested from the node apparatus main body for packet communication, the node apparatus main body for packet communication being characterized by further including a connectivity authentication unit for authenticating permission of connection of the extension module based on the connectivity authentication data received from the extension module, and a connection controller for receiving the packet data from the extension module when the connectivity authentication unit permits the connection.

Abstract: A computer gaming system and method of operation thereof are provided that both drastically reduce the cost of gaming stations and allow contemporaneous access to multiple game programs from a single gaming station. The computer gaming system of the present invention allows for transparent modifications and upgrades to the gaming programs by executing gaming programs on a server/host computer connected to a plurality of client/terminal computers via communication pathways. Each client/terminal computer comprises a client/terminal program that allows input and output streams of the gaming program executed on the server/host computer to be separated and redirected to the client/terminal computers. Since the gaming programs are executed entirely on the server/host computer, with only wagering input and display output operations being executed on the client/terminal computers, the cost of the hardware and software required for each client/terminal computer is greatly reduced.

Abstract: A scalable first-in-first-out queue implementation adjusts to load on a host system. The scalable FIFO queue implementation is lock-free and linearizable, and scales to large numbers of threads. The FIFO queue implementation includes a central queue and an elimination structure for eliminating enqueue-dequeue operation pairs. The elimination mechanism tracks enqueue operations and/or dequeue operations and eliminates without synchronizing on the FIFO queue implementation.

Abstract: A storage system that includes: a plurality of microprocessors; a plurality of storage areas to be formed to a drive group; an assignment section that assigns, to each of the microprocessors, an ownership of accessing any of the storage areas; a management section that manages, as an operating ratio, a proportion of a time to be taken for each of the microprocessors to execute a request issued to each of the storage areas; a search section that searches, for transferring the ownership assigned to an arbitrary one of the microprocessors to any of the another microprocessor determined based on the operating ratio, one or more of the storage areas under the ownership of the arbitrary microprocessor for a transfer-target storage area; and a transfer section that transfers, to the another microprocessor, the ownership of the transfer-target storage area that is assigned to the arbitrary microprocessor.

Abstract: Roughly described, method for managing data transmission between a host subsystem and a network interface device, in which the host writes data buffer descriptors into a DMA descriptor queue, and the network interface device writes completion events to notify the host when it has completed processing of data buffers. Each of the completion event descriptors notify the host of completion of data transfer between the NIC and one or more of the data buffers, and can also embed a queue empty notification inside the completion event.

Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Abstract: A method of packaging a plurality of repeating commands for device command word (DCW) processing in a computer environment having an I/O link handling complex instruction chains for a processing operation is provided. Locate record information is packaged into DCW prefix parameter data. The locate record information includes an intent count argument. The plurality of repeating commands are embedded as a truncated concatenation to the first locate record information. The plurality of repeating commands are identified by redefining the intent count argument for the plurality of repeating commands as a repeat count argument using a flag argument incorporated into the locate record information. The repeat count argument indicates a number of times for a control unit in the computer environment to execute the plurality of repeating commands.

Abstract: A processing of consistent data sets by asynchronous application of a subscriber in an isochronous, cyclical communication system is provided. Accordingly, by connecting a communication memory and a consistency, transmission and reception buffer, copying processes leading delay can be kept to a minimum.

Abstract: When a subject of access of a transaction from an IO device is not any resource allocated to a logical partition to which the device having issued the transaction belongs, a report as an error is sent to a CPU, while the transaction is finished on the IO bus. To prevent a transaction between IO devices from gaining access to any resource in another logical partition, one access permission bit is provided for each combination of all the IO devices, and the access is permitted only when the bit has a predetermined value. A reset signal is provided by IO slot so that only an IO slot allocated to a specific logical partition can be reset without affecting any other logical partition. A transaction issued from an IO device in one logical partition is prevented from gaining access to a resource in another logical partition, while proper error handling can be performed.

Abstract: A system comprising a plurality of controller circuits, a plurality of line buffer circuits and an arbiter. The plurality of control circuits may each be configured to store data. The plurality of line buffer circuits may each be configured to transfer data between an accessed one of the controller circuits and one of a plurality of first busses. The arbiter circuit may be configured to control access to the controller circuits by the line buffer circuits.

Abstract: Disclosed is provided an apparatus and a method for operating a macro command and inputting a macro command, wherein the apparatus including a storing unit storing control signals received from a control device for selecting of a menu item of a host device, a creating unit creating the macro command combined with the control signals, and an executing unit reading the macro command and executing functions corresponding to the respective menu item of the host device according to a combination sequence of the control signals included in the read macro command.

Abstract: Producers and consumer processes may synchronize and transfer data using a shared data structure. After locating a potential transfer location that indicates an EMPTY status, a producer may store data to be transferred in the transfer location. A producer may use a compare-and-swap (CAS) operation to store the transfer data to the transfer location. A consumer may subsequently read the transfer data from the transfer location and store, such as by using a CAS operation, a DONE status indicator in the transfer location. The producer may notice the DONE indication and may then set the status location back to EMPTY to indicate that the location is available for future transfers, by the same or a different producer. The producer may also monitor the transfer location and time out if no consumer has picked up the transfer data.

Abstract: A device for preventing a process collision based on plural of input signals includes an input block for receiving a first and a second input signals to thereby generates a first and a second process request signals, a collision controller for controlling the process collision in accordance with a predetermined priority, and a signal processing block for outputting a first process signal in response to the first process request signal and outputting a second process signal in response to the second process request signals. Herein, the process collision is caused one of cases when the second input signal is inputted at an activation sector of the first process signal of the first input signal, when the first input signal is inputted at an activation sector of the second process signal of the second input signal, and when the first and the second inputs are inputted concurrently.

Abstract: A hardware-based offload engine is disclosed for mapping protected data into frames. For a write operation, the HBA determines host addresses and the size of data to be read from those addresses. The HBA also determines the frame size and protection scheme for data to be written. A frame transmit engine reads each host descriptor in the host data descriptor list to determine the location and byte count of the data to be read. A DMA engine reads the protection information/scratch area to determine the exact data size used to fill each frame and the protection scheme, and retrieves one or more free frame buffers. Check bytes are inserted alongside the data and stored in free frame buffers. After each frame is filled, the frame transmit engine also generates and stores header information for that frame, and then combines header, data and check bytes for transmission over the network.

Abstract: A Universal Serial Bus (USB) flash drive comprising a controller including a USB interface and a nonvolatile computer readable medium interface. The USB flash drive may also comprise a nonvolatile computer readable medium in communication with the nonvolatile computer readable medium interface and storing data and a USB connector in communication with the USB interface. The USB flash drive may also comprise a transmitter for transmitting at least a portion of data from the nonvolatile computer readable medium to an external device external to the USB flash drive. The transmitter may be substantially simultaneously operable with the USB connector, may send a modulated data signal, and/or may send the at least portion data in a compressed format.

Abstract: Disclosed is storage system, that is, an array-type disk apparatus which is provided with an error monitor section which monitors the status of error occurrence in a disk drive and instructs initiation of mirroring between the disk drive and a spare disk drive when the number of errors occurred of the disk drive exceeds a specified value, and a mirror section which performs mirroring between the disk drive and spare disk drive. Storage system, that is, the array-type disk apparatus may be provided with an error monitor section which monitors the status of error occurrence in a disk drive and gives such an instruction as to set the status of the disk drive in a temporary blocked state, and a data restoring section which executes data restoration by reading data from the temporary blocked disk drive when reading from another disk drive constituting a disk array group is not possible during data restoration.

Abstract: A method for controlling the sequence of a plurality of functions which are executable on at least two interacting devices is provided, first of the functions being implemented on a first device and the second of the functions being implemented on a second device. A system for implementing the method is provided, including an administrative unit which controls a sequence of the functions in such a manner that it prevents a first function and a second function which interfere with one another from simultaneously running.

Abstract: A data relay apparatus for communication module is disclosed, whereby a plurality of normally operative communication modules can perform data communication thereamong by allowing a data relay unit to relay data received by an input/output (I/O) port of an inoperative communication module in a case there is available an inoperative communication module among the plurality of communication modules, in a network configured by connecting the plurality of communication modules having two I/O Ethernet communication ports connected via a line topology.

Abstract: A method and apparatus is presented allowing multiple data pointers or addresses to be transferred without acknowledgment to Memory Controller (506) and Memory Controller (510) of Data Controller (500). Data is then transferred in response to the data pointers from BUFFER (512) and Buffer (514) and may be stalled during the transfer in favor of a second data transfer. Once the second data transfer finishes, the first data transfer may be completed.

Abstract: A method includes storing video data in a disk by way of a first queue comprising a linked list of buffers. Video data are received into the first queue by way of a tail buffer. The tail buffer is at one end of the linked list of buffers in the first queue. Video data are copied from a head buffer to the disk. The head buffer is at another end of the linked list of buffers in the first queue. The video data are displayed in real-time directly from the buffers in the queue, without retrieving the displayed video data from the disk, and without interrupting the storing step.

Abstract: A memory control apparatus generates a plurality of commands whose unit of data transfer is smaller than the unit of data transfer of a memory access request, and when the memory access requests are transmitted from a plurality of request sources, issues the plurality of commands to a memory in alternate order for each request source. The plurality of memory access requests are executed by time division and concurrently.

Abstract: An information storage device, by which only information outputted in a state desired by a user can be stored and disclosed with minimum time and trouble of the user, is provided. After FAX transmission, the FAX image is displayed and an inquiry concerning whether to store the FAX image or not is conducted. When the user performs an operation designating registration of the FAX image in a database (i.e. when a registration command button is pressed by the user), the FAX image is registered in the database. When the user performs an operation designating discard of the FAX image (i.e. when a discard command button is pressed by the user), the FAX image is discarded. Since the user can decide whether or not to register the FAX image in the database after checking the image to be registered, registration of undesired image in the database can be prevented.

Abstract: A data transfer interface system is provided that directly transfers data from one data storage drive to another data storage drive under the control of a host. The host and data storage drives are jointly connected to one another with data lines and control lines. Each data storage drive is connected separately to the host with a read/write command line. The host initializes the data storage drives providing initialization data to the drives where the data may include position information and commend information. After initialization, the host concurrently instructs one data storage drive to read the data from the drive while the other data storage drive writes the data to memory.

Abstract: A data transfer method and system are provided that prevent the length of a time required for writing to a flash memory from appearing on the surface as a system operation when the flash memory is used in place of an SRAM. The method of transferring data includes the steps of writing data from a controller to a volatile memory, placing the volatile memory in a transfer state, transferring the data from the volatile memory in the transfer state to a nonvolatile memory, and releasing the volatile memory from the transfer state in response to confirming completion of the transfer of the data.

Abstract: In general, in one aspect, the disclosure describes a system including multiple programmable processing units, a dedicated hardware multiplier, and at least one bus connecting the multiple processing units and multiplier.