Abstract: The present disclosure relates to a method for enabling a virtual processing unit to access a peripheral unit, the virtual processing unit being implemented by a physical processing unit connected to the peripheral unit, the method comprising a step of transmitting to the peripheral unit a request sent by the virtual processing unit to access a service provided by the peripheral unit, the access request comprising at least one parameter and an identifier of the virtual unit, the method comprising steps, executed by the peripheral unit after receiving an access request, of allocating a set of registers to the virtual unit identifier received, storing the parameter received in the register set allocated, and when the peripheral unit is available for processing a request, selecting one of the register sets, and triggering a process in the peripheral unit from the parameters stored in the selected register set.

Abstract: A bus system includes: a first connection apparatus and a second connection apparatus carrying-out an exchange in accordance with a predetermined protocol; a bus through which the first and second connection apparatuses are connected to each other; and a bridge inserted between the first connection apparatus and the bus, and carrying out an exchange with the second connection apparatus in accordance with the predetermined protocol instead of the first connection apparatus when receiving a disconnection instruction for the first connection apparatus.

Abstract: Methods and apparatus relating to an inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipeline are described. In one embodiment, logic may arbitrate between two queues based on various rules. The queues may store data including local or remote requests, data responses, non-data responses, external interrupts, etc. Other embodiments are also disclosed.

Abstract: On embodiment includes a computer program product for performing a method including: obtaining information relating to an I/O operation at a channel subsystem in a host computer system; generating addressing information and forwarding the addressing information from at least one channel to a network interface between the channel subsystem and at least one I/O device, the addressing information specifying a location in a local channel memory; forwarding an I/O command message to the at least one I/O device via the network interface; responsive to the I/O command message, receiving a data transfer request from the network interface that includes the addressing information; responsive to receiving the data transfer request, accessing one of a plurality of address control words (ACWs), each ACW specifying an address of a location in a host computer memory; and routing the data transfer request to the host memory location specified in the ACW.

Abstract: A method and system for an improved input/output (I/O) request quality of service (QoS) across multiple host I/O ports are disclosed. In one example, an I/O request associated with a classification parameter is received. The I/O request is generated by one of a plurality of host servers. Further, a classification value is determined based on the classification parameter by a host tagging agent residing one of the plurality of host servers. Furthermore, the classification value is associated with the I/O request by the host tagging agent. In addition, the I/O request is prioritized based on the classification value by a host port queuing manager and a host QoS controller. Based on the priority, the I/O request is sent to one of a plurality of target devices by the host port queuing manager and the host QoS controller.

Abstract: Methods and apparatus relating to an inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipeline are described. In one embodiment, logic may arbitrate between two queues based on various rules. The queues may store data including local or remote requests, data responses, non-data responses, external interrupts, etc. Other embodiments are also disclosed.

Abstract: Provided are a computer program product, system, and method for quiescing Input/Output (I/O) requests to subsets of logical addresses in a storage for a requested operation. A requested operation is received to a subset of addresses in the storage that requires that Input/Output (I/O) requests to the subset of addresses received following the requested operation be quiesced. The subset of addresses is indicated in quiesce information. I/O requests received following the receiving of the requested operation are quiesced when one address subject to the I/O request is included in the subset of addresses. If there are in-progress I/O requests pending against the subset of addresses when the requested operation was received, then the requested operation is indicated as executable. A quiesced I/O request is executed when no address subject to the quiesced I/O request is included in the subset of addresses indicated in the quiesce information.

Abstract: A method of performing an input/output (I/O) processing operation includes: generating at least one address control word (ACW) specifying one or more host memory locations for transfer of data between a host computer system and a control unit, and storing the at least one ACW in the local channel memory; generating an address control structure for each data transfer specified by the I/O operation and forwarding each address control structure from the at least one channel to the network interface; forwarding an I/O command message to the at least one I/O device via a network interface; receiving a data transfer request from the network interface that includes the address control structure; and routing the data to at least one host memory location specified by the corresponding ACW or routing the data from a host memory location specified by the ACW to the network interface.

Abstract: Methods and systems are directed to a hybrid multi-thread/multi-process model to service a large number of network requests in network storage applications and systems. The process utilizes defined parameters of target session number, maximum session number, and maximum process number to determine an optimum load balance for read/write operations of a disk access session on a single storage node. This helps to achieve higher performance when using the single node to read or write a large number of separate and parallel data streams, and represents a marked improvement over current methods that multiplex the multiple data streams or use multiple I/O processes to write each data stream.

Abstract: A method of performing an input/output (I/O) processing operation includes obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory, generating addressing information and forwarding the addressing information to a network interface between the channel subsystem and at least one I/O device, the addressing information specifying a location in the local channel memory. The method also includes forwarding an I/O command message to the at least one I/O device via the network interface, receiving a data transfer request from the network interface that includes the addressing information, accessing one of a plurality of address control words (ACWs), each ACW specifying an address of a location in a host computer memory, and routing the data transfer request to the host memory location specified in the ACW.

Abstract: A distributed storage system includes an orchestration layer that provides policy driven orchestration for controlling access and/or load balancing in connection with servicing I/O requests from one or hosts at one or more compute sites in a cloud configuration. The I/O requests may be received over a communication link, and the orchestration layer maintain policies and/or other information that control the selection of an compute site for processing of the I/O according to one or more policies and based on tiering designations of the compute sites. For example, according to various embodiments, policy information of the orchestration layer may control the passing of I/O requests to the one or more compute sites with respect to such factors as requirements of particular service legal agreements, specific tolerances for handling the I/O requests and/or times and rates for processing I/O requests at particular compute sites.

Abstract: Systems, methods, and computer-readable and executable instructions are provided for selecting executing requests to preempt. Selecting executing requests to preempt can include determining whether an application is in an overload condition. Selecting executing requests can also include in response to determining the application is in an overload condition, identifying each request that is being executed by the application. Selecting executing requests can also include determining a value for each request that is executing. Furthermore, selecting executing requests can also include selecting executing requests to preempt based on the values for the requests.

Abstract: A computer program product for performing input/output (I/O) processing is configured for performing a method including: obtaining information relating to an I/O operation at a channel subsystem; generating and storing in local channel memory at least one address control word (ACW) specifying one or more host memory locations for data transfer and including a field for storing header information; generating an address control structure specifying a location in the local channel memory of a corresponding ACW; receiving a data transfer request from a network interface that includes the address control structure; responsive to an input data request, routing the data to at least one host memory location specified by the corresponding ACW and storing header information in the corresponding ACW; and responsive to an output data request, routing the data from a host memory location specified by the ACW to the network interface and appending header information to the data.

Abstract: An electronic circuit (200) for use with an accessing circuit (110) that supplies a given address and a partial write data portion and also has dummy cycles. The electronic circuit (200) includes a memory circuit (230) accessible at addresses, an address buffer (410), a data buffer (440) coupled to the memory circuit (230), and a control circuit (246) operable in the dummy cycles to read data from the memory circuit (230) to the data buffer (440) from a next address location in the memory circuit (230) and to store that next address in the address buffer (410).

Abstract: A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the network using a plurality of transport service instances. Message processing circuitry, coupled between the network interface and the client interface, includes an execution unit, which generates the messages in response to the work requests and passes the messages to the network interface to be sent over the network. A memory stores records of the messages that have been generated by the execution unit in respective lists according to the transport service instances with which the messages are associated. A completion unit receives the records from the memory and, responsive thereto, reports to the client device upon completion of the messages.

Abstract: A system may include a buffer monitor configured to monitor buffer content of a buffer being used during processing of a query workflow in which write tasks of the query workflow write data to the buffer and read tasks of the query workflow read data from the buffer, the buffer having a buffer capacity. The system may include a threshold manager configured to compare the buffer content to a low threshold and to a high threshold that are defined relative to the buffer capacity, and a speed controller configured to control a number of the write tasks relative to a number of the read tasks that are currently executing the query workflow, to thereby maintain the buffer content between the low threshold and the high threshold.

Abstract: A method, computer program product, and computing system for combining a plurality of discrete IO write requests to form a combined IO write request, wherein the plurality of IO write requests define data to be written to a storage network. The combined IO write request is provided to a pseudo multi-write device included within the storage network.

Abstract: A method of providing one or more computing devices with access to a plurality of resources. The plurality of resources are provided by at least one physical device. The method comprises, at a first control element receiving a data packet transmitted by one of said one or more computing devices, and determining whether said data packet comprises a command including a first logical identifier identifying one of said resources. If it is determined that said data packet comprises a command including a first logical identifier a second logical identifier is obtained, the second logical identifier being associated with said first logical identifier and identifying said one of said resources. A request including said second logical identifier is transmitted to a second control element, the second control element being arranged to identify a physical device associated with said second logical identifier and to forward said request to the identified physical device.

Abstract: Methods and apparatus relating to an inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipeline are described. In one embodiment, logic may arbitrate between two queues based on various rules. The queues may store data including local or remote requests, data responses, non-data responses, external interrupts, etc. Other embodiments are also disclosed.

Abstract: A nonvolatile storage device buffers multiple write commands and selects one or more therefrom according to a choosing policy to execute in priority, so as to increase the probability of continuously executing write commands corresponding to an identical smallest erasable unit, thereby reducing the frequency of backup, erasing and copyback operations and improving the efficiency of the nonvolatile storage device.

Abstract: One embodiment provides a system that processes an input/output (I/O) operation associated with a portable storage device. During operation, the system loads a virtual computing environment stored on the portable storage device into a host computer system coupled to the portable storage device. Next, the system intercepts the I/O operation from the virtual computing environment to the portable storage device. Finally, the system decouples the I/O operation from the virtual computing environment by processing the I/O operation independently of a representation of the I/O operation in the virtual computing environment.

Abstract: A novel and efficient method is described that creates a monolithic high capacity Packet Engine (PE) by connecting N lower capacity Packet Engines (PEs) via a novel Chip-to-Chip (C2C) interface. The C2C interface is used to perform functions, such as memory bit slicing and to communicate shared information, and enqueue/dequeue operations between individual PEs.

Abstract: An apparatus and method of low latency precedence ordering check in a PCI Express (PCIe) multiple root I/O virtualization (MR-IOV) environment. The precedence ordering check mechanism aids in enabling a port to comply with PCIe MR-IOV ordering rules. A posted information array mirrors a posted transaction queue, storing precedence order indicator and Virtual Hierarchy (VH) tag information for corresponding posted transaction entries stored in the posted transaction queue. The selector queries the posted information array periodically, such as each cycle, to determine whether the non-posted/completion transaction at the output of their respective queues have any preceding posted transactions of the same VH somewhere in the posted queue.

Abstract: A data storage device accepts queued read and write commands that have deadlines. The queued read and write commands are requests to access the data storage device. The deadlines of the queued read and write commands can be advisory deadlines or mandatory deadlines.

Abstract: A method and apparatus for resource management in a multicore processor is disclosed. A system management controller (130) provides omnipresent scheduling, synchronization, load balancing, and power and memory management services to each processing resource (150) within in a multicore processor (10), via a plurality of system management clients (120) implemented in hardware or software. The controller (130) allocates the tasks executing in each processing resource (150) by means of interrupt control signals, which interact directly with the system management clients (120), enabling processing resources (150) to autonomously create, execute and distribute tasks around a parallel system architecture whilst monitoring and policing the use of shared system resources (140).

Abstract: A RAID system is provided in which the RAID controller of the system causes a predetermined number, N, of IO commands to be queued in a memory element, where N is a positive integer. After the N IO commands have been queued, the RAID controller writes N locks associated with the N IO commands in parallel to a service memory device. The RAID controller then writes N stripes of data and parity bits associated with the N IO commands to the PDs of the system to perform striping and parity distribution. If a catastrophic event, such as a power failure, occurs, the RAID controller reads the locks from the service memory device and causes parity to be reconstructed for the stripes associated with the locks. These features improve write performance while preventing the occurrence of data corruption caused by write holes.

Abstract: An invention is provided for distributing storage I/O loads across multiple storage devices with different performance characteristics. The method includes examining a current I/O request to determine characteristics of the current I/O request. The characteristics of the current I/O request are then compared to characteristics of other pending I/O request. Then, a storage device is selected from a plurality of storage devices based on the characteristics of the current I/O request and the characteristics of other pending I/O request. Here, the plurality of storage devices includes at least one storage device having higher performance characteristics than another storage device of the plurality of storage devices. Once selected, the selected storage device is utilized with the current I/O request.

Abstract: Techniques are provided for managing, within a storage system, the sequence in which I/O requests are processed by the storage system based, at least in part, on one or more logical characteristics of the I/O requests. The logical characteristics may include, for example, the identity of the user for whom the I/O request was submitted, the service that submitted the I/O request, the database targeted by the I/O request, an indication of a consumer group to which the I/O request maps, the reason why the I/O request was issued, a priority category of the I/O request, etc. Techniques are also provided for automatically establishing a scheduling policy within a storage system, and for dynamically changing the scheduling policy in response to changes in workload.

Abstract: Processing input/output requests may include: processing one or more input/output (IO) requests in a first IO queue associated with a first device group; detecting a queuing of one or more IO requests in a second IO queue associated with a second device group; pausing the processing one or more input/output (IO) requests in a first IO queue associated with a first device group upon a detection of a queuing of one or more IO requests in a second IO queue associated with a second device group; processing the one or more IO requests in a second IO queue associated with a second device group; and resuming the processing one or more input/output (IO) requests in a first IO queue associated with a first device group upon a completion of the processing the one or more IO requests in a second IO queue associated with a second device group.

Abstract: A source identification facility is provided that enables identification of the one or more types of adapters requesting an interrupt in order to facilitate processing of the interrupt. The adapter types are accessible to the operating system and are used to tailor processing by the operating system of the interrupt.

Abstract: Input/output (I/O) interrupts are avoided at the completion of I/O operations. A task requests (implicitly or explicitly) an I/O operation, and processing of the task is suspended awaiting completion of the I/O operation. At the completion of the I/O operation, instead of an I/O interrupt, an indicator associated with the task is set. Then, when the task once again becomes the current task to be executed, the indicator is checked. If the indicator indicates the I/O operation is complete, execution of the task is resumed.

Abstract: A printing device includes a control device configured to receive a cancellation request instruction, receive a confirmation instruction for confirming each printing job to be cancelled or not, set the printing job in the queue to be in a stop condition if receiving the cancellation request instruction, and delete from the queue the printing job if receiving the confirmation instruction for the printing job. The control device further determines whether the job receiving device receives another new printing job during an instruction waiting period from a time when receiving confirmation instruction, and controls the printing device to print the other new printing job prior to printing of the printing job registered in the queue, if the job receiving device receives the other new printing job.

Abstract: A communication apparatus which prevents one host computer from occupying the apparatus and enables a user of the host computer having sent a processing request thereto to quickly know a processing result. A connection request is accepted from one of a plurality of host computers. In response to the accepted connection request, the host computer having sent the connection request is connected, and a process requested by the connected host computer is executed. Information indicative of the connected host computer is stored. Control is performed such that a reconnection request from the host computer indicated by the stored information is accepted with priority over connection requests from other host computers.

Abstract: Input and output (I/O) operations performed by a data storage device are managed dynamically to balance aspects such as throughput and latency. Sequential read and write requests are sent to a data storage device whereby the corresponding operations are performed without time delay due to extra disk revolutions. In order to minimize latency, particularly for read operations, random read and write requests are held in a queue upstream of an I/O controller of the data storage device until the buffer of the data storage device is empty. The queued requests can be reordered when a higher priority request is received, improving the overall latency for specific requests. An I/O scheduler of a data server is still able to use any appropriate algorithm to order I/O requests, such as by prioritizing reads over writes as long as the writes do not back up in the I/O queue beyond a certain threshold.

Abstract: A method for accelerating signal transmission in a USB network protocol architecture having a USB server, a processing device and a peripheral device connected to the USB server. The method includes: intercepting request signals sent from the processing device according to the USB network protocol; sending, by the USB server, virtual request signals to the peripheral device so as to cause the peripheral device to generate control signals corresponding to the virtual request signals; receiving, by the USB server, the control signals from the peripheral device, and transmitting, by the USB server, the control signals to the processing device; and matching, by the processing device, the control signals and the intercepted request signals so as to perform operations corresponding to the control signals. Therefore, the present invention eliminates the need to wait for the arrival of request signals before making responses, thereby accelerating the speed of signal transmission.

Abstract: Various embodiments include fault tolerant memory apparatus, methods, and systems, including a memory manager for supplying read and write requests to a memory device having a plurality of addressable memory locations. The memory manager includes a plurality of banks. Each bank includes a bank queue for storing read and write requests. The memory manager also includes a request arbiter connected to the plurality of banks. The request arbiter removes read and write requests from the bank queues for presentation to the memory device. The request arbiter includes a read phase of operation and a write phase of operation, wherein the request arbiter preferentially selects read requests for servicing during the read phase of operation and preferentially selects write requests for servicing during the write phase of operation.

Abstract: Described embodiments provide a host subsystem that generates a host context corresponding to a received host data transfer request. A programmable sequencer generates one or more sequencer contexts based on the host context. Each of the sequencer contexts corresponds to at least part of the host data transfer request. The sequencer contexts are provided to a buffer subsystem of the media controller. For host read requests, the buffer subsystem retrieves the data associated with the sequencer contexts of the read request from a corresponding buffer or a storage media and transmits the data associated with the sequencer contexts to the host device. For host write requests, the buffer subsystem receives the data associated with the host context from the host device and stores the data associated with the sequencer contexts of the write request to a corresponding buffer or the storage media.

Abstract: In one aspect, a method of compressing data includes splitting an I/O into smaller I/Os based on a throughput of I/Os in a queue, a smaller I/O is equal or smaller than a block size. The method also includes storing the smaller I/Os in the queue. The method further includes asynchronously compressing the smaller I/Os.

Abstract: An improved technique for handling events in a multipathing driver employs an event queue and a queue manager that run in the kernel of a computing system. The queue manager receives events raised by the multipathing driver, as well as events raised by software constructs, such as application programs. Records of events are added to the event queue in the order the queue manager receives them. Event records may be consumed chronologically by external software. Preferably, the event queue is sufficiently large to store all events arising out of most predicted fault scenarios. Also, the queue manager is sophisticated and can perform certain diagnostic and analysis tasks without the aid of external software.

Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.

Abstract: In a signal processor including storage sections, a start address for starting output of data from an external memory, is input from an external controller to the start address input section. The signal output section outputs a start signal based on a download start instruction from the external controller, and outputs an end signal when download is completed. The output instruction section outputs, based on the start signal, to the external memory a data output instruction of download data for a designated storage section, starting from the start address, and stops output of the data output instruction based on the end signal. The write instruction section outputs a write instruction to the storage sections that allows data writing only to the designated storage section, and the download data is written to the designated storage section when the start signal is input to the output instruction section.

Abstract: This document describes techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) for peripheral authentication. These techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) may configure data lines for authentication between host device (102) and peripheral (106), use these configured data lines to authenticate the peripheral (106), and then reconfigure the data lines for use. These techniques (300, 600) may also or instead transmit time stamps to a remote entity (402) for tracking peripheral use and/or present home screens (122) responsive to connection to a peripheral (106).

Abstract: A system and method for coordinating control setting with respect to an automated input/output (I/O) processor. A state machine having a transition algorithm can be configured in association with a storage controller in order to permit multiple entities to safely transmit an I/O request to an I/O device. Specific combinations of control bits associated with a fast path engine can be determined by identifying different modes with respect to the behavior of the fast path engine. Each mode can be assigned as a state with respect to the state machine. An I/O path exception and error condition that can cause transitions between the states can be determined and the transitions can be assigned from one state to another state. A generic logic template can then be configured to govern the transitions with respect to the state machine. The logic can be executed when an event occurs in order to trigger multiple state transition and/or modifications with respect to the hardware control bits of the fast path engine.

Abstract: In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.

Abstract: According to some embodiments, it may be determined, at a first processing element of a device with a plurality of processing elements, that first data is to be transmitted in association with a first network connection. A first entry associated with the first data may then be stored into a first of a plurality of transmit queues. It may subsequently be determined, at a second processing element of the device, that second data is to be transmitted in association with the first network connection. A second entry associated with the second data may then be stored into a second of the plurality of transmit queues.

Abstract: A method and apparatus of operating a Universal Serial Bus device to determine if a host sending Network Control Model Transfer Blocks (NTBs) is compliant with end of transfer rules for NTBs and to then determine appropriate operations at the device to complete transactions with a non-compliant host.

Abstract: In one embodiment, a computer-implemented method for creating redundant system configurations is presented. The computer-implemented method creates a set of virtual function path authorization tables, and receives a request from a requester to provide requested data from a virtual function wherein the virtual function is performed by a single root or a multi-root peripheral component interconnect device. Further a receive buffer is created in a selected address range in a set of addresses ranges as well as a virtual function work queue entry for the virtual function containing an address of the receive buffer in the selected address range. Responsive to a determination that the virtual function is authorized, writing the requested data into the receive buffer of the selected address range in the one or more systems, and responsive to writing the requested data, issuing a notice of completion to the requester.

Abstract: The host interface module is configured to receive a plurality of I/O request which includes an associated priority; create an I/O request queue for each associated priority; define a threshold value for the queue length for each of the plurality of I/O request queues; and determine if the queue length for one of the plurality of the I/O request queue corresponding to the associated priority is less than the defined threshold value for the queue length for the one of the plurality of the I/O request queues. If the queue length of the one of the plurality of I/O request queues is more than the defined threshold value for the queue then the host interface module is further configured to rejecting the I/O request and sending a queue full message; wherein the threshold value for the queue length is based on the processing rate of the I/O requests in the plurality of the I/O request queues.

Abstract: In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.

Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.