Input/output Addressing Patents (Class 710/3)
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Patent number: 10567166Abstract: Technologies for dividing resources across partitions include a compute sled. The compute sled is to determine partitions among sockets of the compute sled. Each socket is associated with a corresponding processor. The compute sled is also to establish a separate memory space for each determined partition, obtain, from an application executed in one of the sockets, a request to access a logical memory address, identify the partition associated with the memory access request, determine a corresponding physical memory address as a function of the identified partition and the logical memory address, and access a memory of the compute sled at the determined physical memory address. Other embodiments are also described and claimed.Type: GrantFiled: December 28, 2017Date of Patent: February 18, 2020Assignee: Intel CorporationInventors: Murugasamy K. Nachimuthu, Mohan J. Kumar
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Patent number: 10565407Abstract: A method includes storing user information on a first identification tag of a first smart object of a first type to configure the first smart object to communicate with a device. An interrogator of the device is enabled to read a second identification tag attached to a second smart object of the first type. The user information is stored on the second identification tag responsive to determining that the second identification tag comprises default communication information to configure the second smart object to communicate with the device A connection is established between the device and the second smart object based on the user information.Type: GrantFiled: June 26, 2019Date of Patent: February 18, 2020Assignee: Motorola Mobility LLCInventors: Sudhir Vissa, Vivek Tyagi
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Patent number: 10541928Abstract: Certain embodiments described herein are generally directed to enforcing application-specific quality of service (QoS) requirements over a storage network. The method for enforcing application-specific quality of service (QoS) requirements over a storage network includes receiving an input-output (I/O) command from a virtual machine executing an application, wherein the I/O command corresponds to an I/O request generated by the application and is tagged with a QoS classification corresponding to QoS requirements of the application, determining a QoS value corresponding to the QoS classification of the I/O command, and transmitting a data frame including the I/O command and the QoS value to a target network adapter through a switch fabric in a network, the switch fabric having a plurality of switches each configured to forward the data frame based on the QoS value.Type: GrantFiled: March 5, 2018Date of Patent: January 21, 2020Assignee: VMware, Inc.Inventors: Chiao-Chuan Shih, Samdeep Nayak, Atanu Panda, Joy Ghosh
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Patent number: 10540315Abstract: A computing system is provided. The computing system includes a host device and a plurality of interface devices. The plurality of interface devices is configured to communicate with the host device through a host bus. Each of the plurality of interface devices is configured to perform an interfacing operation between the host device and a memory device. The interfacing operation includes a serial interfacing operation and a parallel interfacing operation.Type: GrantFiled: January 12, 2018Date of Patent: January 21, 2020Assignee: SK hynix Inc.Inventor: Hyung Seob Bae
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Patent number: 10521374Abstract: Data on a memory space are compared without using a CPU, and an interrupt is generated in an interrupt condition based on at least one of the number of times of the comparison and the number of times of coincidence with a comparison condition. An interrupt controller outputs an interrupt signal to a first CPU core or a second CPU core. A DMAC transfers data on the memory space to at least one of a first buffer and a second buffer. A comparison circuit compares the data of the first buffer with the data of the second buffer. A condition coincidence frequency counter counts the number of times at which the comparison in the comparison circuit coincides with a comparison condition. An interrupt request circuit outputs an interrupt request to the interrupt controller, based on at least one of a value of the condition coincidence frequency counter and a value of a comparison frequency counter.Type: GrantFiled: August 3, 2018Date of Patent: December 31, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hiromichi Yamada, Akihiro Yamate, Yoichi Yuyama
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Patent number: 10509880Abstract: Configuration information is generated for a configurable mixed-signal system. Analog requirements for operating the configurable mixed-signal system are gathered. A simulation model of a delta-sigma modulator is received. A simulation based on the simulation model of the delta-sigma modulator is performed to obtain parameter settings for the delta-sigma modulator. The obtained parameter settings are used to build at least a portion of a description of the configurable mixed-signal system. The description of the configurable mixed signal system is synchronized to receive configuration information.Type: GrantFiled: August 16, 2013Date of Patent: December 17, 2019Assignee: Missing Link Electronics, Inc.Inventors: Nils Endric Schubert, Johannes Brock, Christian Grumbein
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Patent number: 10482362Abstract: Methods pertaining to encoding and decoding binary identifiers within a cell array are described. A binary identifier received by computing device can be encoded according to an encoding scheme. The cell array can include multiple encoded cells, each of which indicates a predetermined sequence of two or more bits, and which includes a perimeter, and both an alignment mark and a line pattern within the perimeter. The line pattern can be one of an empty-cell line pattern, a pattern including one or more asymmetrical radial vectors, one or more diametrical vectors, a symmetric cross, or a symmetrical star, or some other line pattern. The encoding scheme can define a plurality of cell colors that correspond to a predetermined sequence of two or more bits. The bits corresponding to a cell color can be redundant to bits corresponding to a line pattern for confirming accuracy of decoding a cell.Type: GrantFiled: December 5, 2018Date of Patent: November 19, 2019Assignee: Gelliner LimitedInventor: John Adam Ulyate
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Patent number: 10474250Abstract: An input device includes a detection unit, a first acquisition unit, a second acquisition unit, and a compensation unit. The detection unit is configured to detect an operation by a user for controlling an electronic device and output an operation signal corresponding to the operation. The first acquisition unit is configured to acquire the detected operation signal and a differential value of the operation signal. The second acquisition unit is configured to acquire a function defined by the differential value to compensate for a delay in response of the operation signal with respect to the operation by the user. The compensation unit is configured to compensate the operation signal with the acquired function.Type: GrantFiled: May 21, 2018Date of Patent: November 12, 2019Assignee: Sony CorporationInventor: Kazuyuki Yamamoto
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Patent number: 10460223Abstract: Methods pertaining to encoding and decoding binary identifiers within a cell array are described. A binary identifier received by computing device can be encoded according to an encoding scheme. The cell array can include multiple encoded cells, each of which indicates a predetermined sequence of two or more bits, and which includes a perimeter, and both an alignment mark and a line pattern within the perimeter. The line pattern can be one of an empty-cell line pattern, a pattern including one or more asymmetrical radial vectors, one or more diametrical vectors, a symmetric cross, or a symmetrical star, or some other line pattern. The encoding scheme can define a plurality of cell colors that correspond to a predetermined sequence of two or more bits. The bits corresponding to a cell color can be redundant to bits corresponding to a line pattern for confirming accuracy of decoding a cell.Type: GrantFiled: December 5, 2018Date of Patent: October 29, 2019Assignee: Gelliner LimitedInventor: John Adam Ulyate
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Patent number: 10445185Abstract: A method to create a version map to represent the data state of a file at a particular point in time when an incremental backup is performed. In one embodiment, a logical memory backup file is created that is known as a cumulative data file. Changes to the cumulative data file according to one embodiment of the present invention include appending copies of modified data when the modified data meets a certain condition. A new version map may be created each time an incremental backup occurs. Locations of both modified and unmodified data in the backup data file are mapped for future reference to the data.Type: GrantFiled: April 10, 2015Date of Patent: October 15, 2019Assignee: Veritas Technologies LLCInventor: Srineet Sridharan
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Patent number: 10418053Abstract: A storage device includes a disk, a head configured to write data to and read data from the disk, and a controller. The controller is configured to, for each of a plurality of unexecuted commands, carry out a calculation of an amount of time that is required for the head to start accessing the disk to begin execution of the non-executed command upon completion of a currently-executed command, until the earlier of i) a number of unexecuted commands for which the calculation has been carried out reaches a threshold value or ii) the completion of the currently-executed command, select a next command to be executed from one or more unexecuted commands for which the calculation has been carried out, based on the calculated amount of time for each of the one or more unexecuted commands, and execute the selected next command.Type: GrantFiled: March 7, 2018Date of Patent: September 17, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Richard M. Ehrlich
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Patent number: 10404809Abstract: In an example implementation of the disclosed technology, a method includes assigning a computing device to a region associated with a region server that comprises a plurality of region server instances. The method also includes generating device-to-region mapping and transmitting a replica of the device-to-region mapping to a messaging server instance and connection server instance. Further, the method includes receiving local device connection information comprising connection information relating the computing device and the connection server instance. The method also includes outputting the local device connection information to the plurality of region server instances. Additionally, the method includes receiving a message for delivery to the computing device and, responsive to accessing the local device connection information, transmitting the message to the connection server instance identified by the local device connection information.Type: GrantFiled: January 20, 2015Date of Patent: September 3, 2019Assignee: Google LLCInventors: Doru Costin Manolache, Subir Jhanb, Tal Dayan, Francesco Nerieri
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Patent number: 10387308Abstract: The present disclosure provides a method and apparatus for online reducing cache devices from a cache. The cache includes a first cache device and a second cache device, the method comprising: keeping the cache and the second cache device in an enabled state; labeling the first cache device as a to-be-reduced device so as to block a new data page from being promoted to the first cache device; removing a cached data page from the first cache device; removing the cached input output (IO) historical information from the first cache device; and removing the first cache device from the cache. There is also provided a corresponding apparatus.Type: GrantFiled: September 19, 2016Date of Patent: August 20, 2019Assignee: EMC IP Holding Company LLCInventors: Xinlei Xu, Liam Xiongcheng Li, Jian Gao, Lifeng Yang, Ruiyong Jia
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Patent number: 10387693Abstract: A method includes storing a user address associated with a particular user of a device in a first transceiver identification field stored on a first identification tag of a first smart object of a first type. An interrogator of the device is enabled to read a second identification tag attached to a second smart object of the first type. A second transceiver identification field is stored on the second identification tag. The user address is stored in the second transceiver identification field using the interrogator responsive to determining that the second radio identification field has a default value. A connection is established between the device and the second smart object using a first transceiver of the device based on the user address.Type: GrantFiled: July 13, 2018Date of Patent: August 20, 2019Assignee: Motorola Mobility LLCInventors: Sudhir Vissa, Vivek Tyagi
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Patent number: 10369412Abstract: Systems and methods for prompting a user to perform an exercise and monitoring the exercise are provided. Multiple independent sensors or sensor systems may be used to calculate energy expenditure. Various criteria may be used to manually or automatically select the independent sensor or sensor system or combination that will be used with the energy expenditure calculations.Type: GrantFiled: December 14, 2016Date of Patent: August 6, 2019Assignee: NIKE, Inc.Inventors: Tesa Aragones, Adriana Guerrero, Steve Holmes, Christina S. Self, Aaron B. Weast, Paul Winsper, Jay C. Blahnik
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Patent number: 10359940Abstract: Provided are a method, system, computer readable storage medium, and switch for configuring a switch to assign partitions in storage devices to compute nodes. A management controller configures the switch to dynamically allocate partitions of at least one of the storage devices to the compute nodes based on a workload at the compute node.Type: GrantFiled: November 7, 2017Date of Patent: July 23, 2019Assignee: Intel CorporationInventors: Mark A. Schmisseur, Mohan J. Kumar, Balint Fleischer, Debendra Das Sharma, Raj Ramanujan
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Patent number: 10346344Abstract: The present invention discloses a method, a client device, and a data forwarding device for transmitting data through a serial port. The method comprises providing at least two virtual logical serial ports mapped to a physical serial port, providing a main serial port connected to the physical serial port and extended serial ports which correspond to the logical serial ports one by one; encapsulating first data and a specified logical serial port according to a preset serial port protocol to obtain a first data frame; transmitting the first data frame to the data forwarding device through the physical serial port; receiving the first data frame through the main serial port, and decapsulating the first data frame according to the serial port protocol to obtain the first data and the specified logical serial port; and transmitting the first data to the extended serial port corresponding to the specified logical serial port.Type: GrantFiled: August 11, 2017Date of Patent: July 9, 2019Assignee: Goertek Inc.Inventor: Guoliang Shi
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Patent number: 10267868Abstract: A computer-implemented method according to one embodiment includes receiving, at a mobile device, a magnetic field produced by an audio device, determining, by the mobile device, a location of the audio device relative to the mobile device, utilizing the magnetic field, and performing, by the mobile device, one or more operations, utilizing the location of the audio device relative to the mobile device.Type: GrantFiled: February 2, 2018Date of Patent: April 23, 2019Assignee: International Business Machines CorporationInventors: Joseph A. Latone, Brandon Z. Frank
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Patent number: 10199108Abstract: The invention introduces a method for read retries, performed by a processing unit, including at least the following steps: in boot time, generating and storing microcodes of a retry-read operation in an instruction buffer; and after a successful boot, receiving a retry-read command from a host device through a first access interface; and starting a state machine to execute the microcodes of the retry-read operation of the instruction buffer.Type: GrantFiled: October 6, 2016Date of Patent: February 5, 2019Assignee: SHANNON SYSTEMS LTD.Inventor: Zhen Zhou
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Patent number: 10198188Abstract: Aspects of the present disclosure generally relate to storage devices and methods of operating the same. In one aspect, a storage device includes a disk, and a head configured to write data to and read data from the disk. The storage device also includes a controller configured to receive a read command in a host command queue, store the read command in a disk queue, and determine whether the host command queue is full of pending read commands, including the received read command. If the host command queue is full of pending read commands, the controller forces execution of one of the pending read commands.Type: GrantFiled: March 9, 2017Date of Patent: February 5, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Takeyori Hara, Richard M. Ehrlich, Siri S. Weerasooriya
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Patent number: 10169274Abstract: Systems and methods are disclosed resetting a slave identification (SID) of an integrated circuit (IC). An exemplary method comprises determining that a plurality of ICs in communication with a shared bus have the same SID, the shared bus operating in a master/slave configuration. A common memory address of the ICs is identified, where data stored in the common memory address is different for a first IC and a second IC. Each of the ICs receives over the shared bus a new SID value and match data. The ICs compare the match data with the data stored in the common memory address. If the match data is the same as the data in the common memory address, the SID is changed the received new SID value.Type: GrantFiled: June 8, 2017Date of Patent: January 1, 2019Assignee: QUALCOMM IncorporatedInventors: Christopher Kong Yee Chun, Chris Rosolowski
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Patent number: 10157301Abstract: Methods pertaining to encoding and decoding binary identifiers within a cell array are described. A binary identifier received by computing device can be encoded according to an encoding scheme. The cell array can include multiple encoded cells, each of which indicates a predetermined sequence of two or more bits, and which includes a perimeter, and both an alignment mark and a line pattern within the perimeter. The line pattern can be one of an empty-cell line pattern, a pattern including one or more asymmetrical radial vectors, one or more diametrical vectors, a symmetric cross, or a symmetrical star, or some other line pattern. The encoding scheme can define a plurality of cell colors that correspond to a predetermined sequence of two or more bits. The bits corresponding to a cell color can be redundant to bits corresponding to a line pattern for confirming accuracy of decoding a cell.Type: GrantFiled: April 27, 2015Date of Patent: December 18, 2018Assignee: Gelliner LimitedInventor: John Adam Ulyate
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Patent number: 10114589Abstract: Apparatuses, systems, and methods are disclosed for controlling commands for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a command/address buffer, an on-die controller, and a plurality of non-volatile memory cores that share a data path. A core includes an array of non-volatile memory cells. A command/address buffer queues command and address information for a plurality of storage operations for one or more non-volatile memory cores. An on-die controller initiates a first unexecuted read operation and a first unexecuted write operation from a command/address buffer in parallel, in response to determining that core dependencies are satisfied for a read operation and a write operation.Type: GrantFiled: January 17, 2017Date of Patent: October 30, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Jingwen Ouyang, Greg Hilton, Jayesh Pakhale
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Patent number: 10055248Abstract: Systems and methods for scheduling virtual processors via memory monitoring are disclosed. In one implementation, a hypervisor running on a host computer system may detect a task switch event associated with a virtual processor running on a physical processor of the host computer system. The hypervisor may test a polling flag residing in a memory accessible by the guest software running on the virtual processor and set the polling flag to a non-polling state. The hypervisor may then process the task switch event.Type: GrantFiled: February 22, 2017Date of Patent: August 21, 2018Assignee: Red Hat, Inc.Inventor: Michael Tsirkin
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Patent number: 10045387Abstract: Disclosed are a method for constructing a docking protocol for using a docking service in a direct communication system, and an apparatus therefor. To this end, a method by which a first wireless device constructs a docking protocol with a second wireless device comprises: a step for searching for a probe; a step for searching for a service; a step for enabling the first wireless device to construct an application service platform (ASP) session with the second wireless device; and a step for enabling the first wireless device to construct a docking protocol with the second wireless device. At this point, the step for constructing the ASP session can be selectively performed according to the capability or the device type of the first wireless device or the second wireless device.Type: GrantFiled: January 20, 2015Date of Patent: August 7, 2018Assignee: LG ELECTRONICS INC.Inventors: Dongcheol Kim, Jaeho Lee, Byungjoo Lee
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Patent number: 9990056Abstract: An input device includes a detection unit, a first acquisition unit, a second acquisition unit, and a compensation unit. The detection unit is configured to detect an operation by a user for controlling an electronic device and output an operation signal corresponding to the operation. The first acquisition unit is configured to acquire the detected operation signal and a differential value of the operation signal. The second acquisition unit is configured to acquire a function defined by the differential value to compensate for a delay in response of the operation signal with respect to the operation by the user. The compensation unit is configured to compensate the operation signal with the acquired function.Type: GrantFiled: October 8, 2015Date of Patent: June 5, 2018Assignee: Sony CorporationInventor: Kazuyuki Yamamoto
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Patent number: 9959237Abstract: A system-on-chip including non-hopping bus interfaces and a hopping bus. The non-hopping bus interfaces include a first non-hopping bus interface and a second non-hopping bus interface. The first non-hopping bus interface is configured to, based on a first protocol, receive information. The hopping bus includes intra-chip adaptors. The intra-chip adaptors are connected in series and respectively to the non-hopping bus interfaces. The intra-chip adaptors are configured to (i) according to a second protocol, convert the information into a first format for transmission over the hopping bus, and (ii) transfer the information in the first format over the hopping bus and between the intra-chip adaptors. The second protocol is different than the first protocol. The second non-hopping bus interface is configured to receive the information from the hopping bus based on the transmission of the information over the hopping bus.Type: GrantFiled: December 9, 2014Date of Patent: May 1, 2018Assignee: Marvell World Trade Ltd.Inventor: Hongming Zheng
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Patent number: 9933976Abstract: A storage apparatus has a plurality of hardware engines which send and receive information to and from a controller, which, on the condition of acquiring a request command from a host, determines identifying information of the request command, executes data I/O processing to the storage device according to the request command when first identifying information has been added to the request command and when second identifying information has been added to the acquired request command, transfers the request command to the hardware engine, acquires the data requested by the hardware engine from the storage device and transfers the acquired data to the hardware engine. The hardware engine acquires and analyzes an add-on command from the host and according to the request command, requests the controller to transfer the data based on the analysis result, and thereafter executes processing to the data transferred by the controller according to the add-on command.Type: GrantFiled: April 28, 2014Date of Patent: April 3, 2018Assignee: Hitachi, Ltd.Inventors: Yoshitaka Tsujimoto, Satoru Watanabe, Yoshiki Kurokawa, Mitsuhiro Okada, Akifumi Suzuki
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Patent number: 9921763Abstract: Providing for a memory apparatus comprising multiple banks of non-volatile memory and a high-speed data bus is described herein. By way of example, the memory apparatus can employ a standard or near-standard DRAM bus as an interface to high-performance two-terminal memory arrays. Interleaved operation can facilitate throughputs over 2gigabytes/second, in various embodiments, and larger throughputs in at least some embodiments, by interleaving multiple memory banks that are separately addressed via one or more mode registers, referred to as an index register(s). Further, the memory apparatus can have one or two terabytes of total storage, with capacity to increase storage volume. According to various embodiments, the memory apparatus can operate with a standard DRAM controller, or a memory controller configured with a DRAM communication protocol, modified in software or firmware to match configurations of the non-volatile memory employed for the multiple banks of memory.Type: GrantFiled: June 25, 2015Date of Patent: March 20, 2018Assignee: CROSSBAR, INC.Inventor: Cliff Zitlaw
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Patent number: 9892024Abstract: A device may be run in a timing testing mode in which the device is configured to disrupt timing of processing that takes place on the one or more processors while running an application with the one or more processors. The application may be tested for errors while the device is running in the timing testing mode.Type: GrantFiled: November 2, 2015Date of Patent: February 13, 2018Assignee: SONY INTERACTIVE ENTERTAINMENT AMERICA LLCInventors: Mark Evan Cerny, David Simpson
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Patent number: 9841902Abstract: Systems and methods presented herein provide for SSD data storage via PCIe controllers configured with NVMe interfaces. In one embodiment, a PCIe controller includes a plurality of buffers, a Dynamic Random Access Memory (DRAM) device, and an I/O processor operable to partition the DRAM device into a plurality of logical blocks. The controller also includes virtual function logic communicatively coupled to the logical blocks of the DRAM device and to the buffers. The virtual function logic is coupled to a host system through the I/O processor to process an I/O request from the host system to a logical block of the DRAM device, to retrieve data from the logical block to at least one of the buffers, and to transfer the data from the buffer to the host system.Type: GrantFiled: November 20, 2014Date of Patent: December 12, 2017Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.Inventors: Anant Baderdinni, Horia Cristian Simionescu
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Patent number: 9841527Abstract: A method of processing electromagnetic signal data includes: disposing a downhole tool in a borehole in an earth formation, the downhole tool including at least one electromagnetic transmitter; performing a downhole electromagnetic operation, the operation including transmitting an electromagnetic pulse from the transmitter into the formation and measuring a time domain transient electromagnetic (TEM) signal over a selected time interval following a transmitter turn-off time; transforming the measured time domain TEM signal into a frequency domain TEM signal measured; and applying an inversion technique to the transformed frequency domain TEM signal to estimate one or more formation parameters.Type: GrantFiled: May 28, 2013Date of Patent: December 12, 2017Assignee: BAKER HUGHES, A GE COMPANY, LLCInventor: Marina N. Nikitenko
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Patent number: 9817730Abstract: The following description is directed to storing properties of requests to potentially block future requests having similar properties. In one example, a request can be received. A property of the request can be stored so that the property persists across an initialization sequence of a computer system. At least the property can be used to determine whether to block any future requests having similar properties.Type: GrantFiled: March 26, 2015Date of Patent: November 14, 2017Assignee: Amazon Technologies, Inc.Inventors: Craig Wesley Howard, Matthew Graham Baldwin, Donavan Miller
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Patent number: 9817647Abstract: Disclosed is a method and apparatus for mobile media with both dedicated readable and writeable user data space and dedicated readable and writeable drive device space. The mobile data storage media adapted for operatively working with a drive device comprises a data space accessible by an end user and a drive software space accessible by the drive device and inaccessible by an end user. The drive software space is adapted to accommodate firmware for use by the drive device in addition to the reading and writing of software by the drive device. The media is adapted to receive and store software from the drive device or, alternatively, is adapted to transmit software to the drive device.Type: GrantFiled: August 5, 2015Date of Patent: November 14, 2017Assignee: Spectra Logic CorporationInventors: Matthew Thomas Starr, Mark Lorin Lantry
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Patent number: 9792245Abstract: Embodiments herein provide for efficient memory mapping in a PCIe device when a host changes memory allocations in the device. One PCIe device comprises a plurality of Base Address Registers (BARs) defined by the host. The device also includes a processor with an address space. The processor maps addresses of the address space to the BARs for routing PCIe packets from the host. The processor can determine that the host is reconfiguring the BARs, and, based on the determination, mark packets existing in the computer memory as old, change the BARs in the computer memory as directed by the host, mark packets received after the BAR change as new, process the old packets from the computer memory based on their addresses of the address space until a new packet is reached, and to remap the BARs to the addresses of the address space after the new packet is reached.Type: GrantFiled: December 9, 2014Date of Patent: October 17, 2017Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.Inventors: Ramprasad Raghavan, Eugene Saghi
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Patent number: 9784097Abstract: A method for transmitting data from a downhole location to a location at the surface of the earth includes determining a minimum value and a maximum value of M-samples of data values, determining a keycode for the M-samples of data values that provides an indication of the maximum and minimum values of the M-samples, and encoding the keycode and the data values into one or more encoded words. The one or more encoded words are then transmitted as an acoustic signal in drilling fluid by modulating a mud-pulser. The acoustic signal is received by a transducer uphole from the mud-pulser and converted into an electrical signal. The electrical signal is demodulated into a received encoded word, which is decompressed into the M-samples in accordance with the keycode. The M-samples are then received by a computer processing system disposed as the surface of the earth.Type: GrantFiled: March 30, 2015Date of Patent: October 10, 2017Assignee: BAKER HUGHES INCORPORATEDInventor: Bryan C. Dugas
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Patent number: 9753879Abstract: A switching apparatus to adapt an interface for multi-functional use includes a signal source, a display unit, a control unit, and a connector. The signal source includes a first power output and a data output. The display unit includes a power input and a data input. The control unit includes a switching chip having a control signal input, a first data pin, a second data pin, and a third data pin. The connector includes a second power input, a second power output, and a data output. The control signal input receives a switching signal. When the second data pin communicates with the first data pin according to the switching signal, the first power output is electrically coupled to the second power input, the signal source provides power for an electronic device connected with the connector.Type: GrantFiled: April 10, 2015Date of Patent: September 5, 2017Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Xi-Huai He, Chun-Sheng Chen
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Patent number: 9742475Abstract: A system and method are provided in which a radio-frequency channel is used in combination with a second validation channel to verify the proximity of two devices to each other. An RF channel is used to detect whether two devices are within a first, larger distance from one another and to enable communication between the two devices, whilst a second, validation channel is used to accurately verify that the two devices are within second, smaller distance from one another. In some embodiments, the second verification channel is a magnetic channel.Type: GrantFiled: June 2, 2016Date of Patent: August 22, 2017Assignee: Sensor Labs LimitedInventors: Edward Pellew, William Neep
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Patent number: 9678678Abstract: According to an aspect of an embodiment, a method of retrieving data in a storage network may include determining a list of storage blocks of a storage network for potential retrieval of a data file for storage on a first storage block of the storage network. The determining may be based on two or more of: assignment information of the data file as assigned by a storage network manager, location information, device types, peer-to-peer reachability, network information, and presence information. The method may also include attempting to retrieve the data file from a second storage block included in the list of storage blocks for storage on the first storage block. Further, the method may include attempting to retrieve the data file from a third storage block included in the list of storage blocks for storage on the first storage block when retrieval from the second storage block fails.Type: GrantFiled: May 9, 2014Date of Patent: June 13, 2017Assignee: LYVE MINDS, INC.Inventors: Randeep Singh Gakhal, Tapani Otala, Stanley Ho
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Patent number: 9665443Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for providing filtered backups of a distributed database. One of the methods includes receiving a user request to generate an incremental backup to be added to a user specified backup sequence for a distributed database, wherein the user specified backup sequence specifies a subset of one or more database tables to be included in backups in the user specified backup sequence. Dirty partitions of the one or more tables covered by the user specified backup sequence are identified, wherein a dirty partition is a table partition that was created or modified after generation of a most recent backup in the user specified backup sequence. An incremental backup to be added to the user specified backup sequence is generated, the incremental backup comprising contents of the dirty partitions of the tables covered by the user specified backup sequence.Type: GrantFiled: January 8, 2014Date of Patent: May 30, 2017Assignee: Pivotal Software, Inc.Inventors: Swetha Devarayasamudram Nagendran, Ivan D. Novick, James Bryan McAtamney, Abhijit B. Subramanya, Richa Sharma
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Patent number: 9667007Abstract: Systems and methods for configuring contacts of a first connector includes detecting mating of a second connector with the first connector and in response to the detection, sending a command over one of the contacts and waiting for a response to the command. If a valid response to the command is received, the system determines the orientation of the second connector. The response also includes configuration information for contacts in the second connector. The system then configures some of the other contacts of the first connector based on the determined orientation and configuration information of the contacts of the second connector.Type: GrantFiled: February 27, 2014Date of Patent: May 30, 2017Assignee: APPLE INC.Inventors: Jeffrey J. Terlizzi, Scott Mullins, Alexei Kosut, Jahan Minoo
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Patent number: 9661022Abstract: A control unit that is configured to instruct a device to implement a limitation on a port and broadcast a controller address. The control unit is further configured to receive first identification information associated with a second device connected to the port from the device, the first identification information being addressed to the controller address. Additionally, the control unit is configured to establish a communication link with the second device through the device and the port, receive second identification information associated with the second device over the communication link, determine whether the second device is authorized based on a policy, determine whether the first identification information and second identification information match, and instruct the first device to remove the limitation on the port in response to determining that the second device is authorized and that the first identification information matches the second identification information.Type: GrantFiled: April 24, 2015Date of Patent: May 23, 2017Assignee: DELL PRODUCTS L.P.Inventors: Sudhir Vittal Shetty, Arun Sarat Yerra, Harish R. Gajulapalle
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Patent number: 9612991Abstract: Methods and apparatus, including computer program products, are provided for connector interface mapping. In one aspect there is provided a method. The method may include detecting, at a first device, an orientation of a data connector connectable to a data interface, the data interface having a first portion and a second portion, the first portion coupled to a single port of a first type at the first device; sending, by the first device, the detected orientation information to a second device; and receiving, at the first device including the single port, data sent by the second device to the single port. Related apparatus, systems, methods, and articles are also described.Type: GrantFiled: October 10, 2013Date of Patent: April 4, 2017Assignee: Nokia Technologies OyInventors: Pekka E. Leinonen, Kai Inha, Timo T. Toivola, Pekka Talmola, Rune Lindholm, Timo J. Toivanen
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Patent number: 9602464Abstract: Techniques and mechanisms to enable addressing of components accessed via a control interface. In an embodiment, a plurality of identifiers is logically split into first and second pools. The first pool is available for assigning to allow addressing of components while such components are active with respect to some functionality. The second pool is available for assigning to allow addressing of components while such components are passive with respect to some functionality. In another embodiment, different respective identifiers of the first pool pool are assigned each of first one or more of the plurality of components, and a respective identifier of the second pool is assigned to each of second one or more of the plurality of components. Any two of the second one or more components that have the same address default are assigned different respective identifiers of the second pool.Type: GrantFiled: December 12, 2014Date of Patent: March 21, 2017Assignee: Intel CorporationInventors: Werner Hein, Martin Polak, David Loesch
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Patent number: 9569391Abstract: Processing of out-of-order data transfers is facilitated in computing environments that enable data to be directly transferred between a host bus adapter (or other adapter) and a system without first staging the data in hardware disposed between the host bus adapter and the system. An address to be used in the data transfer is determined, in real-time, by efficiently locating an entry in an address data structure that includes the address to be used in the data transfer.Type: GrantFiled: May 23, 2014Date of Patent: February 14, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Clinton E. Bubb, Daniel F. Casper, John R. Flanagan, Raymond M. Higgs, George P. Kuch, Jeffrey M. Turner
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Patent number: 9471234Abstract: A method may include, in a chassis configured to receive a plurality of modular information handling systems and a plurality of modular information handling resources, exposing a first virtual function instantiated on a management processor disposed in the chassis to a switch interfaced between a modular information handling system and the management processor. The method may also include communicating, by the management processor, an input/output request from the modular information handling system received by the first virtual function to at least one of a second virtual function instantiated on a first storage controller communicatively coupled to the management processor and a third virtual function instantiated on a second storage controller communicatively coupled to the management processor. The method may further include receiving, by the management processor, an acknowledgment of completion of the input/output request from at least one of the second virtual function and the third virtual function.Type: GrantFiled: October 6, 2015Date of Patent: October 18, 2016Assignee: Dell Products L.P.Inventors: Kiran Kumar Devarappalli, Krishnaprasad Koladi
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Patent number: 9471526Abstract: A system including a controller and a bridge module. The controller is configured to (i) communicate with a host via a first interface, and (ii) communicate with a storage device via a second interface. The second interface is separate from the first interface. The bridge module is configured to allow the controller to transfer data between the storage device and the host without buffering the data, and to access a memory of the host via the first interface during the transfer.Type: GrantFiled: November 26, 2013Date of Patent: October 18, 2016Assignee: Marvell World Trade LTD.Inventors: Chun-Lun Lin, Kanting Tsai, Dishi Lai, Hsi-Cheng Chu
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Patent number: 9465852Abstract: A method and a system are provided for encoding and processing digital information. The digital information is encoded according to binary encoding formats corresponding to primitive data types. The primitive data types comprise scalar data types including Boolean, integer, float, decimal, time stamp, string, symbol, binary large object, and character large object data types. The primitive data types also comprise composite data types including structure, list, and S-expression data types. The binary-encoded digital information is stored in a message with a predetermined format for transmission. No metadata is included in the message.Type: GrantFiled: November 13, 2007Date of Patent: October 11, 2016Assignee: Amazon Technologies, Inc.Inventors: Andrew J. Lusk, Todd V. Jonker, Chris A. Suver
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Patent number: 9436272Abstract: A computer program product for processing input/output (I/O) data is provided for performing a method, which includes receiving a control word having an indirect data address including a starting location of a list of storage addresses, gathering the data and transmitting gathered data to a control unit in the I/O processing system. Gathering includes accessing an entry of the list, the entry located at an entry storage location and including an address. Based on the entry of the list indicating that the address is a data address, data is gathered from a data storage location, and a next entry of the list is accessed. Based on the entry of the list indicating that the address is an address of a next entry of the list, the next entry of the list is obtained from another storage location that is located non-contiguously to the entry storage location.Type: GrantFiled: September 11, 2014Date of Patent: September 6, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel F. Casper, Mark P. Bendyk, John R. Flanagan, Catherine C. Huang, Matthew J. Kalos, Ugochukwu C. Njoku, Dale F. Riedy, Gustav E. Sittmann, III, Harry M. Yudenfriend
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Patent number: 9436823Abstract: A method and apparatus are provided to detect malicious code in a computing system, where the malicious code is obscured by manipulation of an input/output memory management unit. A peripheral component interconnect express (PCIe) device requests a translation of a bus address for a given device in the system and determines whether the requested translation was received. If the requested translation was received, the PCIe device further determines whether the bus address for the given device corresponds to a physical address for the given device. If the bus address for the given device does not correspond to the physical address for the given device, the PCIe device sends a notification that the computing system is potentially compromised.Type: GrantFiled: December 17, 2013Date of Patent: September 6, 2016Assignee: Google Inc.Inventors: Benjamin Charles Serebrin, Brandon S. Baker