Abstract: Disclosed techniques allow for devices of a SAN to login to an F_port of a different switch than the switch to which the device is physically connected. These techniques allow moving some of the capability from an edge switch to another switch in the fabric, with the edge switch transporting incoming frames from the device to the other switch and thence across the SAN to the destination device, and similarly transporting outgoing frames from the more-capable switch to the edge switch for delivery to the device connected to the edge switch. In some embodiments, the edge switch may determine the other switch to which the device should login based on properties of the other switch.

Abstract: Techniques are described that can be used to enable a transfer of an operating system from one machine to another. The transfer permits the operating system to be available to the target machine at buffers that are accessible to one or more application or other logic. In some implementations, information related to an operating system migration is stored in a buffer that is accessible to an application that is to use the information and thereby avoids a copy of such information from an intermediate buffer to an application buffer.

Abstract: There is provided a semiconductor device having a reduced number of external terminals allocated for address input to receive access from outside, while realizing a high-speed response to an access from outside. The semiconductor device employs, in order to allow other external devices to directly access resources it possesses in its own address space, in an external interface circuit, external terminals which input a part of the address signal required for access from outside, a supplementary register which supplements the upper portion of address information that has been input from the external terminals, a mode register accessible from outside, and an address control circuit which generates an address signal to access the address space in a form based on information input from the external terminals, required supplementary information, and mode information of the mode register.

Abstract: The disclosure discloses a method and device for sending and receiving data, which are used to solve the problem that the existing device having the function of the laser pen and the function of the data card cannot implement the integrated control over the function of the laser pen and the function of the data card. The device includes a main module and a connection module. The connection module is configured to connect to a PC by using a USB mode, and the main module communicates with the connection module by high frequency. The method for sending data includes: the main module encapsulates data to be sent according to a type of the data to be sent and identification information corresponding to the type of the data, and sends the encapsulated data to the connection module; and the connection module decapsulates the encapsulated data and sends the decapsulated data to the PC.

Abstract: A method, storage medium, and system for a managed audio bell/intercom including a controller and audio devices connected by an industry standardized network, wherein the controller contains logic to distribute action via the network to the audio devices.

Abstract: Receiving data at a first device transferred from a second device includes: storing a starting address with respect to a memory address space for a memory of the first device in a storage location within the first device. A request is received at the first device to transfer one or more data values from the second device, the request including a target address with respect to a communication channel address space for a communication channel between the first device and the second device. The second device determines whether the target address corresponds to a reserved address value designated as an indicator of a transfer to a memory address beyond the communication channel address space.

Abstract: Disclosed herein is an apparatus and method for low power local area communication using event signal control. The low power local area communication apparatus includes at least one coordinator and a plurality of network device. The network coordinator transmits a periodic beacon signal based on the preset beacon period of a superframe and a continuous RF event signal, receives a first signal including a Service Set Identifier (SSID) and a second signal including the SSID and an event detection code, and performs the transmission or reception of data when authentication has been completed. Each of the network devices generates and transmits the first and second signals, performs the transmission and reception of data after authentication has been completed, and is thereafter switched to power saving mode or OFF mode. Accordingly, the construction of the system is simplified, and the cost of the system is reduced.

Abstract: A method may include distributing ranges of addresses in a memory among a first set of functions in a first pipeline. The first set of the functions in the first pipeline may operate on data using the ranges of addresses. Different ranges of addresses in the memory may be redistributed among a second set of functions in a second pipeline without waiting for the first set of functions to be flushed of data.

Abstract: A control method for a wireless communications device compatible with a universal serial bus mass storage device class (UMS) protocol includes: monitoring an occurrence of a change in the file system; and when the change in the file system is detected, performing at least one predetermined operation corresponding to a specific predetermined file associated with the change. For example, the change in the file system may be removing the specific predetermined file from the file system or adding the specific predetermined file to the file system.

Abstract: Disclosure is related to a universal driving method and a system for a variety of peripherals. For solving the problem in a hardware manufacturer required to provide many versions of drivers and proprietary programs for different host systems and operating systems, the universal driving method allows the host system drives its peripherals via a scripting language. In accordance with the embodiment of the invention, the host system may recognize and connect to a peripheral device via an address while the peripheral device is linked to the host system. After that, a channel is established between the peripheral device and the host system. The scripting language is then used to generate an operating interface for the peripheral device. Users may therefore access the peripheral device through the interface.

Abstract: The present disclosure provides an improved point-to-point serial peripheral interface, a system comprising an improved point-to-point serial peripheral interface, and a method for use in a system comprising an improved point-to-point serial peripheral interface. A master comprises a SPI initiating port. Each slave comprises at least one SPI receiving port and at least one SPI forwarding port. The master provides a set of SPI signals to the SPI receiving port of the first slave in the chain, and the entire SPI signals are forwarded via the SPI forwarding port of each of the slaves until the SPI transaction reaches a target slave, which is identified by an in-band device addressing mechanism.

Abstract: An image forming apparatus that can reduce the number of signal lines that can respond to interrupt processing by conducting I/O control that can acquire irregularly generated sensor detection signals. Identification control means of the image forming apparatus uses the data line in the period other than when conducting identification control of the detection means or the drive means to acquire the data of the specified detection means as valid data. Delay of the detection response time to irregularly generated signals can be minimized by using the data line other than when conducting identification control of the detection means or the drive means to acquire irregularly generated detection signals.

Abstract: Disclosed are a method of and a system for enabling a program running on a logical partition, of a logically partitioned data processing system, to access directly resources of the data processing system. The method comprising the steps of, said program transforming a first address for a resource of a specific type on the data processing system, to a second address, within an address space allocated to said logical partition; and said program using said second address space to access a resource of said specific type allocated to said logical partition. In this way, the present invention may be used to enable a program running within a partition's address space to access IO devices directly, thus avoiding the overhead of making a hypervisor call.

Abstract: Memory devices and methods are described and shown that are capable of being configured in a chain. In one configuration, a single data input port and a single data output port are utilized at a host to communicate with the chain of memory devices. Methods for assigning identifiers to memory devices in the chain are described that include detection of a presence or absence of downstream memory devices. In selected examples, identifiers are assigned sequentially to memory devices in the chain until no additional downstream memory devices are detected.

Abstract: Processing of out-of-order data transfers is facilitated in computing environments that enable data to be directly transferred between a host bus adapter (or other adapter) and a system without first staging the data in hardware disposed between the host bus adapter and the system. An address to be used in the data transfer is determined, in real-time, by efficiently locating an entry in an address data structure that includes the address to be used in the data transfer.

Abstract: A system and method for clients, a control module, and storage modules to participate in a unified address space in order to and read and write data efficiently using direct-memory access. The method for reading data includes determining a first location in a first memory to write a first copy of the data, a second location in a second memory to write a second copy of the data, where the first memory is located in a first storage module including a first persistent storage and the second memory is located in a second storage module including a second persistent storage. The method further includes programming a direct memory access engine to read the data from client memory and issue a first write request to a multicast address, where the first location, the second location, and a third location are associated with the multicast address.

Abstract: A computer program product is provided for performing an input/output (I/O) processing operation at a host computer system. The computer program product is configured to perform: obtaining a transport command word (TCW) at a channel subsystem for an I/O operation, the TCW including an address of a transport command control block (TCCB) having a transport command area (TCA) configured to hold a first plurality of device command words (DCW) and control data associated with respective DCWs, the first plurality of DCWs including a transfer TCA extension (TTE) DCW that specifies a TCA extension, the TCA extension configured to hold one or more DCWs and control data associated with respective DCWs; gathering the TCCB from one or more locations specified in the TCCB address and transferring the TCCB to the control unit; gathering the TCA extension specified by the TTE DCW; and transferring the TCA extension to the control unit.

Abstract: One aspect relates to a communication protocol for communicating between one or more entities, such as devices, hosts or any other system capable of communicating over a network. Another aspect relates to a system architecture that permits more than one slave system (e.g., a slave device) to be connected to a master system (e.g., a master device) in a communication system implementing a master/slave protocol. In one aspect, a pass-through device is provided that facilitates communication and authentication to one or more downstream slave devices. Yet another aspect relates to a star-based configuration of slave devices coupled to the master, and protocols for communicating and authenticating slave devices. Another aspect relates to a protocol that allows communication between entities without a priori knowledge of the communication protocol. In such a protocol, for example, information describing a data structure of the communication protocol is transferred between communicating entities.

Abstract: An integrated circuit (IC) configured to operate as a slave on an inter-integrated circuit (I2C) or I2C compatible bus. The IC is further configured to receive an address through the I2C bus and store the received address in a register, so as to be identified by the address. A method of address assignment in a master/slave system, the system comprises at least one master, a plurality of slaves, and an I2C or I2C compatible bus. The method comprises sending a first address by the master on the I2C bus to a first of the plurality of slaves and storing the first address on the first slave to identify the first slave by the first address. The method further comprises sending a second address by the master on the I2C bus to a second of the plurality of slaves and storing the second address on the second slave to identify the second slave by the second address. The steps of sending and storing are repeated until all slaves of the system have stored an address.

Abstract: There is provided a semiconductor device having a reduced number of external terminals allocated for address input to receive access from outside, while realizing a high-speed response to an access from outside. The semiconductor device employs, in order to allow other external devices to directly access resources it possesses in its own address space, in an external interface circuit, external terminals which input a part of the address signal required for access from outside, a supplementary register which supplements the upper portion of address information that has been input from the external terminals, a mode register accessible from outside, and an address control circuit which generates an address signal to access the address space in a form based on information input from the external terminals, required supplementary information, and mode information of the mode register.

Abstract: A method for exchanging peripheral data and submodule, wherein a transfer means is embedded into an operating system of the submodule for the exchange of the peripheral data with a main module to accelerate a process of copying input/output data from a decentralized peripheral system to a superordinate level.

Abstract: An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices.

Abstract: In a virtualized computer system in which a guest operating system runs on a virtual machine of a virtualized computer system, a computer-implemented method of providing the guest operating system with direct access to a hardware device coupled to the virtualized computer system via a communication interface, the method including: (a) obtaining first configuration register information corresponding to the hardware device, the hardware device connected to the virtualized computer system via the communication interface; (b) creating a passthrough device by copying at least part of the first configuration register information to generate second configuration register information corresponding to the passthrough device; and (c) enabling the guest operating system to directly access the hardware device corresponding to the passthrough device by providing access to the second configuration register information of the passthrough device.

Abstract: A computer implemented method includes receiving a request to access a configuration space that is associated with a virtual function. The request may include a configuration space address and a root complex identifier. The computer implemented method may include identifying a root complex based on the root complex identifier. The computer implemented method may also include selecting a slot that is associated with the root complex. The slot may be capable of coupling a hardware input/output adapter to the root complex. The computer implemented method may further include determining whether the configuration space address is associated with the selected slot. The computer implemented method may include accessing the configuration space using an access mechanism in response to determining that the configuration space address is associated with the selected slot.

Abstract: A method for communicating via a bus including a first channel, a second channel, and a third channel is disclosed. The method includes addressing a slave device via the first channel, receiving from the slave device via the second channel, and writing to the slave device via the third channel. The method further includes selecting between first and second bus transmission modes. In the first bus transmission mode, payload write data is to be sent to the slave device via the first channel or the third channel. In the second bus transmission mode, during a first clock cycle, second payload write data associated with a second write operation is to be sent to the slave device via the first channel and first payload write data associated with a first write operation is to be concurrently sent to the slave device via the third channel.

Abstract: The present disclosure provides a method of assigning media access control (MAC) addresses to image paths for a printing system. The method comprises: initializing a MAC address to each image path board in the printing system wherein the printing system includes at least two print engines each having an image path board; modifying a card cage enclosure to include a bit selector for each image path board; and, creating a unique IP address for each MAC address including generating a unique octet for each MAC address. A slot ID is used for the generating of the unique octet for each MAC address having a standard base value.

Abstract: A semiconductor device correctly switches endian modes regardless of the current endian mode of an interface. The semiconductor device includes a switching circuit and a first register. The switching circuit switches an interface tote used in big endian or little endian mode. The first register holds control data of the switching circuit. The switching circuit sets the interface in little endian mode when first predetermined control information is supplied to the first register, and sets the interface in big endian mode when second predetermined control information is supplied to the first register. The control information can be correctly inputted without being influenced by the endian setting status.

Abstract: A docking device for restoring location arrangement of output devices is provided according to an aspect of the present invention. The docking device includes a transmission module configured to obtain output information from an information generation module and transmit it to an output device and an identifier storage module configured to store an identifier corresponding to the output device. An output system and method for restoring a location arrangement of output devices are also provided.

Abstract: A method, system and computer program product are provided for implementing PCI-Express memory domains for single root virtualized devices. A PCI host bridge (PHB) includes a memory mapped IO (MMIO) domain descriptor (MDD) and an MMIO Domain Table (MDT) are used to associate MMIO domains with PCI memory VF BAR spaces. One MDD is provided for each unique VF BAR space size per bus segment connecting a single root IO virtualization (SRIOV) device to the PCI host bridge (PHB). The MDT used with the MDD includes having a number of entries limited to a predefined total number of SRIOV VFs to be configured. A VF BAR Stride, which may be further implemented as a VF BAR Stride Capability Structure, is provided to reduce the number of MDDs required to map SRIOV VF BAR spaces. A particular definition of the MDD is provided to reduce the number of MDDs required to at most one per SRIOV bus segment below a PHB.

Abstract: A management system includes an image forming apparatus and a monitoring apparatus. The monitoring apparatus includes a determination unit configured to determine whether the image forming apparatus has a transmission control function for performing change of a transmission destination of collected operational information, a transmission unit configured to transmit to the image forming apparatus having the transmission control function, a command for setting the monitoring apparatus as a transmission destination of the operational information, and transmission setting in which a scheme for acquiring counter information related to charging is set, and a scheme for acquiring failure information is set, and a verification unit configured to verify matching in the counter information. The image forming apparatus is configured to perform transmission of the operational information to the monitoring apparatus in accordance with the command and the transmission setting.

Abstract: Systems and methods provide control of operating states of an electronic device. A first exemplary electronic device detects a consumer electronic control (CEC) communication sent from a second electronic device to a third electronic device, the CEC communication communicated over high-definition multimedia (HDMI) connectors communicatively coupling the first electronic device, the second electronic device and the third electronic device; determines, based on information in the CEC communication, whether the CEC communication is one of a first kind of CEC communication or a second kind of CEC communication; in response to determining that the CEC communication is one of the first kind of CEC communication, transitions the first electronic device to a predefined operating state; and in response to determining that the CEC communication is one of the second kind of CEC communication, maintains the first electronic device in a current operating state.

Abstract: An information storage apparatus transmits or receives information to or from another information processing apparatus in one of a plurality of data transfer modes. The information storage apparatus includes first storage means for storing the information; information transmission/reception control means for controlling transmission or reception of the information between the first storage means and second storage means contained in the other information processing apparatus; command analysis means for analyzing a command supplied from the other information processing apparatus to determine which of the plurality of data transfer modes should be applied; and configuration means for configuring the information transmission/reception control means based on a result of determination of the data transfer mode by the command analysis means.

Abstract: An apparatus is provided for charging a Universal Serial Bus (USB) device according to an optimal charging mode. The apparatus includes a charging module that is configured to obtain a descriptor from the USB device upon detection of the USB device on a USB bus. The charging module includes one or more descriptor entries disposed in a memory and a controller. The one or more descriptor entries include descriptor data, for matching the descriptor to a specific descriptor entry, and charging data, that specifies the optimal charging mode for the USB device. The controller is coupled to the memory, and is configured to match the descriptor to the specific descriptor entry, and is configured to initiate the optimal charging mode on the USB bus according to the charging data.

Abstract: A tethered item is associated with an identifier that uniquely identifies the item, and one or more content processing devices execute obtaining an identifier of the item, and correlating the obtained item identifier with information related to the tethered item.

Abstract: Systems, methods, and devices are disclosed that identify a first peripheral and a second peripheral, receive information from the first peripheral and the second peripheral, communicate the information received from the first peripheral to the second peripheral, and communicate the information received from the second peripheral to the first peripheral. The information communicated to the first and second peripherals allow the first and second peripherals to communicate directly with one another.

Abstract: An SMBus message handler, an integrated circuit and a method for controlling an SMBus are disclosed which identifies starting address of a program being stored in a memory. Instructions of the program are fetched one after another into a finite-state machine which controls the data transfer between an SMBus interface and a register set in compliance with the instruction present in the finite-state machine. Further, an SMBus test device and a method for controlling a testing system are described which check as to whether a key is input from a second interface. Upon inputting of a key it is mapped to a sequence of instructions for controlling devices connected to the SMBus or transferring data or receiving data from the devices connected to the SMBus.

Abstract: The present invention is directed to a method and system for efficient write journal entry management maintaining minimum write journal information stored in a nonvolatile memory through utilizing an additional structure in a fast volatile memory. The method and system may manage write journaling of a file volume including multiple fixed sized regions and assign a persistent 1-bit synchronization status (the write journal information) to each data region. In addition, a non-persistent I/O counter (the additional structure) for each region to manage the persistent 1-bit synchronization status during run-time. The present invention may provide a mechanism to determine when write I/O operations have not successfully completed to a specific region of the file volume.

Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes programmed I/O (PIO) configuration registers corresponding to hardware resources, and a storage for storing a resource table that includes a plurality of entries. Each entry corresponds to a respective hardware resource. A system processor may allocate the hardware resources to functions that may include physical and virtual functions, and may program each entry of the resource discovery table for each function with an encoded value that indicates whether a requested hardware resource has been allocated to a requesting process, and whether the requested hardware resource is shared with another function. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.

Abstract: In one set of embodiments, a power management system comprises two or more devices, such as POL devices, configured to transmit and receive data over a shared bus, such as an I2C bus, according to the bus protocol of the shared bus. Each device may be configured with at least one respective address register, which may be programmed with an address uniquely identifying the device, and a mask register that may be configured to mask select bits of the respective address register, thereby enabling the device to identify device groups. In one embodiment, one of the devices identifying itself as a master device may distribute information to any of the other devices by transmitting the information, which may include commands and/or data, to itself, in effect targeting the address programmed into its own address register.

Abstract: Roughly described, a data processing system comprises a memory addressable by a range of physical memory addresses; a plurality of non-privileged software domains each having a virtual memory address space; a privileged software domain; a memory management unit operable to perform virtual address translation of a virtual memory address into a physical memory address; and an I/O device supporting virtualised interfaces each associated with a respective non-privileged software domain, the I/O device comprising an operation management unit operable to perform virtual address translation in one or more of the virtual memory address spaces; wherein, for I/O operations requested by a virtualised interface, the I/O device invokes the operation management unit to perform virtual address translation for those I/O operations meeting first criteria and to invoke the memory management unit to perform virtual address translation for those I/O operations which do not meet the first criteria.

Abstract: A system for discovering devices on a common bus without direct communication. Each device on the bus has a unique identification. One of the devices or a computer may be a master or a host. The host may broadcast a request asking every device with an identification value in a particular range to respond. If no device or one device exists on the bus in this particular range, then there is no or one response, respectively. If multiple devices exist within the range, then multiple responses may be received by the host. In a case of multiple responses, the host may re-transmit its request to one or more half ranges. If multiple responses are again received, then the host may again re-transmit its request where the half range or ranges are again split in half. This approach of half-range reduction may be repeated until no more collisions occur.

Abstract: A transmitting section 7a outputs a transmission signal to the side of a transmission line 1. A first switching section Qa1 outputs the transmission signal to the transmission line 1. A second switching section Qa2 outputs the transmission signal from the transmission line 1. A receiving section 9a receives the transmission signal from the transmission line 1. A first detecting section 13a detects the transmission signal flowing through the first switching section Qa1. A second detecting section 19a detects the transmission signal flowing through the second switching section Qa2. When the transmission signal from the transmitting section 7a is not detected at both the first and second detecting sections 13a and 19a, a selecting section 15a selects the receiving section 9a and outputs a reception signal.

Abstract: Systems and methods for configuring contacts of a first connector includes detecting mating of a second connector with the first connector and in response to the detection, sending a command over one of the contacts and waiting for a response to the command. If a valid response to the command is received, the system determines the orientation of the second connector. The response also includes configuration information for contacts in the second connector. The system then configures some of the other contacts of the first connector based on the determined orientation and configuration information of the contacts of the second connector.

Abstract: Apparatus and method for propagating data between multiple terminal devices includes determining the functional operability of a plurality of devices to assess which devices are properly configured. If a device is properly configured, operating the device in a transmit-mode to transmit functional operability data. If a device is not properly configured, operating the device in a receive-mode to receive the functional operability data. Coupling a transmitting device and at least one receiving device to a plurality of ports that are operably connected together so that the transmitting device and receiving device share the functional operability data.

Abstract: A method for configuring fieldbus stations, wherein station names and addresses for the fieldbus stations are executed by reading in a parameter over a first network port of a coupling element, which acts as a topology anchor so as to assign a unique addressing in a subnetwork, i.e., a unique name and a unique IP address, in a PROFINET-IO, such as a fieldbus based on Ethernet.

Abstract: The present disclosure provides a method of device selection using sensory input and portable electronic device configured for same. In accordance with one example embodiment, there is provided a method for use in a portable electronic device for selecting a peripheral device for connection with the portable electronic device, comprising: measuring magnetic fields within the vicinity of the portable electronic device; identifying at least two peripheral devices in accordance with measured magnetic fields and one or more distinct characteristics of a magnetic field generated by each of the at least two peripheral devices which uniquely identify each of the at least two peripheral devices; and connecting the portable electronic device to one of the at least two peripheral devices using a wireless communications path.

Abstract: An image forming apparatus and method of controlling the same, the image forming apparatus including: an article of consumption including a memory; and a print controller to perform a memory access to read and/or to write data from/to the memory. Addresses for the memory of the article of consumption are changed using access counts updated each time a memory access is requested, so that the memory access can be performed according to the changed addresses.

Abstract: A system and method for automatically and uniquely assigning identification codes to a plurality of slave processors. A master processor having communication port is linked to a first slave processor, which, itself, has first and second communication ports. The first communication port is used in support of the aforementioned link to the computer. A second slave processor, also having first and second serial ports, is linked by its first communication port to the second communication port of the first slave processor. The slave processors are programmed to read designated pins on their first communication ports. The read values determine the identification code of each processor. Thereafter, each slave processor outputs to its second port a value one greater than the value read from its first port. Therefore, each slave processor assigns itself a particular identification code and directs the next slave processor to assign itself an identification code one greater.

Abstract: This invention is a system and a method for operating a storage server that provides read or write access to a data in a data network using a new architecture. The method of processing I/Os in response to a request by a client of the storage server executes one or more services communicated by a policy engine. The I/Os received from the application are tagged and catalogued to create co-related I/O patterns. The policy engine is then updated with the results of processing the I/Os after executing services on those I/Os.

Abstract: A process is provided for transferring a first sequence control and/or first data into a first control device and a second sequence control and/or second data into a second control device in a motor vehicle. The transfer is carried out by way of a first data bus while using a first transmission protocol which has a data frame with a predetermined frame format or message format, and the transfer as a whole takes place by the transmission of a plurality of data frames. In a first step, by way of a first data frame, a portion of the first sequence control and/or of the first data is transmitted to the first control device. In a second step, by way of the second data frame, a portion of the second sequence control and/or of the second data is transmitted to the second control device.